Sharp HT-CN500DVH (serv.man7) Service Manual ▷ View online
– 53 –
HT-CN400DVH/HT-CN400DVE/HT-CN500DVH/HT-CN500DVE
LA[21:0]
DSCK_EN
DSCK
DQM
DCS#[1:0]
DMA[11:0]
DWE#
DOE#
DRAS#[2:0]
DB[15:0]
DCAS#
DSCK
DQM
DCS#[1:0]
DMA[11:0]
DWE#
DOE#
DRAS#[2:0]
DB[15:0]
DCAS#
YUV[7:0]
PCLK2XSCN
PCLKQSCN
VSYNC#
HSYNC#
PCLK2XSCN
PCLKQSCN
VSYNC#
HSYNC#
CDAC
YDAC
UDAC
VDAC
YDAC
UDAC
VDAC
VREF
COMP
RSET
COMP
RSET
AUX[7:0]
RESET#
XIN
XOUT
RESET#
XIN
XOUT
LCS#[3:0]
LD[15:0]
LWRHL#
LWRLL#
LOE#
HA[2:0]
HD[15:0]
HWRQ#
HRDQ#
HRDQ#
HIRQ#
HRST#
HIORDY
HWR#
HRD#
HIOCS16#
HCS[1,3]FX#
DCI_ACL#
DCI_CLK
DCI_ERR#
DCI_REQ#
DCI_FDS#
TDMCLK
TDMDR
TDMDX
TDMFS
TDMTSC#
DCI[7:0]
RSD
RWS
RBCK
SPDIF
TBCK
MCLK
TSD[3:0]
TWS
Processor
Interface
SRAM
Interface
MPEG
Decoder
DRAM
Interface
2 k x 32 ROM
512 x 32 SRAM
Video
Processor
Video Output
On Screen
Display
Sub-Picture
Decoder
Video
Encoder
Clock
System
Demultiplexer
DVD
Descramble
Registers
ESS RISC
Processor
DMA
Controller
H0st/ATAPI/UDF
Loader Interface
Serial Audio
Interface
DCI Loader
Interface
TDM
Interface
Host/ATAPI
UDF
Interface
Serial
Audio
Audio
Interface
DCI
Interface
TDM
Interface
Screen
Display
DRAM
Clock,
Aux Ports
and Reset
VEE
HA2/AUX4[4]
VEE
AUX[0]
AUX[1]
AUX[1]
AUX[2]/IOW#
VSS
VEE
VEE
AUX[3]/IOR#
AUX[4]
AUX[5]
AUX[6]
AUX[7]
AUX[5]
AUX[6]
AUX[7]
LOE#
VSS
VCC
LCS0#
LCS1#
LCS2#
LCS3#
LCS1#
LCS2#
LCS3#
VSS
LD0
LD1
LD2
LD3
LD4
LD1
LD2
LD3
LD4
VEE
VSS
VSS
LD5
LD6
LD7
LD8
LD9
LD6
LD7
LD8
LD9
LD10
LD11
LD11
VSS
VEE
VEE
LD12
LD13
LD14
LD15
LD13
LD14
LD15
LWRLL#
LWRHL#
VSS
VEE
VEE
CAMIN0
CAMIN1
CAMIN1
LA0
LA1
LA2
LA3
LA1
LA2
LA3
VSS
VEE
LA4
LA5
LA6
LA7
LA8
LA9
VSS
VCC
LA10
LA11
LA12
LA13
LA14
LA15
LA16
VSS
VEE
LA17
LA18
LA19
LA20
LA21
RESET#
TDMDX/RSEL
VSS
VEE
TDMDR
TDMCLK
TDMFS
TDMTSC#
TWS/SEL_PLL2
TSD0/SEL_PLL0
VSS
VCC
TSD1/SEL_PLL1
TSD2
TSD3
MCLK
TBCK
SPDIF/PLL3
N.C.
VSS
VCC
RSD
RWS
RBCK
N.C.
XIN
XOUT
AVEE
VSS
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
VSS
HA1/AUX4[3]
HA0/AUX4[2]
HCS3FX#/AUX3[6]
HCS1FX#/AUX3[7]
HIOCS16#/CAMCLK/AUX3[4]
HRD#/DCI_ACK#/AUX4[6]
HWR#/DCI_CLK/AUX4[5]
VEE
VSS
HIORDY/AUX3[3]
HRST#/AUX3[5]
HIRO/DCI_ERR#/AUX4[7]
HRRO#/AUX4[0]
HWRQ#/DCI_REQ#/AUX4[1]
HD15/AUX2[7]/IR
HD14/AUX2[6]/SQSI
VCC
VSS
HD13/AUX2[5]/SP
HD12/AUX2[4]/C2PO
HD11/AUX2[3]//IRQ
HD10/AUX2[2]/SQSK
HD9/AUX2[1]/SQSO
HD8/DCI_FDS#/AUX2[0]/VFD_CLK
HD7/DCI7/AUX1[7]/VFD_DIN
VEE
VSS
HD6/DCI6/AUX1[6]/VFD_DOUT
HD5/DCI5/AUX1[5]
HD4/DCI4/AUX1[4]
HD3/DCI3/AUX1[3]
HD2/DCI2/AUX1[2]
HD1/DCI1/AUX1[1]
HD0/DCI0/AUX0[0]
VCC
VSS
HSYNC#/CAMIN7/AUX3[0]
VSYNC#/CAMIN6/AUX3[1]
PCLKQSCN/CAMIN5/AUX3[2]
PCLK2XSCN/CAMIN4
YUV7/CAMIN3
YUV6/VDAC
YUV5/YDAC
VSS
ADVEE
YUV4/RSET
YUV3/COMP
YUV2/CDAC
YUV1/VREF
YUV0/CAMIN2/UDAC
DCLK
VEE
VSS
DSCK
DQM
DSC0#
VEE
VSS
DCS1#
DB15
DB14
DB13
DB12
VEE
VSS
DB11
DB10
DB9
DB8
DB7
DB6
VSS
VCC
DB5
DB4
DB3
DB2
DB1
DB0
VSS
VEE
DMBS1
DMBS0
DRAS#
DWE#
DOE#/DSCK_EN
DCAS#
VEE
VSS
DMA11
DMA10
DMA9
DMA8
DMA7
DMA6
VSS
VEE
DMA5
DMA4
MDA3
DMA2
DMA1
DMA0
VSS
DSCK
DQM
DSC0#
VEE
VSS
DCS1#
DB15
DB14
DB13
DB12
VEE
VSS
DB11
DB10
DB9
DB8
DB7
DB6
VSS
VCC
DB5
DB4
DB3
DB2
DB1
DB0
VSS
VEE
DMBS1
DMBS0
DRAS#
DWE#
DOE#/DSCK_EN
DCAS#
VEE
VSS
DMA11
DMA10
DMA9
DMA8
DMA7
DMA6
VSS
VEE
DMA5
DMA4
MDA3
DMA2
DMA1
DMA0
104
103
102
101
100
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
IC106 92LRCI6028-001: Microcomputer (ES6028)
Figure 53 BLOCK DIAGRAM OF IC
– 54 –
HT-CN400DVH/HT-CN400DVE/HT-CN500DVH/HT-CN500DVE
FE
A/D Block
SLC Block
CLV/CAV Block
EFM Block
Frame sync protection
Frame sync insertion
EFM demodulation
CIRC Dec Block
CD-ROM Dec Block
DVD Dec Block
1Mbit DRAM
(LC78662NW ONLY)
AV Dec I/F Block
BCA Buff Block
SUBCODE I/F Block
DRAM I/F Block
Audio OUT Block
EFM PLL Block
JV Block
CLK GEN Block
CPU I/F Block
SYS PLL Block
CD Frame Sync
DVD Frame Sync
RF I/F Block
FC Counter
TR Counter
EV Counter
FG Counter
Defect
Servo Block
D/A Block
8bit
D/A
CMP
CMP
Servo DSP
(16x16+32 32)
MPX
8bit
A/D
A/D
FDO
TDO
SLDO
SPDO
SGC
TBAL
FBAL
BST
F0
TSTD0
TSTD1
TDO
SLDO
SPDO
SGC
TBAL
FBAL
BST
F0
TSTD0
TSTD1
TESIO
HFLIO
EMPH
DOUT
LRSY
ROMCK
ROMXA
C2F
LRSY
ROMCK
ROMXA
C2F
MD[15:0]
AVREQI
MA[10:0]
MRAS1B
MCASUB
MCASLB
MOEB
MWEB
MCASUB
MCASLB
MOEB
MWEB
AVACKO
AVDACK
AVSCTB
AVERRB
AVD[7:0]
AVSCTB
AVERRB
AVD[7:0]
FSX
EFLG
EFLG
(AD0)
(TEC)
(WO)
(RF_BH)
(BHC)
TE
RF_PH
RF_BH
RF_BH
JV
RREC
AD0
AD1
AD1
BHC
WO
TEC
FG
EVENT
RFP[3:0]
DEFECTI
DEFECTO
EFMP
XIN
XOUT
HWAITB
HIRQ0B
X16MIO
DVDCKIO
HDAT[7:0]
HADR[12:0]
HRDB
HWRB
HCSB
EFMN
SLCO1
SLCO2
SLCO2
SLCLPF0
SLCLPF1
SLCLPF1
PISET
FISET
LF1
LF2
LF3
LF2
LF3
PCN
PPDO
FPDO
VCOCTL
DVDFR
CDFR
PCK
JVAO
JVAIN
JVRVO
JVCPC
JVCPI
VPDO
VCOC
VRPFR
EFMOUT
IC803 92LRCI7866-001: DVD Front End (LC78663NRW)
Figure 54 BLOCK DIAGRAM OF IC
– 55 –
HT-CN400DVH/HT-CN400DVE/HT-CN500DVH/HT-CN500DVE
Port Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
1
AD1
Input
Servo A/D converter. AD1
2
AD0
Input
Servo A/D converter. AD0
3
JV
Input
Servo A/D converter. JV
4
PREC
Input
Servo A/D converter. PREC
5
RF_PH
Input
Servo A/D converter. RF_PH
6
PF_BH
Input
Servo A/D converter. RF_BH
7
TE
Input
Servo A/D converter. TE
8
FE
Input
Servo A/D converter. FE
9
TEST0
Input
Test input 0. (Must be tied low during normal operation.)
10
EFMINP
Input
EFM/EFM+ input.
11
TEST1
Input
Test input 1. (Must be tied low during normal operation.)
12
EFMINN
Input
EFM- input.
13
SLCLPFO
—
SLC
14
SLCLPFI
—
SLC
15
SLCO1
—
SLC
16
SLCO2
—
SLC
17
AVDD1
Input
A/D, D/A converter, and SLC power supply. (Analog 3.3 V)
18
AVSS
—
Analog system ground.
19
BHC
Input
Comparator input. (Capacitor coupled to RF_BHH)
20
WO
Input
Comparator input.
21
TEC
Input
Comparator input. (Capacitor coupled to TE)
22
VREF
Output
Servo D/A converter reference voltage.
23
TSTD1
Output
Servo D/A converter.
24
TSTD0
Output
Servo D/A converter: TSTD0
25
FO
Output
Servo D/A converter: FO
26
BST
Output
Servo D/A converter: BST
27
TBAL
Output
Servo D/A converter: TBAL
28
FBAL
Output
Servo D/A converter: FBAL
29
SGC
Output
Servo D/A converter: SGC
30
SLDO
Output
Servo D/A converter: SLDO
31
SPDO
Output
Servo D/A converter: SPDO
32
TDO
Output
Servo D/A converter: TDO
33
FDO
Output
Servo D/A converter: FDO
34
DVDDO
Input
Internal logic system power supply. (Digital 2.5 V)
35
DVSS
—
Digital system ground.
36
FG
Input/Output
FG counter input.
37
HIRQB
Output
Interrupt signal output.
38
HWAITB
Output
Wait signal output.
39
HRESB
Input
Servo reset input.
40
HRDB
Input
Read signal input.
41
HWRB
Input
Write signal input.
42
HCSB
Input
Chip select signal input.
43
HDAT0
Input/Output
Data bus 0.
44
DVDD1
Input
I/O system power supply. (Digital 3.3 V)
45
DVSS
—
Digital system ground.
46
HDAT1
Input/Output
Data bus 1.
47
HDAT2
Input/Output
Data bus 2.
48
HDAT3
Input/Output
Data bus 3.
49
HDAT4
Input/Output
Data bus 4.
50
HDAT5
Input/Output
Data bus 5.
51
HDAT6
Input/Output
Data bus 6.
52
HDAT7
Input/Output
Data bus 7.
IC803 92LRCI7866-001: DVD Front End (LC78663NRW) (1/4)
– 56 –
HT-CN400DVH/HT-CN400DVE/HT-CN500DVH/HT-CN500DVE
53
HADR0
Input
Address 0.
54
HADR1
Input
Address 1.
55
HADR2
Input
Address 2.
56
HADR3
Input
Address 3.
57
HADR4
Input
Address 4.
58
HADR5
Input
Address 5.
59
HADR6
Input
Address 6.
60
MWEB
Output
WE output.
61
MRAS1B
Output
RAS output 1.
62
MA0
Output
DRAM address bus 0.
63
MA1
Output
DRAM address bus 1.
64
MA2
Output
DRAM address bus 2.
65
MA3
Output
DRAM address bus 3.
66
N.C.
—
No connect pin.
67
N.C.
—
No connect pin.
68
MA4
Output
DRAM address bus 4.
69
MA5
Output
DRAM address bus 5.
70
MA6
Output
DRAM address bus 6.
71
MA7
Output
DRAM address bus 7.
72
MA8
Output
DRAM address bus 8.
73
MA9
Output
DRAM address bus 9.
74
MA10
Output
DRAM address bus 10.
75
MOEB
Output
OE output.
76
MCASUB
Output
CAS output. (upper byte)
77
MCASLB
Output
CAS output. (lower byte)
78
HADR7
Input
Address 7.
79
HADR8
Input
Address 8.
80
HADR9
Input
Address 9.
81
HADR10
Input
Address 10.
82
HADR11
Input
Address 11.
83
HADR12
Input
Address 12.
84
C2F
Output
C2 flag output.
85
ROMXA
Output
CD data output.
86
ROMCK
Output
CD data output shift clock output.
87
LRSY
Output
CD data output L/R clock output.
88
DVDD1
Input
I/O system power supply. (Digital 3.3 V)
89
DVSS
—
Digital system ground.
90
EMPH
Output
Deemphasis monitor.
91
AVREQI
Input
AV data request flag input.
92
AVACKO
Output
AV data read strobe output.
93
AVDACK
Output
AV data read output.
94
AVSCTB
Output
AV output sector synchronization output.
95
AVERRB
Output
AV data reliability flag output.
96
AVD0
Output
AV data bus 0.
97
AVD1
Output
AV data bus 1.
98
AVD2
Output
AV data bus 2.
99
AVD3
Output
AV data bus 3.
100
AVD4
Output
AV data bus 4.
101
AVD5
Output
AV data bus 5.
102
AVD6
Output
AV data bus 6.
103
AVD7
Output
AV data bus 7.
104
EFMOUT
Output
EFM binarized signal output.
IC803 92LRCI7866-001: DVD Front End (LC78663NRW) (2/4)
Port Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
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