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This card transmits and receives data between itself and MPR (EC bus) in a dual port RAM communication basically.
Shows the diagrammic illustration.

DPRAM Communication diagrammic illustration

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A reset to CPU (and the device under the control of CPU) in this card is dominant in a reset from the main frame (MPR), and
normally it is only available for software command reset or hardware reset using ASIC (IC2) from MPR. The power on reset cir-
cuit in this card is for the reset of ASIC in a hot plug
Shows the reset class of PRI23/PRI30 card, and shows the reset schematic diagram

Reset Class

A reset schematic diagram

Reset Type

The way of Reset

Specification

Reset to ASIC (IC2) 

OR condition of the following Reset

L active

Power on reset

Reset by the reset IC 
Reset IC specifications
Power Supply voltage: 3.3V
Reset voltage: 2.9V
Reset delay time: 50msec

Over 10msec

Hardware reset from the EC bus

Reset by EC_RST

Over 10msec 

Software reset from the EC bus

Cancel after a given length of time

16cycles after EC_CLK about 2usec

Reset to CPU (IC1)

Software reset from the EC bus

ASIC local reset register control

L  active Over 10msec (up to stable
PLL)

Reset to Flash

Software reset from the EC bus

Same as the reset to LPR

L active Over 500nsec 

Reset to PRI_IC (IC301)

Software reset from the LPR

ASIC port P2[0] control

L active Over 20

µmsec

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This card is supplied +15V power through the backboard connector (90pin) from the power supply unit.
The +15V power supply generates +3.3V via DC/DC converter, and they are fed as the power of circuit in the card.
The +40V power supply is not used due to no feeding to the line.
Shows the system diagram of the power supply.

System diagram of the power supply

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