DOWNLOAD Panasonic WJ-NT104 Service Manual ↓ Size: 1.57 MB | Pages: 38 in PDF or view online for FREE

Model
WJ-NT104
Pages
38
Size
1.57 MB
Type
PDF
Document
Service Manual
Brand
Device
Video Monitoring / NETWORK INTERFACE UNIT
File
wj-nt104.pdf
Date
PREV: Panasonic WJ-MS488E Simplified Service Manual

Panasonic WJ-NT104 Service Manual ▷ View online

– 19 –
CPLD
(RANDOM LOGIC
FOR PLD)
TO
MAIN BOARD
(3/9) (Page 18)
TO MAIN BOARD
(1/9) (Page 16)
TO
MAIN BOARD
(5/9)
(Page 20)
TO
MAIN BOARD
(6/9)
(Page 21)
TO
MAIN BOARD
(9/9)
(Page 24)
<Index>
MAIN BOARD
(4/9)
IC8 A4
IC10 A4
IC11 A2
IC12 C2
TO
MAIN
BOARD
(9/9)
(Page 24)
CNT0
CNT1
CNT2
CNT3
CNT4
CNT5
CNT6
ICCS0
ICCS1
ICCS2
ICCS3
ICCS4
ICCS5
SA0
SA1
SA2
SA16
SA17
SA18
SA19
SA20
SA21
SD0
WP2
WP1
SD1
SD2
SD3
JCNT0
JCNT1
MCNT0
MCNT1
JCNT3
LCNT0
LCNT1
DMA0
DMA1
REG0
REG1
JCNT2
ICCS6
DMA2
DMA3
ICCS8
MCNT0
MCNT1
RAM0
RAM1
RAM2
RAM3
REG4
REG5
DRAM3
WAIT
KEYS[1,0]
REG[1]
JCNT[3:0]
ICCS[0]
CK
SRST
+
-
1
2
14
7
9
8
11
10
13
12
13
12
+5V(4)
+5V(4)
+5V(4)
+5V(4)
+5V
+5V(4)
+5V(3)
5
1
2
3
4
17
I/O0
18
I/O1
19
I/O2
20
I/O3
21
I/O4
22
I/O5
23
I/O6
28
I/O7
29
I/O8
30
I/O9
31
I/O10
32
I/O11
33
I/O12
34
I/O13
35
I/O14
36
I/O15
40
I/O16
41
I/O17
42
I/O18
43
I/O19
44
I/O20
45
I/O21
46
I/O22
47
I/O23
48
I/O24
53
I/O25
54
I/O26
55
I/O27
56
I/O28
57
I/O29
58
I/O30
59
I/O31
67
I/O32
68
I/O33
69
I/O34
70
I/O35
71
I/O36
72
I/O37
73
I/O38
78
I/O39
79
I/O40
80
I/O41
81
I/O42
82
I/O43
83
I/O44
84
I/O45
85
I/O46
86
I/O47
90
I/O48
91
I/O49
92
I/O50
93
I/O51
94
I/O52
95
I/O53
96
I/O54
97
I/O55
98
I/O56
3
I/O57
4
I/O58
5
I/O59
6
I/O60
7
I/O61
8
I/O62
9
I/O63
11
Y0
65
Y1
62
Y2
66
GOE0
87
GOE1
15
RESET
1
NC
2
NC
10
NC
24
NC
25
NC
26
NC
27
NC
49
NC
50
NC
51
NC
52
NC
61
NC
74
NC
75
NC
76
NC
77
NC
39
SDO/IN2
16
SDI/IN0
14
ISPEN
37
MODE/IN1
60
SCLK/IN3
12
VCC
64
VCC
13
GND
38
GND
63
GND
88
GND
99
NC
100
NC
89
NC
C24
C25
C23
0.1
10/10
R53
R55
R54
5.1K
5.1K
5.1K
0.01
R57
R56
0
0
C22
0.1
(TP23)
SD[15:0]
SA[21:16,4:0]
CNT[6:0]
DMA[3:0]
CK,SRST,WAIT,PE[8:4]
DRAM[3]
C21
(4/6)
(5/6)
(6/6)
(1/6)
0.1
R50
10K
L5
IC10
IC10
IC10
IC10
Z41
Z42
R151
10K
10K
10K
R152
R153
R154
R155
R156
PCMCT0
PCMCT1
PCMCT2
PCMCT3
R157
R52
OPEN
R51
OPEN
R195
R196
10K
10K
10K
10K
10K
10K
10K
10K
IC8(6/6)
IC11
(TP24)
(TP25)
(TP26)
(TP27)
(TP28)
(TP29)
IC12
(RD)
(WRH)
(WRL)
(CS0)
(CS1)
(CS2)
(CS3)
(JPGCS)
(SIOCS)
(RTCCS)
(FLSCS)
(ROMCS)
(PCMCS)
(LANCS)
(JPGWR)
(JPGRD)
(LANBW)
(JPXEN)
WAIT
KYS0
KYS1
(ALMCS)
ICCS7
(FLS2CS)
(LANWR)
(LANRD)
(RDWR)
(RS232SW)
(NPSEL)
REG2
REG3(LCD R/W)
(LCD E)
(WE)
(OE)
(WE2)
(OE2)
(ZDREQ)
(ZDACK)
(DACK1)
(DREQ1)
(DACK0)
(DREQ0)
CN19 OPEN
1
2
3
4
VCC
SDO
SDI
ISPEN
CN18 OPEN
1
2
3
MODE
GND
SCLK
+5V
+5V
L18
OPEN
L17
R127
R242 OPEN
R243
R142
10K
OPEN
R128
R129
R130
R131
PE5
PE6
PE7
SA4
SA1
SRST
SA3
SA2
PE8
PE4
CN12 OPEN
CN10 OPEN
CN14 OPEN
CN13 OPEN
VR1 OPEN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VSS
VDD
VO
1
2
3
VDD
VO
VSS
1
2
VLED-
VLED+
RS
R/W
E
DB0
DB1
DB2
DB3
DB4
REG3
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
REG2
DB5
DB6
DB7
1
3
5
7
9
11
13
15
17
19
21
23
25
27
PGA0
PGA1
PGA2
PGA3
PGA0
PGA1
PGA2
PGA3
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
29
31
33
35
37
0
0
0
0
0
39
41
43
45
47
49
51
53
55
57
59
ADR4
ADR3
ADR2
BUSY
EMP
MID
FUL
CH
NC
NC
NC
NC
+5V
+5V
+5V
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
DATA0
RAM[3,0]
LCNT[1,0]
REG[5,0]
MCNT[1,0]
ICCS[5,1]
PGA[3:0]
REG[4]
MCNT[1,0]
ICCS[6]
WP[2,1]
MCNT[1,0]
ICCS[8,4:2]
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
ICCS7
MCNT0
MCNT1
PCMCT0
PCMCT1
PCMCT2
PCMCT3
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
ADR1
PCMCS
RD
WR
DMARD
DMAWR
DACKL
DREQL
RESET
NC
GND
GND
GND
GND
(TP47)
(TP48)
(TP49)
(TP50)
(TP51)
(TP52)
(TP53)
(TP54)
(TP55)
(TP56)
+5V
+5V(3)
1
A
C
D
B
2
3
4
5
6
MAIN BOARD(4/9)
SCHEMATIC DIAGRAM OF MAIN BOARD (4/9)
– 20 –
(16M-BIT)
DRAM 2
(16M-BIT)
EEPROM
(4M-BIT)
DRAM 1
RESET
RTC
(8M-BIT)
FLASH ROM 1
(8M-BIT)
FLASH ROM 2
TO
MAIN BOARD
(4/9)
(Page 19)
TO
MAIN BOARD
(3/9)
(Page 18)
MAIN BOARD
(5/9)
<Index>
IC13 D2
IC15 D5
IC19 B4 
IC20 B4
IC39 B2
IC42 B5
D9 B3
D10 A3
D11 A3
TO
MAIN BOARD
(2/9)
(Page 17)
TO
MAIN
BOARD
(6/9)
(Page 21)
TO
MAIN BOARD
(9/9)(Page 24)
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SD15
RAM[3:0]
WP[2,1]
MCNT[1,0]
ICCS[8,4:2]
SD[15:0]
SA[20:1]
DRAM[2:0]
FLS1R8,FLS2R8,SRST
SD14
SD13
SD12
SD11
SD10
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
SA11
SA12
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
SA1
SA2
SA3
SA4
SD0
SD1
SD2
SD3
DRAM0
DRAM1
DRAM2
MCNT1
MCNT0
SD15
SD14
SD13
SD12
SD11
SD10
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
DRAM0
DRAM1
DRAM2
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
RAM0
RAM1
RAM2
RAM3
ICCS2
ICCS4
MCNT0
+
-
+
-
5
VCC
3
OUTC
7
VSA
6
V/*RES
1
CT
8
*RES
4
GND
2
VSC
32
31
30
29
28
27
24
23
22
1
6
45
15
16
36
49
48
47
46
44
43
42
41
10
9
8
7
5
4
3
2
18
34
35
17
33
21
50
11
40
20
19
26
25
+
-
+5V
+5V
+
-
15
CS1
2
CS0
7
A3
6
A2
5
A1
4
A0
11
D3
12
D2
13
D1
14
D0
18
VDD
17
(VDD)
16
(VDD)
3
ALE
1
STD.P
9 GND
8
RD
10
WE
+5V
+5V(5)
+5V(5)
+5V(5)
+5V(5)
32
31
30
29
28
27
24
23
22
1
6
45
15
16
36
49
48
47
46
44
43
42
41
10
9
8
7
5
4
3
2
18
34
35
17
33
21
50
11
40
20
19
26
25
5
8
9
10
12
13
14
15
16
18
19
40
1
11
30
4
34
33
32
31
29
28
27
26
21
2
20
39
38
37
36
35
25
24
23
22
17
7
6
3
C28
0.1
C29
10/10
C26
0.1
C27
10/10
Z26
100
Z27
100
Z28
100
Z29
100
C47
10K
10K
0.1
C48
0.1
C49 0.1
10K
3.9K
110
270
R113
R114
R115
R116
R117
R118
L6
IC13
IC20
D9
D10
D11
Z44
100
Z45
100
Z46
100
Z47
100
C109
0.1
C108
10/10
L19
L45
BA
T1
IC19
IC39
IC14 OPEN
RAS
UCAS
LCAS
WE
OE
I/O15
I/O14
I/O13
I/O12
I/O11
I/O10
I/O9
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
VCC
VCC
VSS
VSS
NC
NC
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
NC
NC
A9
NC
NC
VSS
VCC
RAS
UCAS
LCAS
WE
OE
I/O15
I/O14
I/O13
I/O12
I/O11
I/O10
I/O9
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
VCC
VCC
VSS
VSS
NC
NC
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
NC
NC
A9
NC
NC
VSS
VCC
CE
OE
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
VCC
VPP
VSS
VSS
(RAS)
(CASH)
(CASL)
(WE)
(OE)
(RAS)
(CASH)
(CASL)
(WE2)
(OE2)
(ROMCS)
(RD)
(WRL)
(RD)
(RTCCS)
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SD15
SD14
SD13
SD12
SD11
SD10
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
SA19
MCNT1
WP1
WP2
MCNT0
SA1
SA20
SRST
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SD14
SD13
SD12
SD11
SD10
SD9
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
MCNT0
MCNT1
ICCS3
SA19
SA20
SD15
ICCS8
SA18
FLS2R8
FLS1R8
SRST
+
-
+
-
16
17
48
1
2
3
4
5
6
7
8
18
19
20
21
22
23
24
25
12
15
26
28
11
47
13
14
45
43
41
39
36
34
32
30
44
42
40
38
35
33
31
37
29
27
46
9
10
+5V(5)
+5V(5)
+5V(5)
+5V(5)
16
17
48
1
2
3
4
5
6
7
8
18
19
20
21
22
23
24
25
12
15
26
28
11
47
13
14
45
43
41
39
36
34
32
30
44
42
40
38
35
33
31
37
29
27
46
9
10
C30 0.1
C31 10/10
R58
0
R59
10K
10K
R108
C112
0.1
C113 10/10
R160
10K
R247
OPEN
R245
OPEN
R244
OPEN
R162
10K
R161
0
Z57
Z56
Z55
Z54
IC42
Z50
Z51
Z52
Z53
22
22
22
22
22
22
22
22
R246
OPEN
IC15
RESET
WE
BYTE
NC
NC
VCC
NC
NC
VSS
VSS
OE4
RY/BY
CE
OE
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
DQ15/A-1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
RESET
WE
BYTE
NC
NC
VCC
NC
NC
VSS
VSS
OE4
RY/BY
CE
OE
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
DQ15/A-1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
(FLS2CS)
(RD)
(WRL)
(FLSCS)
(RD)
(WRL)
+5V(5)
+5V(5)
+5V
MAIN BOARD(5/9)
1
A
C
D
B
2
3
4
5
6
SCHEMATIC DIAGRAM OF MAIN BOARD (5/9)
– 21 –
CN7
RS-232C
PORT
RS-232C
RS-232C
DRIVER/
RECEIVER
LAN
(ETHERNETCONTROLLER)
10BASE-T
PORT
ETHERNET
CN5
UART
(SERIAL CONTROLLER)
CLOCK
GENERATOR
TO
MAIN BOARD
(3/9)
(Page 18)
TO
MAIN BOARD
(4/9)
(Page 19)
TO
MAIN BOARD
(9/9)
(Page 24)
MAIN BOARD(6/9)
<Index>
IC10 B5,C3
IC16 B1
IC17 D2
IC22 B5
IC38 D6
IC44 A5
D5 C3
TO
MAIN
BOARD
(5/9)
(Page 20)
TO
MAIN
BOARD
(9/9)
(Page 24)
SA1
SA2
SA3
MCNT0
MMCD
MMRS
MMRD
MMDR
MMCS
MMER
MMSD
MMCD
MMRS
MMRD
MMDR
MMCS
MMER
MMSD
MMCD
MMRS
MMRD
MMDR
MMCS
MMER
MMSD
MCNT1
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
ICCS1
REG5
4
VDD
3
OUT
1
COUT
2
GND
+
-
+
-
4
4I
3
3I
2
2I
1
1I
5
4O
6
3O
7
2O
8
1O
9
GND
10
GND
-
+
1
2
3
4
5
6
7
8
9
+5V
+5V
+5V
5
1
2
3
4
+5V(5)
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
25
24
23
22
21
20
19
18
17
16
15
30
29
31
14
15
9
8
7
6
5
4
3
2
24
20
39
25
21
28
16
32
26
27
33
11
13
40
41
42
43
35
38
36
37
10
17
18
19
44
22
1
12
23
34
4
4I
3
3I
2
2I
1
1I
5 4O
6
3O
7
2O
8
1O
9
GND
10
GND
C50 0.1
C51 0.1
X3
(7.37MHz)
L9
C54
0.1
C58
0.1
C59
OPEN
C60
2.2/50
C57
0.22/50
C52
0.1
C56
OPEN
CF3
C107
10/10
C53
C55
0.1
0.1
51
R169
OPEN
R229
MSI0
L32
R119
OPEN
R120
R121
OPEN
OPEN
Z62
DSW9
FRONT
Z63
22
22
R202 OPEN
C131 0.1
L37
CN7
IC44
IC22
IC38
CF2
NC
DD
GND
RX5OUT
D3IN
RX4OUT
RX3OUT
RX2OUT
D2IN
RX1OUT
D1IN
C2+
C2-
V-
NC
ON/OFF
RX5IN
D3OUT
RX4IN
RX3IN
RX2IN
D2OUT
RX1IN
D1OUT
C1-
C1+
VCC
V+
XIN
XOUT
BAUDOUT
RCLK
DTR
RTS
OUT1
OUT2
RI
DCD
DSR
CTS
SOUT
SIN
INTR
TXRDY
DDIS
RXRDY
VDD
VSS
CS2
ADS
WR
RD
MR
WR
RD
D0
D1
D2
D3
D4
D5
D6
D7
CS1
CS0
A0
A1
A2
NC
NC
NC
NC
(CN20)
MSG
MCD
MRD
MSD
MER
MDR
MSR
MCS
MCI
(REAR PANEL)
(RS232SW)
(CN20:
IC SOCKET)
(RD)
(WRL)
(SIOCS)
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
SA0
SA1
SA2
SA3
LCNT0
LCNT1
LCNT[1,0]
REG[5,0]
MCNT[1,0]
ICCS[5,1]
SD[15:0]
SA[3:0]
INTR[2,1]
SRST,MSI[0]
REG0
ICCS5
INTR1
INTR2
3
4
5
6
1
2
3
4
5
16
15
14
12
8
7
6
13
9
10
11
+
-
GDVI
+5V(6)
+5V
+5V(6)
1
2
3
4
5
6
7
8
5
1
2
3
4
+5V(6)
+5V(6)
+5V(6)
+5V(6)
+5V(6)
+5V
54
49
48
47
46
45
44
43
42
41
39
38
37
36
35
34
33
32
30
29
28
26
27
51
52
53
17
16
15
14
12
11
10
9
65
64
63
62
60
59
58
57
67
3
1
99
98
6
7
4
5
92
93
96
72
71
70
69
19
20
22
23
55
95
25
73
81
91
90
80
88
89
77
75
74
76
87
86
83
82
85
84
79
78
13
21
40
61
100
2
8
18
31
56
66
94
50
24
68
97
R60
10K
R61
10K
R62
10K
R63
10K
X2
(20MHz)
C33
33P
CT2
OPEN
C34
33P
R64
10K
C40
0.01
C41
0.01
C42
0.01
C35
0.01
C36
0
.01
C37
0.01
D5
R67
680
R68
24K
R69
0
R170
OPEN
R171
OPEN
R73
OPEN
R172
OPEN
R71
0
R70
0
R72
0
C38
0
.01
C39
0
.01
C128
0.01
C126
OPEN
C127
OPEN
C32
0.1
C43
0.01
C44
0.01
C45
10/10
C144
+
-
10/10
C143
0.01
(2/6)
(3/6)
L7
CF1
L8
IC10
IC10
Z58
Z59
Z60
Z61
100
100
100
100
R215
1K
R220
SRST
R221
R222
R223
0
0
0
0
R216
R217
R218
R219
OPEN
OPEN
OPEN
OPEN
R238
0
C141
C140
C139
C142
56P
56P
56P
56P
CN5
IC16
1/2W
IC17
TX11
TX12
TX13
TX14
TX15
RX01
RX02
RX03
RX04
TX01
TX02
TX03
NC
RX11
RX12
RX13
AEN
A19/nCE1
A18
A17
A16
A15
A14
A13
A12
A11/nFCS
A10/nFWE
nTXLED/nTXEN
nRXLED/NRXCLK
nLNKLED/TXD
nBSELED/RXD
INTR0/nLREQ
INTR1/nINPACK
INTR2
INTR3
TXLED
RXLED
LNKLED
IOCHRDY/nWAIT
nROM/nPCMCIA
AVDD
AVDD
AVDD
nIOCS16/nIOIS16
nSBHE/nCE2
BALE/nWE
nIORD
nIOWR
nMEMR/nOE
D15
D14
D13
D12
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D11
D10
RBIAS
AGND
AGND
AGND
TPERXP
TPERXN
COLP
COLN
TPETXP
TPETXN
TPETXDP
TPETXDN
RECP
RECN
TXP/nCOLL
TXN/nCRS
VDD
VDD
VDD
VDD
VDD
RESET
ENEEP
IOS2
IOS1
IOS0
EECS
EESK
EEDI
EEDO/SDOUT
GND
GND
GND
GND
GND
GND
GND
GND
VDD
XTAL1
XTAL2
nXENDEC
nEN16
PWRDWNTXCLK
(LANWR)
(LANRD)
TD+
TD-
RD-
RD+
(LANBW)
(LANCS)
(SIOINT)
(LANINT)
+
-
+5V(5)
+5V
1
A
C
D
B
2
3
4
5
6
MAIN BOARD(6/9)
SCHEMATIC DIAGRAM OF MAIN BOARD (6/9)
– 22 –
IN1
OUT1
IN2
OUT2
IN3
OUT3
IN4
OUT4
CN401-404
VIDEO INPUT CONNECTORS,
VIDEO OUTPUT CONNECTORS
VIDEO
VIDEO 1
OUTPUT
SWITCH
VIDEO 2
OUTPUT
SWITCH
VIDEO 3
OUTPUT
SWITCH
VIDEO 4
OUTPUT
SWITCH
VIDEO 1 OUTPUT DRIVER/INPUT BUFFER
VIDEO 2 OUTPUT DRIVER/INPUT BUFFER
VIDEO 3 OUTPUT DRIVER/INPUT BUFFER
VIDEO 4 OUTPUT DRIVER/INPUT BUFFER
TO
MAIN
BOARD
(8/9)
(Page 23)
MAIN
BOARD
(7/9)
<Index>
IC401 D2
IC402 C2 
IC403 B2 
IC404 A2 
IC409 A5,B5,
 C5,D5
Q401 D4
Q402 D4 
Q403 D5 
Q404 D5
Q405 D6
Q406 C4
Q407 C4
Q408 C5
Q409 C5 
Q410 C6
Q411 B4
Q412 B4
Q413 B5
Q414 B5
Q415 B6
Q416 A4
Q417 A4
Q418 A5
Q419 A5
Q420 A6
D401 D4
TO
MAIN
BOARD
(9/9)
(Page 24)
1-2
3-4
5-6
7-8
ACTIVE
PASSIVE
JAVCAM
PIN CONNECTION OF
(JUMPER:USE THE SHORT CONNECTOR(CN101))
 CN406-409
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
JUMPER
JUMPER
JUMPER
JUMPER
N
N
N
N
N
N
N
N
Q402
R406
R407
Q403
R408
R409
Q404
R410
R412
R413
R414
R415
C406
Q405
R416
Q406
Q407
R420
R421
Q408
R422
R423
Q409
R424
R426
R427
R428
R429
Q410
R430
Q411
Q412
R434
R435
Q413
R436
R437
Q414
R438
R440
R441
R442
R443
Q415
R444
Q416
Q417
R448
R449
Q418
R450
R451
Q419
R452
R454
R455
R456
R457
Q420
R458
68
68
68
68
4.7K
1K
15K
1.5K
1.5K
1.5K
2.2K
2.2K
2.2K
2.2K
470
470
470
470
6.8K
6.8K
6.8K
6.8K
0.1
33K
33K
33K
33K
100
100
100
100
6.8K
6.8K
6.8K
6.8K
3.9K
3.9K
3.9K
3.9K
1K
1K
1K
1K
C405
C404
C403
C402
0.1
10/10
10/16
0.022
C411
L402
C410
10/16
C416
L403
C415
10/16
C421
L404
C420
10/16
IC402
C407 0.022
C409
10/10
R417
C408
0.1
C412 0.022
C414 10/10
R431
C413
0.1
IC404
C417 0.022
C419 10/10
R445
C418
0.1
43
43
43
43
R401
R404
R405
Q401
C401
L401
D401
R460
75
CN407
R461
75
R462
75
R463
75
100/16
100/16
100/16
100/16
CN402
CN403
CN404
100/16
100/16
100/16
100/16
L405
L406
L407
L408
470/10
470/10
470/10
470/10
47/16
47/16
47/16
47/16
C425
C426
C427
C428
C429
C430
C431
C432
C433
C434
C435
C436
0.1
C437
L409
VIP[4:1],DATA[4:1]
VIN[4:1],ERV[4:1],
CTLV[4:1]
VIP1
DATA1
VIN1
VIP2
DATA2
VIN2
VIP3
DATA3
VIN3
VIP4
DATA4
VIN4
ERV[4:1]
CTLV[4:1]
L410
L411
L412
CN408
C439
22/16
C438
OPEN
R468
R469
R470
R471
75
75
75
IC409
IC409
IC409
IC409
(3/6)
(2/6)
(1/6)
(4/6)
75
CN409
L414
L415
L416
L417
L419
L420
L421
L422
CN401
IC403
IC401
CN406
-
+
-
+
-
+
-
+
1
4
6
8
2
3
7
5
1
4
6
8
2
3
7
5
2
3
6
1
5
7
4
8
1
2
4
3
5
1
2
4
3
5
1
2
4
3
5
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-+
-
+
-
+
2
3
6
1
5
7
4
8
+
-
1
2
14
7
3
4
5
6
9
8
2
3
6
1
5
7
4
8
1
2
4
3
5
A+5V
+9V
1
4
6
8
2
3
7
5
A+5V
A+5V
A+5V
A+5V
1
4
6
8
2
3
7
5
A+5V
+9V
A+5V
+9V
A+5V
+9V
2
3
6
1
5
7
4
8
IN1
IN2
IN3
VOUT
VCC
GND
CTLA
CTLB
IN1
IN2
IN3
VOUT
VCC
GND
CTLA
CTLB
IN1
IN2
IN3
VOUT
VCC
GND
CTLA
CTLB
IN1
IN2
IN3
VOUT
VCC
GND
CTLA
CTLB
CTLV1
CTLV2
CTLV3
CTLV4
ERV1
ERV2
ERV3
ERV4
+9V
A+5V
MAIN BOARD(7/9)
1
A
C
D
B
2
3
4
5
6
SCHEMATIC DIAGRAM OF MAIN BOARD (7/9)
Page of 38
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