Panasonic BB-HCM547CE Service Manual ▷ View online
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BB-HCM547CE
4 Technical Descriptions
4.1.
CPU Peripheral Block
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BB-HCM547CE
[IC 101 peripheral]
• The function of the IC101 is a system LSI for a network camera containing the CPU
• The power supply voltages are +3.3 V (IO) and +1.2 V (inside) and there are two power supply.
• The function of the CPU is hardware control, TCP/IP protocol processing and applications performance such as HTTP and FTP.
• The clock setting is 27 MHz, 48 MHz, 54 MHz and 108 MHz by inside, which multiply 48 MHz oscillation in the X101 by PLL.
• There are two types of external bus: the General-purpose bus and the bus for SDRAM only.
• The General bus is connected to a Flash Memory for program storage.
• The capacity of the Flash Memory (IC102) is 64Mbit (4 M x 16 bit); the program, the setting information for the network camera
• The power supply voltages are +3.3 V (IO) and +1.2 V (inside) and there are two power supply.
• The function of the CPU is hardware control, TCP/IP protocol processing and applications performance such as HTTP and FTP.
• The clock setting is 27 MHz, 48 MHz, 54 MHz and 108 MHz by inside, which multiply 48 MHz oscillation in the X101 by PLL.
• There are two types of external bus: the General-purpose bus and the bus for SDRAM only.
• The General bus is connected to a Flash Memory for program storage.
• The capacity of the Flash Memory (IC102) is 64Mbit (4 M x 16 bit); the program, the setting information for the network camera
and the MAC address are stored.
• Two SDRAMs (IC103/104) of 128 Mbit (8 M x 16 bit) are used, which are connected to CPU with bus width of 32bit, and are
available for CPU processing work, storage of communication data, and storage of audio/image data.
• The RESET IC (IC106) monitors the power supply voltage, detects the rising edge of +3.3 V and generates the Hardware Reset
Signal.
• IC602 is RTC (Real Time Clock), and is used for time setting of image transfer, etc. This is backed up by a lithium battery
(BAT601) even at the time of power OFF. I2C Bus is used as I/F with CPU.
• There is an RTC block inside IC101, and this inside RTC block operates during the existence of electricity by importing the clock
data from IC602 at the time of power ON.
• IC101 is equipped with the GPIO terminal, which is used for input and output signal of motor control and IO terminal control, etc.
• An SD memory card control block is included on IC101, and used by connecting an SD card slot (CN602).
• There is a green LED (LED101) near the SD card slot, and it lights while the SD card is being accessed.
• When the FUNCTION switch(SW102) is pressed, since LED(LED 601) is turned off and the SD card access stop, and it can be
• An SD memory card control block is included on IC101, and used by connecting an SD card slot (CN602).
• There is a green LED (LED101) near the SD card slot, and it lights while the SD card is being accessed.
• When the FUNCTION switch(SW102) is pressed, since LED(LED 601) is turned off and the SD card access stop, and it can be
safely pulled out.
[Power LED control]
Red and green LEDs are used in the Power LED (LED901) indicator on the LED board. LEDs are turned on, blinked or turned
off by turning ON/OFF the transistors (Q901 and Q902) that are connected to the LEDs. The transistors are turned ON/OFF
from the output port of the CPU (IC101) on the Main board.
off by turning ON/OFF the transistors (Q901 and Q902) that are connected to the LEDs. The transistors are turned ON/OFF
from the output port of the CPU (IC101) on the Main board.
LED_R
LED_G
Q901
Q902
LED COLOR
H
H
ON
ON
Orange
H
L
ON
OFF
Red
L
H
OFF
ON
Green
L
L
OFF
OFF
OFF the light
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BB-HCM547CE
4.2.
Camera Block (Image signal processing, LENS control)
[VIDEO Board]
• IC201 is a MOS type image sensor of approximately 370 thousand pixels, which outputs the image signal (M_OUT) of an VGA
(640x480) size.
• IC202: This IC is to remove noise in the M_OUT signal, adjust the gain and output the 12-bit data (D_OUT[11:0]).
IC202 includes TG (Timing Generator) generation function of the MOS image sensor (IC201), synchronizing signals genera-
tion function (PCLK, VD and HD), noise removal (CDS: correlative double sampling) function of image signal (M_OUT) and
12-bits A/D conversion function.
The pixel clock (PCLK), synchronizing signal (VD and HD) and 12-bit data (D_OUT [11:0]) that are output from the IC202 are
input into the LVDS Transmitter IC on IC203, and after being parallel-serial converted, they are converted into the two-wire
differential signals. Then the signals are transmitted to the LVDS Receiver IC (IC604) on the Main board. In the LVDS
Receiver IC (IC604), the signals are then serial-parallel converted to recover the pixel clock and the 12-bit data, which are
output to the CPU (IC101). (Refer to Fig. 1.)
tion function (PCLK, VD and HD), noise removal (CDS: correlative double sampling) function of image signal (M_OUT) and
12-bits A/D conversion function.
The pixel clock (PCLK), synchronizing signal (VD and HD) and 12-bit data (D_OUT [11:0]) that are output from the IC202 are
input into the LVDS Transmitter IC on IC203, and after being parallel-serial converted, they are converted into the two-wire
differential signals. Then the signals are transmitted to the LVDS Receiver IC (IC604) on the Main board. In the LVDS
Receiver IC (IC604), the signals are then serial-parallel converted to recover the pixel clock and the 12-bit data, which are
output to the CPU (IC101). (Refer to Fig. 1.)
• Oscillation frequency of the IC202 is 17.172MHz and the clock signal is generated with the use of the crystal oscillator (X201).
• The IC202 is controlled by the serial signals (CS_AFE, SDI, and SCL) in the CPU (IC101).
• The IC202 is controlled by the serial signals (CS_AFE, SDI, and SCL) in the CPU (IC101).
The SDI and SCL signals in the serial signals are shared and used in the DA converter (IC903) mounted on the LENS board.
(Refer to Fig. 2.)
(Refer to Fig. 2.)
• Hard reset (RESET) of IC202 is controlled by GPIO of IC101 on the Main board.
• The power supplies used in the camera block are made +5.6V into +5.0V by the IC206 and are made +5.0V into +3.1V by the
• The power supplies used in the camera block are made +5.6V into +5.0V by the IC206 and are made +5.0V into +3.1V by the
IC204 supplied from the main board.
Figure 1 Video Signal Transmission via LVDS
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BB-HCM547CE
Figure 2 Sharing of Serial Signals (SDI and SCL)
[Main Board]
• Pixel clock (PCLK: 17.172MHz), 12-bit RAW (AFE_D[11:0]) and synchronizing signal (AFE_VD and AFE_HD) that are output
from the IC202 are transmitted to the LVDS Receiver IC (IC604) on the Main board via the LVDS Transmitter. They are serial-
parallel converted in the LVDS Receiver IC (IC604) and are output recovered the pixel clock (CCDCLK), 12-bit RAW data (CCD
[11:0]) and synchronizing signal (CCDCLK and CCDHD) into the CPU (IC101).
parallel converted in the LVDS Receiver IC (IC604) and are output recovered the pixel clock (CCDCLK), 12-bit RAW data (CCD
[11:0]) and synchronizing signal (CCDCLK and CCDHD) into the CPU (IC101).
• In the VIDEO SIGNAL Processor block incorporated in IC101, the RAW data is subjected to such signal processing as OB
clamping, white balancing, and
γ
processing, then the RAW data is temporary recorded in the external SDRAM. The RAW data
is subjected to the three-step processing that is composed of pixel correction, YC generation and scaling, and the data after the
processing is recorded in the same external SDRAM as the image data.
processing is recorded in the same external SDRAM as the image data.
• The serial control signals (SDI, SCL and CS_AFE) from the CPU (IC101) on the main board are sent to the AFE/TG IC (IC202)
on the VIDEO board via CN651.
[LENS Board]
Camera has 2.3 X optical zoom lens. This lens unit has the ZOOM lens drive motor and the IRIS unit. These components are
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