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controlled from the CPU (IC101) on the main board. 

The CPU controls the ZOOM motor drive driver (IC303) mounted on the LENS board by drive timing signal (Z_1, Z_2 and
Z_END) of the ZOOM motor. The output current, pulse period, and the number of pulses are also set up by the driver. This
ZOOM motor drive driver (IC303) controls phase two excitation for the ZOOM lens drive motor. The power supply for motor drive
is used +3.3 V supplied via the Reg. IC (IC208) from +5.6 V supplied via the VIDEO board. 

The IRIS has been adjusted in the factory and the adjusted values are saved in the EEPROM memory (IC204) on the video
board. The adjusted values and the control values are written in the DA converter (IC302) on the LENS board in the initialization
process when the power is turned ON and each V cycle. No subsequent process to write the data into the DA converter will be
carried out. Once the adjusted values are written in the DA converter, the output voltage from the DA converter can be con-
trolled. The DA output is applied in the IRIS control circuit.

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• Image compression (JPEG/MPEG-4 encode) function, memory control unit (MCU), ETHERNET MAC and SD card controller are

built into IC101.

• Picture data input from the camera block is captured in SDRAM (1).
• Captured image data is input to the ZOM block, where the scaling of the image size is done, (an image size of 640 x 480, 320 x

240, or 192 x 177 is generated from the one with the size of 1280 x 1024, or an image size of 320 x 240 or 192 x 177 from the
one with the size of 640 x 480), and is stored in SDRAM again (2).

• The scaled image data is input to the JPEG/MPEG-4 encode section of IC101, and the image is compressed. The compressed

image data is stored in SDRAM again (3).

• After CPU processed the compressed image data for a communication protocol, the data is forwarded to the network via ETH-

ERNET MAC and ETHERNET PHY. And the image data of post-compression is processed for a file and is recorded on the SD
card.

• As for the video output, the captured image data is scaled to a size of NTSC or PAL at the ZOM block, and then it is output from

VIDEO OUT and DAC sections as an analog video signal.

• This analog video signal is amplified by the video amplifier (IC601) and output from CN506 on the IO board with the output

impedance of 75Ω.

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The audio circuit is mounted on the IO board, and included the internal MIC terminal (MIC901) and the external MIC terminal
(CN504) as the audio input and included the SP terminal (CN505) as the audio output, and supports one channel respectively
for audio input of the microphone and audio output from the camera. The internal MIC (MIC901) audio signal is mounted on the
LED board, and is connected with the PCM codec (IC531) via CN901

→CN505.

When the audio is output from the camera, the audio output become possible that external speaker is connected with the SP
terminal.

ALC Amplifier (IC532/533)
Power Supply: 3.3 V
Amplifier for Auto Level Control

PCM Codec (IC531)
Power Supply Voltage: 3.3 V
Clock Frequency: Contains a built-in PLL function and generates a clock from the BCLK (256 KHz).
That contains an amplifier, LPF, gain adjustment, AD/DA converter, host I/F, PCM serial I/F and speaker output function.

Flow of audio Signal
[Microphone audio]

1. Ordinarily microphone audio is selected internal MIC audio, the audio signal, after being amplified by the amplifier in the PCM

codec (IC531) and by the ALC (IC532), is applied to the PCM codec (IC531) again. When the input audio signal level exceeds
a certain level, the ALC (IC532) changes the gain to keep the output signal level constant and to constrain the distortion in the
voice. 
On the other hand, when the external microphone connect with CN504, the audio signal, after being amplified by the amplifier
in the PCM codec (IC531) and by the ALC (IC533), is applied to the PCM codec (IC531) again. And the MIC changeover
detection signal send the CPU, is switched the audio signal from the internal MIC to the external MIC in CPU codec (IC531). 

2. In the PCM Codec (IC531), by a register setting from the host, amplification, AD conversion and gain adjustment are per-

formed. 
The sampling frequency of the A/D conversion is 8kHz and it is converted to the PCM in the format of 8bit and 

µ law. Then,

64kbps data are output to the IC101 on the Main board through the Serial I/F.
The data transfer of the Serial I/F is BCLK (256 kHz).

3. The data compression of 32 kbps is performed in the ADPCM Block inside of the IC101 and the data transferred as audio

data.

[Speaker audio]

1. The ADPCM audio data are sent from the PC and, after data decompression in the ADPCM block of the CPU (IC101), the

data are transferred as the audio data of 64 kbps to the PCM Codec (IC601) through the Serial I/F.

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2. After the 

µ law to linear conversion, amplification and DA conversion, they are output as audio output signal in the PCM

Codec (IC531). 

Composed of ETHERNET MAC Block inside of the IC101 and the IC171 (ETHER-PHY) on the Main board, and the T531
(Transformer) and the CN502 (RJ45 jack) on the IO Board.
The T531 (Transformer) obtains isolation between the Set and the Ethernet.
ETHERNET MAC and the IC171 (ETHER-PHY) are connected by a signal called MIIBus and it makes Ether net data sending
and receiving possible.

[Sending]
The communication data sent from the IC101 is converted to Ethernet signal (100Base-Tx, 10Base-T) at the IC171 and sent
from the CN502 through the T531.

[Receiving]
The Ethernet signal received from the CN502 is converted to the communication data at the IC171 and received to the IC101.