DOWNLOAD LG 50PB2DR-AC (CHASSIS:PB61C) Service Manual ↓ Size: 23.48 MB | Pages: 76 in PDF or view online for FREE

Model
50PB2DR-AC (CHASSIS:PB61C)
Pages
76
Size
23.48 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / Plasma
File
50pb2dr-ac-chassis-pb61c.pdf
Date

LG 50PB2DR-AC (CHASSIS:PB61C) Service Manual ▷ View online

- 17 -
10-3. Steps to Download S/W
(1) Insert PASSWORD of the model in the activated window.
(Do not insert password for 50PB2DR-AC for which
password is not assigned.)
(2) Press ‘d’ to open Debug Main Menu.
(3) Input f0 and then 1.
(4) Select a program from the following window to download S/W.
(5) Go to the folder where the file is and check the name and
extension of the file. Then, select the file and click “Open”.
(Find an ‘****.epk’ file which you want to download and
select it.)
(6) The download process is shown. (It takes around 5
minutes to finish downloading S/W.)
(7) Once the Programming Flash process is successfully
finished, TV Set automatically reboots.
* Check the version of the downloaded file and press
INSTOP. (when the version is incorrect, you need to
download the correct one)
10-4. How to Download manually
- You can download manually when you failed to access the
download menu because DTV Set did not provide proper
communication feature.
(1) Set the Networking configuration of the Download Program
in the same way as mentioned above.(You do not need to
change the settings when downloading was successful.)
(2) Connect PC to DTV via Serial Port and turn on the TV
while pressing ‘1’ key on your Keyboard.
(3) If you see the following window on the screen, you
successfully accessed the Manual Download mode.
(4)Then, select 1, Flash Download (Serial), as shown in
‘Steps to Download’ 10-3 (3) and follow the steps as
mentioned above.
- 18 -
* Due to the H/W features, the screen displays nothing but
black during the download via Serial Port (RS-232C).
11. Check the adjustment of the plant
shipping mode
: This adjustment is checking the set state after take a
adjustment of examination, check state of this model as
shown below pressing the IN_STOP button on the
adjustment Remote Controller.
1
2
3
4
5
6
7
8
9
10
Digital
30
Off
16:9
1
Dynamic
Cool
Off
Auto
Standard
Off
0
On
On
--
Off
Off
Off
16:9
Off
Normal
Off
C0, C5, C6, S11,
C20, C35, C52, C68
C43
Item
Condition
No
Remark
Input Mode
Volume Level
Mute
Aspect Ratio
SET ID
Picture  PSM
Color Temp.
Advanced
Cinema
Black level
Sound
SSM
AVL
Balance
TV Speaker
Time
Auto Clock
Manual Clock
Off Timer / On Timer
Sleep Timer / Auto Off
Option
Sub title
Child Lock
ARC
Demo
ISM Method
Low Power
Channel Memory    Analog
Digital
- 19 -
BLOCK DIAGRAM & TROUBLE SHOOTING GUIDE
1. Australia PVR Audio
(1) Block Diagram
Australia PVR
  BLOCK DIAGRAM
      
MUX
CPLD
Side AV_2
V,LR
3
Rear AV_1
V, LR
3
Rear S_1
YC
2
Side S_2
YC
2
MNT_V_Out
M_MSP
4440
AV_L/R_OUT
LR
2
IN1
OUT2
OUT1
OUT1
TV
IN4
IN1
IN4
IN5
OUT3
RGB-PC
5
RGBHV
Comp_1
YCbCr
3
uCom
(MTV416)
IN2
IN3
IN4
CXA2069
Comp_1
LR
2
656 Data[0:7]
TP/D1
8
OR1
OR2
YCbCr
30
FID
Video
Decoder
(UPD64015)
X-tal
(24.
576M)
H,V
ADC /
HDMI Rx
(MST3361)
3
YCbCr
RF
SPLITTER
ANT.
KIA7029
74LCX244
Reset
H, V, DE
RGB
30
3
DCLK
LVDS Tx
.
(THC63LVD103)
TX[0:4]
10
VCXO
27Mhz
LGDPLL
HD2_VDP
Clk
HD2_SYS
_CLK
RS-232C
(ST3232)
HDMI_SPDIF
SPDIF
SYS
CPLD
I2C Hub
(PCA9516)
IIC 1
EN[0:3]
CPU [PPC 405GPr]
- SDRAM Controller - Peripheral Controller  - Local BUS I/F - Serial(2), GPIO, I2Cr
1.8V
Reg.
EEPROM
(AT24LC512)
MNT_Out
LR
2
LR
2
Comp_2
LR
2
RGB(Phone)
LR
2
I2S Out
3
HD-2.4
ANALOG_L/R
HD2_MAIN_PWM
SPDIF_OUT
AUDIO ADC
(CS5331)
I2S In
3
PWM
MODULATOR
(NSP2100A)
I2S, MCLK
PWM AMP
(TAS5122)
PWM1 L,R
BUFFER
(MC33078)
HDMI
SPDIF
IIC 1
0 x
C
0
IIC 1
0 x
C
2
IIC 2
0 x
B
8
IIC 2
0 x
B
A
IIC 1
0 x
A
6
IIC 4
0 x
6
C
IIC 4
0 x
9
0
IIC 2
IIC 3
IIC 4
IIC 4
0 x
8
4
Video SW
(CXA2181)
HV
2
Main
Sound Proc
(MSP4450K)
IIC 4
0 x
8
0
(Main)
(Sub)
PVR SoC
(LGDT1303)
TP_IN[0:7],
CLK,SOP
VAL,ERR
TP_OUT[0:7],
CLK,SOP,VAL
       HD-2.4
-TP De-Mux
- MPEG Decoding : MP@HL
-Format Converter
-Host I/F, Memory I/F 
-Digital I/F
-NTSC Encoder
-AC-3 Decoder/SPDIF In/out
-IEP2
HD2_NT2CLK
PVR_SYS_CLK
EPLD_CLK
HD2_IEC958_OUT
SDRAM
32MByte 
(8MB x4)
Peripheral Bus
64-Bit I/F
Control GPIO
Peripheral Bus
DDR
32Mb
SATA I/F
(SiI3512)
X-tal
(25M)
TX/RX P1,N1
TX/RX P2,N2
PCI Bus
PCI Bus
IIC 3
0 x
5
0
Flash Memory
16MB(8MBx2)
32Bit Bus I/F
IN3
IN6
HD2_CVBS_OUT
CXA2069
EPF_L/R
A/V SW
(CXA2069)
HD2_CVBS_OUT
HD-2
SDRAM 
64MB(32MBx2)
PWM AMP
(TAS5122)
2
2
SDRAM
2
S_MSP
4458G
IIC3
0x12
656CLK
656_CLK
656_IN[0-7],
CLK
BSS83 BSS83
8
2
RXD[0:2]
–, RXCLK
DDC(I2C)
RESET
EEPROMEEPROM
8
RXD[0:2]
–, RXCLK
DDC(I2C)
EEPROMEEPROM
BSS83 BSS83
MC14053
VCXO
33.33Mhz
CY2309SC
CPU_CLK
PCI_CLK_PVR
PCI_CLK_SATA
HD2_IEC958_IN
HD2_DAC_SCK
/LRCK
SPDIF Receiver1.
(CS8415A)
8
Tuner 1
TDFC-G336P
(DVB-T/PAL)
I2S
TTX
Decoder
(SDA6001)
SIF
Video
Decoder
(UPD64015)
X-tal
(24.
576M)
SYS
CPLD
OR3
IIC 2
0 x
9
C
M_MSP
4440G
SYS
CPLD
OR3
OR1
OR2
OR1
OR2
OR3
HDMI
SPDIF
YCbCr
20
FID
CLK
H,V
2
H,V
2
YCbCr
30
FID
CLK
EX_CLK
H,V
DE
Sub
MSP
4458G
AV1 L/R
RGB L/R
I2S
IIC 4
0 x
8
8
EX_CLK
4
H,V
2
DE
HD2
4
RGB,
FB
12
TP[0:7], CLK, VAL,ERR,SOP
Y,C
Y,C
V2
V1
Tuner 2
TAUM-W303P
(PAL)
SIF
SIF
Tuner2_SIF
Tuner1_SIF
Tuner2_SIF
EEPROM
(24LC16)
BYPASS_SPDIF
Comp_2
YCbCr
3
Panel
EPF
HDD
PWM2 L,R
SPDIF
2
TXC
TP_CLK,SO
P,VAL,ERR
4
SYS
CPLD
H,V
2
CVBS
uCom
LNA
Ctrl
2
HD_D1OUT
EPLD_CLK
HD2
HD_D1OUT
8
HD_D1OUT_CLK
COMP.
(VIDEO)
COMP
(VIDEO)
Comp1. L/R
Comp2. L/R
CY2305SC
PVR
SoC
MSP
4458G
- 20 -
(2) PVR Digital BD MUX INTERFACE
PAL & DVB-T
TUNER
HD2.4
PVRSoc
656data
MUX CPLD
TP_OUT
TP/D1
TP
SUB UPD
TP_IN1/2
656
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