DOWNLOAD JBL SDP-5 (serv.man7) Service Manual ↓ Size: 3.09 MB | Pages: 127 in PDF or view online for FREE

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SDP-5 (serv.man7)
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127
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Service Manual
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Device
Audio
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sdp-5-sm7.pdf
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JBL SDP-5 (serv.man7) Service Manual ▷ View online

Lexicon 
If a failure occurs, the MUTE LED is illuminated to indicate the test failure, and the LEDs indicating which 
test was running when the failure occurred will also continue to be illuminated. The diagnostics will 
attempt to continuously execute the failed test, a test loop, to keep the signal lines active as an aid in 
debugging the failure.  
Serial Debug Port  
The Serial Debug Port is available to provide diagnostic status to be viewed on an external PC from the 
D9 connector labeled RS232 2. Using a terminal or a PC running a terminal program connected to RS232 
2 the progress of the diagnostics can be monitored and test failure information is reported. Also, there is 
an error log can be dumped to the serial debug port while in extended diagnostics. The serial protocol is 
19,200bps, 8, N, 1, (8 data bits, no parity and 1 stop bit). 
Serial Debug Cable 
The cable required to connect the RS232 2 serial debug port to the computer is a straight-through serial 
interface cable. A null modem adapter or cable should not be used. The MC8/B RS232 connector on the 
rear panel is a D9 female; so one end of the serial cable must be a D9 male. The other connector on the 
cable depends upon the RS232 connector used on the computer. The computer may have a D9 or a D25 
male connector. Typically computers have a D9 for COM 1 and a D25 for COM 2. However, some newer 
computers use a D9 for both COM 1 and COM 2. The COM port used on the computer does not matter, 
however you must ensure that the serial communications program being used has the correct computer 
COM port selected. 
Serial Debug Program 
The serial debug program controls the communication from an MC8/B to a computer. The program allows 
a user to view activity of the unit and to control the unit. The debug program is used extensively to 
perform audio and video testing of a unit in the audio and video ATE programs. This section will 
demonstrate an example of using debug to troubleshoot a SHARC SRAM failure.  
The MC8/B has four SHARCS on the DSP board organized as pairs: pair 0 and pair 1. Each pair of 
SHARCS has four SRAMs and one SDRAM. In the case of a SHARC SRAM failure, the debug program 
can be used to determine which of the four SRAMs is defective. Power on the unit with the RS232 2 port 
connected to the computer, while the computer is running a terminal program with the correct COM port 
and protocol enabled. When the unit reports the SHARC SRAM failure and has entered a diagnostic loop 
with the same error data continuously cycling on the monitor, power off the unit. The data will appear as 
follows: 
“SHARC Failed Test test num: 00000003 
 test phase: 00000000 
 sharc address: 02FE000E 
 sharc byte written: AAAAAAAA 
 sharc byte read: AAAAAA8A 
 Sharc Error Code: 0318 
 sharcpair0_ps2 sram 
 sharcpair0_ps2 sram test failed, Error code: 0318 
 *DIAG FAIL:ShSRAM_02 E:0318*” 
Compare the data from the sharc byte written to the sharc byte read. If the failure is a defective SRAM the 
typical failure mode is to be off by one bit and the byte comparison will determine which IC is at fault. In 
the above example: 
 
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MC-8 Service Manual 
byte written: AAAAAAAA = 1010 1010 1010 1010 1010 1010 1010 1010 
byte read: AAAAAA8A = 1010 1010 1010 1010 1010 1010 1000 1010 
Since data bit 5 is the one that is not correct, checking the schematics for the SRAM used for pair 0, 
DSPA and DSPB, that has data bit 5 on it will show which SRAM is associated with the failure. See the 
chart below for further reference.  
 
SHARC SRAM PIN ASSIGNMENTS: 
 
SHARC PAIR 0 
SHARC PAIR 1 
 
DSPA/PS1 & DSPB/PS2 
DSPC/PS1 & DSPD/PS2 
Data 
Bits: 
U20  U19  U18 U17 U12 U11 U10 U9 
D0 = Pin 6  
D24 
D16 
D8 
D0 
D24 
D16 
D8 
D0 
D1 = Pin 7 
D25 
D17 
D9 
D1 
D25 
D17 
D9 
D1 
D2 
Pin 
10 
D26 
D18 
D10 D2  D26 D18 D10 D2 
D3 
Pin 
11 
D27 
D19 
D11 D3  D27 D19 D11 D3 
D4 
Pin 
22 
D28 
D20 
D12 D4  D28 D20 D12 D4 
D5 
Pin 
23 
D29 
D21 
D13 D5  D29 D21 D13 D5 
D6 
Pin 
26 
D30 
D22 
D14 D6  D30 D22 D14 D6 
D7 
Pin 
27 
D31 
D23 
D15 D7  D31 D23 D15 D7 
P/N 350-12456  ICSM,SRAM,128KX8,12NS,3.3V,SOJ 
Note
The reference designators are from MC8 DSP board revision 1, Lexicon P/N 710-15300.   
Error Log 
An error log, or ring buffer, containing a log of the last 20 (13h) failures is available. If the error quantity 
exceeds 20, additional error messages are stored at the first location in the buffer (FIFO). The error log is 
stored in the non-volatile section of SRAM, and is not able to display all diagnostic errors. For example, 
SHARC SRAM failures are not reported to the error log. Every failure stored in the error log has six parts: 
“#NN E## tXX aYYYYYY 
 wZZZZZZ rQQQQQQ” 
#NN: Error Log Number 
The error log location number (in hexadecimal). It goes from 00 to 13. Turning the encoder knob 
clockwise allows one to scroll through all twenty error log locations. 
E##: Failure Number 
The E stands for error and the hexadecimal after the E indicates test number from the list on the next 
page. 
 
5-4
Lexicon 
tXX: Error Code List 
 
NO_ERROR 0x0 
ADDR_FAILURE 0x1 
DATA_FAILURE 0x2 
TIMEOUT_FAILURE 0x3 
COUNTER_FAILURE 0x4 
NON_VOL_DATA_FAILURE 0x5 
OPCODE_FAILURE 0x6 
IO_FPGA_ID_NO_MATCH 0x7 
DAR_FPGA_ID_NO_MATCH (only for MC12) 
0x8 
AUDIO_FPGA_ID_NO_MATCH 0x9 
ANALOG_FPGA_ID_NO_MATCH (only for MC12) 
0xA 
VFD_TIME_OUT 0xB 
VFD_RAM_ERROR 0xC 
TEST_INCOMPLETE 0xD 
RS232_WRAP_FAILURE 0xE 
SRAM_PREBURNIN_FAILURE 0x13 
SRAM_BURN_IN_FAILURE 0x14 
EPROM_CHKSUM_FROM_FLASH 0x15 
SRAM_FAILURE 0x16 
FIFO_ERROR_OVERRUN 0x17 
PIC_SN_INVALID 0x18 
FLASH_BURN_FAIL 0x19 
FLASH_BURN_NO_ROOM_LEFT 0x1A 
FLASH_BURN_NOT_FLASH_PART 0x1B 
SHARC_TIMEOUT_REBOOT 0x1C 
DSP_FPGA_ID_NO_MATCH 0x1D 
DEC_FPGA_ID_NO_MATCH 0x1E 
DIAG_TEST_NOT_EXIST 0x20 
THERMOSTAT_FAILURE 0x21 
ERROR_ID_BAD_VALUE 0x40 
ERROR_PARAM_SEMA_CREATE 0x60 
CS49400_NO_BOOT_START_MESSAGE 0x100 
CS49400_NO_BOOT_SUCCESS_MESSAGE 0x101 
CS49400_INIT_ERROR 0x102 
CS49400_ERR_WRITE_TIMEOUT 0x103 
CS49400_ERR_READ_TIMEOUT 0x104 
CS49400_INTREQ_TIMEOUT 0x105 
CS49400_AUTO_BOOT_FAILURE 0x106 
CS49400_ENQ_MSG_FAILURE 0x107 
 
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MC-8 Service Manual 
CS49400_DEQ_MSG_FAILURE 0x108 
CS49400_FINTREQ_TIMEOUT 0x109 
CS49400_NO_APP_START_MESSAGE 0x110 
CS49400_AB_SPI_TIMEOUT 0x111 
CS49400_C_SPI_TIMEOUT 0x112 
CS49400_HOST_BOOT_FAILURE 0x113 
CS49400_FLASH_WRITE_TIMEOUT 0x114 
CS49400_BAD_FLASH_DATA 0x115 
CS49400_BAD_RESP_OPCODE 0x116 
CS49400_FLASH_READ_TIMEOUT 0x117 
CS49400_MASTER_BOOT_FAILURE 0x118 
CS49400_BAD_FLASH_VERSION 0x119 
CS49400_ERASED_FLASH 0x11A 
CS49400_CHECKSUM_FAIL 0x11B 
 
 
The sharc error codes use from 0x0300 through 0x03FF 
 
 
 
SHARC_WCLK_FAILURE 0x3F9 
SHARC_SRAM_FAILURE 0x3FA 
SHARC_SDRAM_FAILURE 0x3FB 
SHARC_GPIO_FAILURE 0x3FC 
SHARC_RX_TIMEOUT 0x3FD 
SHARC_TX_TIMEOUT 0x3FE 
SHARC_BAD_OPCODE 0x3FF 
 
The following codes are used to interpret the results from the SHARC GPIO, SRAM, SDRAM, and Word 
Clock Tests available from the Extended Diagnostic Repair Menu. The Error code is 16-bits with the most 
significant byte always being 0x03. 
The least significant byte is broken into bits as shown: 
”(MSBit) B7 B6 B5 B4 B3 B2 B1 B 0 (LSBit)” 
•  B7 - Semaphore indicator, 1 failed, 0, passed. 
•  B6 - GPIO LED failure, 1 indicates that neither LED lit up from the test. 
•  B5 – Read Back Reg Fail, 1 indicates the Readback register failed. 
•  B4 - Test Fail, 1 indicates the test failed, 0 success. 
•  B3 - SHARC Test Completed. 1 indicates that the sharc was able to finish executing the test. 
•  B2 - READ Timeout, 1 means that Z180 could not read back from the SHARC. 1 indicated timeout. 
•  B1 - WRITE Timeout, 1 means there was a timeout. 
 
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