Harman Kardon AVR 3550 Service Manual ▷ View online
No.
Pin Name
I/O
Function
21
DFS0
I
Double Speed Sampling Mode 0 Pin (Note)
“L”: Normal Speed, “H”: Double Speed at DFS1 bit = “0”.
“L”: Normal Speed, “H”: Double Speed at DFS1 bit = “0”.
22
CKS0
I
Input Clock Select 0 Pin (Note)
23
CKS1
I
Input Clock Select 1 Pin (Note)
24
CKS2
I
Input Clock Select 2 Pin (Note)
25
DIF0
I
Audio Data Interface Format 0 Pin (Note)
26
DIF1
I
Audio Data Interface Format 1 Pin (Note)
27
DIF2
I
Audio Data Interface Format 2 Pin (Note)
28
DZFE
I
Zero Input Detect Enable Pin (Note)
29
DZFR3
O
DAC3 Rch Zero Input Detect Pin
30
DZFL3
O
DAC3 Lch Zero Input Detect Pin
31
DZFR2
O
DAC2 Rch Zero Input Detect Pin
32
VREFH
I
Positive Voltage Reference Input Pin, AVDD
33
AVDD
-
Analog Power Supply Pin
34
AVSS
-
Analog Ground Pin, +4.75
~+5.25V
35
ROUT3-
O
DAC3 Rch Negative Analog Output Pin
36
ROUT3+
O
DAC3 Rch Positive Analog Output Pin
37
LOUT3-
O
DAC3 Lch Negative Analog Output Pin
38
LOUT3+
O
DAC3 Lch Positive Analog Output Pin
39
ROUT2-
O
DAC2 Rch Negative Analog Output Pin
40
ROUT2+
O
DAC2 Rch Positive Analog Output Pin
41
LOUT2-
O
DAC2 Lch Negative Analog Output Pin
42
LOUT2+
O
DAC2 Lch Positive Analog Output Pin
43
ROUT1-
O
DAC1 Rch Negative Analog Output Pin
44
ROUT1+
O
DAC1 Rch Positive Analog Output Pin
Note:SMUTE, DFS0, CKS0, CKS1, CKS2, DIF0, DIF1, DIF2, DZFE pins are ORed with serial control register.
Input
Selector
Clock
Recovery
Clock
Generator
DAIF
Decoder
AC-3/MPEG
Detect
DEM
µP I/F
Audio
I/F
X'tal
Oscillator
Oscillator
PDN
INT0
P/S=”L”
LRCK
BICK
SDTO
DAUX
MCKO2
XTO
XTI
R
AVDD
AVSS
CDTI
CDTO
CCLK
CSN
DVDD
DVSS
TVDD
TVDD
MCKO1
IIC
RX0
RX1
RX2
RX3
RX4
RX5
RX6
RX2
RX3
RX4
RX5
RX6
RX7
DIT
TX0
Error &
Detect
STATUS
INT1
Q-subcode
buffer
TX1
B,C,U,VOUT
8 to 3
VIN
Serial Control Mode
Input
Selector
Clock
Recovery
Clock
Generator
DAIF
Decoder
AC-3/MPEG
Detect
DEM
Audio
I/F
X'tal
Oscillator
Oscillator
PDN
INT0
P/S=”H”
LRCK
BICK
SDTO
DAUX
XTO
XTI
R
AVDD
AVSS
CM1
CM0
OCKS1
OCKS0
DVDD
DVSS
TVDD
TVDD
IPS1
RX0
RX1
RX2
RX3
RX2
RX3
IPS0
DIF0
DIF1
DIF2
DIF1
DIF2
DIT
TX0
Error &
Detect
STATUS
INT1
TX1
B,C,U,VOUT
4 to 2
VIN
MCKO2
MCKO1
Parallel Control Mode
BLOCK DIAGRAM
IPS0/RX4
RX3
1
AVSS
48
2
DIF0/RX5
3
TEST2
4
DIF1/RX6
5
AVSS
6
DIF2/RX7
7
IPS1/IIC
8
P/SN
9
XTL0
10
XTL1
AVSS
47
RX2
46
45
44
AVSS
43
RX0
42
AVSS
41
VCOM
40
R
39
AVDD
38
TVD
D
13
N
C
14
TX0
15
TX1
16
BOU
T
17
18
UOU
T
19
VOU
T
20
DVD
D
21
DVSS
22
MCKO1
2
3
36
35
34
33
32
31
30
29
28
27
26
INT0
OCKS0/CSN/CAD0
OCKS1/CCLK/SCL
CM1/CDTI/SDA
CM0/CDTO/CAD1
PDN
XTI
XTO
DAUX
MCKO2
BICK
AK4114VQ
Top View
COU
T
TEST1
RX1
INT1
37
LRCK
24
11
VIN
12
25
SDTO
DIR IC PIN ASSIGNMENT & BLOCK DIAGRAM
PIN ASSIGNMENT (TOP VIEW)
PIN/FUNCTION
No. Pin
Name
I/O
Function
IPS0
I
Input Channel Select 0 Pin in Parallel Mode
1
RX4
I
Receiver Channel 4 Pin in Serial Mode (Internal biased pin)
2 NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
DIF0
I
Audio Data Interface Format 0 Pin in Parallel Mode
3
RX5
I
Receiver Channel 5 Pin in Serial Mode (Internal biased pin)
4 TEST2
I
TEST 2 pin
This pin should be connect to AVSS.
DIF1
I
Audio Data Interface Format 1 Pin in Parallel Mode
5
RX6
I
Receiver Channel 6 Pin in Serial Mode (Internal biased pin)
6 NC(AVSS)
I
No Connect
No internal bonding. This pin should be connected to AVSS.
DIF2
I
Audio Data Interface Format 2 Pin in Parallel Mode
7
RX7
I
Receiver Channel 7 Pin in Serial Mode (Internal biased pin)
IPS1
I
Input Channel Select 1 Pin in Parallel Mode
8
IIC I
IIC Select Pin in Serial Mode.
“L”: 4-wire Serial, “H”: IIC
9 P/SN
I
Parallel/Serial Select Pin
“L”: Serial Mode, “H”: Parallel Mode
10
XTL0
I
X’tal Frequency Select 0 Pin
11
XTL1
I
X’tal Frequency Select 1 Pin
12
VIN
I
V-bit Input Pin for Transmitter Output
13
TVDD
I
Input Buffer Power Supply Pin, 3.3V or 5V
14 NC
I
No Connect
No internal bonding. This pin should be open or connected to DVSS.
15
TX0
O
Transmit Channel (Through Data) Output 0 Pin
16 TX1
O
When TX bit = “0”, Transmit Channel (Through Data) Output 1 Pin.
When TX bit = “1”, Transmit Channel (DAUX Data) Output Pin (Default).
When TX bit = “1”, Transmit Channel (DAUX Data) Output Pin (Default).
17 BOUT
O
Block-Start Output Pin for Receiver Input
“H” during first 40 flames.
18
COUT
O
C-bit Output Pin for Receiver Input
19
UOUT
O
U-bit Output Pin for Receiver Input
20
VOUT
O
V-bit Output Pin for Receiver Input
21
DVDD
I
Digital Power Supply Pin, 3.3V
22
DVSS
I
Digital Ground Pin
23
MCKO1
O
Master Clock Output 1 Pin
24
LRCK
I/O
Channel Clock Pin
25
SDTO
O
Audio Serial Data Output Pin
26
BICK
I/O
Audio Serial Data Clock Pin
27
MCKO2
O
Master Clock Output 2 Pin
28
DAUX
I
Auxiliary Audio Data Input Pin
29
XTO
O
X'tal Output Pin
30
XTI
I
X'tal Input Pin
DIR IC PIN FUNCTION (AK4114VQ) : IC75
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