Harman Kardon AVR 3550 Service Manual ▷ View online
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Block Diagram
SCF
DAC
DATT
DZFL1
LOUT1+
LOUT1-
LOUT1+
LOUT1-
SCF
DAC
DATT
DZFR1
ROUT1+
ROUT1-
ROUT1+
ROUT1-
SCF
DAC
DATT
DZFL2
LOUT2+
LOUT2-
LOUT2+
LOUT2-
SCF
DAC
DATT
DZFR2
ROUT2+
ROUT2-
ROUT2+
ROUT2-
SCF
DAC
DATT
DZFL3
LOUT3+
LOUT3-
LOUT3+
LOUT3-
SCF
DAC
DATT
DZFR3
ROUT3+
ROUT3-
ROUT3+
ROUT3-
Audio
I/F
Control
Register
AK4356
MCLK
LRCK
BICK
MCKO
LRCK
LRCK
BICK
XTI
XTO
Controller
CS
CCLK
CDTI
LRCK
BICK
SDOUT1
SDOUT2
SDOUT3
SDOUT3
AC3
SDTI1
SDTI2
SDTI3
SDTI3
LOUT1-
RO
UT
1+
1
LOUT1+
44
2
DZFL2
3
DZFR1
4
DZFL1
5
CAD0
6
CAD1
7
PDN
8
BICK
9
MCLK
10
DVDD
11
RO
UT
1-
43
LO
UT
2+
42
LO
UT
2-
41
RO
UT
2+
40
RO
UT
2-
39
LO
UT
3+
38
LO
UT
3-
37
RO
UT
3+
36
RO
UT
3-
35
AV
S
S
34
D
VSS
12
SD
TI
1
13
SD
TI
2
14
SD
TI
3
15
LRCK
16
SM
U
T
E
17
CCLK
18
CDTI
19
CS
N
20
DFS
0
21
CK
S
0
22
33
32
31
30
29
28
27
26
25
24
23
AVDD
VREFH
DZFR2
DZFL3
DZFR3
DZFE
DIF2
DIF1
DIF0
CKS2
CKS1
AK4356VQ
Top View
D/A CONVERTER IC PIN ASSIGNMENT & BLOCK DIAGRAM
PIN ASSIGNMENT (TOP VIEW)
PIN/FUNCTION
No.
Pin Name
I/O
Function
1
LOUT1-
O
DAC1 Lch Negative Analog Output Pin
2
LOUT1+
O
DAC1 Lch Positive Analog Output Pin
3
DZFL2
O
DAC2 Lch Zero Input Detect Pin
4
DZFR1
O
DAC1 Rch Zero Input Detect Pin
5
DZFL1
O
DAC1 Lch Zero Input Detect Pin
6
CAD0
I
Chip Address 0 Pin
7
CAD1
I
Chip Address 1 Pin
8
PDN
I
Power-Down & Reset Pin
When “L”, the AK4356 is powered-down and the control registers are reset to
default state. If the state of CAD0-1 changes, then the AK4356 must be reset by PDN.
When “L”, the AK4356 is powered-down and the control registers are reset to
default state. If the state of CAD0-1 changes, then the AK4356 must be reset by PDN.
9
BICK
I
Audio Serial Data Clock Pin
10
MCLK
I
Master Clock Input Pin
11
DVDD
-
Digital Power Supply Pin, +4.75
~+5.25V
12
DVSS
-
Digital Ground Pin
13
SDTI1
I
DAC1 Audio Serial Data Input Pin
14
SDTI2
I
DAC2 Audio Serial Data Input Pin
15
SDTI3
I
DAC3 Audio Serial Data Input Pin
16
LRCK
I
Audio Input Channel Clock Pin
17
SMUTE
I
Soft Mute Pin (Note)
When this pin goes to “H”, soft mute cycle is initialized.
When returning to “L”, the output mute releases.
When this pin goes to “H”, soft mute cycle is initialized.
When returning to “L”, the output mute releases.
18
CCLK
I
Control Data Clock Pin
19
CDTI
I
Control Data Input Pin
20
CSN
I
Chip Select Pin
This pin should be held to “H” except for access.
This pin should be held to “H” except for access.
D/A CONVERTER IC PIN FUNCTION (AK4356VQ) : IC78
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