DOWNLOAD Sony KV-38DRC2 Service Manual ↓ Size: 23.32 MB | Pages: 127 in PDF or view online for FREE

Model
KV-38DRC2
Pages
127
Size
23.32 MB
Type
PDF
Document
Service Manual
Brand
Device
TV
File
kv-38drc2.pdf
Date
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— 34 —
KV-38DRC2 / 38DRC2C 
SERVICE DATA LISTS
Control Register
Function & Link
Data
Type
Data
Range
Comment
Full
Vcomp1
Vcomp2
0
HBLK  HBLK_SW: Horizontal blanking switch
0, 1
1
LBLK  LEFT_BLK: Left blanking
0~63
50
2
RBLK  RIGHT_BLK: Right blanking
0~63
27
3
VBLK  VBLK_SW: Vertical blanking switch
0, 1
1
4
TBLK  UP_BLK: Top blanking
0~(7)~15
1
8
12
 ( ): Settings at center
5
BBLK  LO_BLK: Bottom blanking
0~(7)~15
0
13
13
6
VCMP  V_COMP: Vertical compensation
0~15
0
0
0
7
HCMP  H_COMP: Horizontal compensation
0~15
0
8
ACMP  AFC_COMP: AFC compensation
0~7
0
9
PCMP  PIN_COMP: Pin compensation
0~7
0
10 AFCM  AFC_MODE: AFC loop gain
0~3
2
11
VFRQ  V_FREQ: Vertical frequency
0~3
12
VON
 V_ON: Vertical drive on
0, 1
13 JUMP  JMP_SW: Reference pulse jump swtich
0, 1
0
14
VDJP
 VDRV_SW: Vertical drive jump switch
0, 1
0
0
1
15
VDST  RST_SW: Vertical drive start switch
0, 1
0
0
1
16 EWDC  EW_DC: Pin DC level shift
0, 1
0
17
AKBT  AKBTIM: AKB timing
0~31
20
20
10
1
Data Initial/Average Settings
(32V&36V CRTs)
Register
No & Name
DX1A-2001&2000 SERVICE LIST (#4-3):   
CXA2150D-3  {Deflection Controls: D3}
3
1
1
1
45
24
 Full: 480p/960i (4x3) display
 Vcomp1: 480p/960i (16x9) display
 Vcomp2: 1080i (16x9) display
0
1
0
0
 Note:
 The same CXA2150 service data is used for DX1A-2001&2000. 
0
 Device Name:      CXA2150AQ  { CRT Driver / SONY } / IC201 (A-board) / P/N: 8-752-093-35 (SBorSD#: NA)
 Slave Address:   86h
— 35 —
KV-38DRC2 / 38DRC2C 
SERVICE DATA LISTS
Control Register
Function & Link
Data
Type
Data
Range
Comment
480i
(15.75 KHz)
480p
(31.50 KHz)
1080i
(33.75 KHz)
0
MTRX  MAT_OUT: Selection of color matrix conversion types
Micro
0~3
0
0
1
1
GAIN
 GAIN_SEL:
 Selection of output signals for SELYOUT, SELCBOUT, SELCROUT
C
0~3
0
2
CBGN
 YGAIN, CBGAIN, CRGAIN:
 The gain control of SELYOUT, SELCBOUT, & SELCROUT
C
0~15
9
3
VTC
 V_TC: Setting of Vsync separation time constant
C
0~3
1
4
HWID  H_WIDTH: Setting of the output pulsewidth of SELHOUT 
C
0~3
1
Video5
Video6
Sub
5
HSEP  HSEP_SEL: Setting for the sync separation system
0, 1
0
0
0
6
TEST
 TEST: Test mode selection (for device tests)
C
0, 1
0
7
FRGB
 The forced RGB selection (for tests)
 {0: MAT_OUT = MTRX (#0), 1: MAT_OUT = MTRX (#3)}
C
0, 1
0
Full
Vcomp1
Vcomp2
8
HMSK  Hsync masking in vertical retrace
0, 1
0
Register
No & Name
Data Initial/Average Settings
(
32V&36V CRTs)
 Device Name:     CXA2151Q  { Component I/F & Sync Separation / SONY } / IC3001 (B-board) / P/N: 8-752-093-84 (SD#: S00302B)
 Slave Address:   84h
DX1A-2001&2000 SERVICE LIST (#5):   
CXA2151Q
 Note:
 The same CXA2151 service data is used for DX1A-2001&2000. 
1
 Video5&6:
 YPbPr-480i/480p/1080i inputs
 Sub: 480i input from the sub-channel
 Full: 480p/960i (4x3) display
 Vcomp1: 480p/960i (16x9) display
 Vcomp2: 1080i (16x9) display
 C: Common data
— 36 —
KV-38DRC2 / 38DRC2C 
SERVICE DATA LISTS
Control Register
Function & Link
Data
Type
Data
Range
Comment
Full
Vcomp1
Vcomp2
0
SBHS  DC AMP3: DC shift
Adj.
0~63
31  [31]
1
YBWU  VCA9: Upper Y-bow
Adj.
0~63
31  [31]
2
YBWL  VCA10: Lower Y-bow
Adj.
0~63
31  [31]
3
RSAP  DC AMP2: Right H-AMP
Adj.
0~63
31  [31]
4
RUBW  VCA5: Right upper bow
Adj.
0~63
31  [31]
5
RLBW  VCA6: Right lower bow
Adj.
0~63
31  [31]
6
LSAP
 DC AMP1: Left H-AMP
Adj.
0~63
31  [31]
7
LUBW  VCA1: Left upper bow
Adj.
0~63
31  [31]
8
LLBW  VCA2: Left lower bow
Adj.
0~63
31  [31]
9
CADJ  DC AMP4: Offset adjustment (ADJ)
Adj.
0~63
10
CPY2
 Copy Function 2: (Set CPY2=1, then press MUTE + 
Enter.)
Micro
0, 1
 For engineering design use only
DX1A-2001&2000 SERVICE LIST (#6):   
D-CONV / CXA8070
 Device Name:      CXA8070AP  { DY-Convergence Control / SONY } / IC5513 (D-board) / P/N: 8-759-595-52 (SB#: V1718)
 Slave Address:   DEh
31  [31]
31  [31]
31  [31]
31  [31]
31  [31]
31  [31]
 Full: 480p/960i (4x3) display mode
 Vcomp1: 480p/960i (16x9) display mode
 Vcomp2: 1080i (16x9) display mode
 Adj.: Adjusted data
 From the system micro (V 2.0),
 the deflection control-related initial settings
 are the same as their average data.
0
 Note:
 The same CXA8070 service data is used for DX1A-2001&2000. 
Data Initial Settings & [Average Data]
(
32V&36V CRTs)
Register
No & Name
48  [48]
31  [31]
31  [31]
31  [31]
— 37 —
KV-38DRC2 / 38DRC2C 
SERVICE DATA LISTS
Control Register
Function & Link
Data
Type
Data
Range
Comment
Full
Vcomp1
Vcomp2
0
DFON  SW0: DF on/off switch
C
0, 1
0
1
DQP
 PWM: DQP phase
Adj.
0~63
23  [23]
23  [23]
2
DF
 DAC1: DF phase
Adj.
0~63
25  [25]
25  [25]
3
DQPD  H.AMP: DQP dc-level
Adj.
0~63
34  [34]
34  [34]
4
QPDV  U.CBOW, L.CBOW: DQP dc-level vertical modulation
0~63
51
47
5
DVS
 U.CBOW, L.CBOW: DQP dc-level tilt
0~(3)~7
0
0
6
QPDY  U.MBH,L.MBH: DQP dc-level at top & bottom areas
0~63
7
7
 ( ): Settings at center
7
DQPA  DC SHIFT: DQP amplitude
Adj.
0~63
13  [15]
13  [15]
13  [15]
 Data 
(36V)
 is used as Initial/CBA data.
 From the system micro (V 2.0), most
 deflection control-related initial settings
 are the same as their average data.
8
QPAV  U.YBOW, LYBOW: DQP amplitude vertical modulation
0~63
38
34
9
AVS
 U.YBOW, LYBOW: DQP amplitude tilt
0~7
3
3
10 NORM  SW1:
0, 1
0
0
11
CPY3
 Copy Function 3: (Set CPY3=1, then press MUTE + 
Enter.)
Micro
0, 1
0
 For engineering design use only
12
200V
 H.DUTY, H.TILT: 200V regulator adjustment
Adj.
0~63
31  [31]
 U.YBOW = QPAV + AVS
 L.YBOW = QPAV - AVS
DX1A-2001&2000 SERVICE LIST (#7):   
CXA2026AS
 Device Name:     CXA2026AS  { DQP Control / SONY } / IC5511 (D-board) / P/N: 8-752-074-64 (SD#: S95610B)
 Slave Address:   8Eh
Data Initial Settings & [Average Data]
(32V&36V CRTs)
 Note:
 The same CXA2026 service data is used for DX1A-2001&2000. 
Register
No & Name
 Full: 480p/960i (4x3) display mode
 Vcomp1: 480p/960i (16x9) display mode
 Vcomp2: 1080i (16x9) display mode
 C: Common data
 Adj.: Adjusted data
 U.CBOW = QPDV + DVS
 L.CBOW = QPDV - DVS
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