Sony KDL-40X3500 / KDL-46X3500 / KDL-52X3500 Service Manual ▷ View online
- 116 -
~ FB2 Board Schematic Diagram [ PC & HDMI Inputs ] Page 13B/17 ~
DD
CC
BB
P
EE
FF
Z
1
2
3
4
5
6
7
8
9
10
11
12
Q
R
S
T
U
V
W
X
Y
AA
EMMA2_VIDEO_D[0-15],EMMA2_VIDEO_HS,EMMA2_VIDEO_VS
JTCK,JTDI,JTDO,JTMS,JTRST,NMI_EDINT
FB3505
0uH
R3558
XX
R3587
470
EMMA2_GPX_A[0-7],EMMA2_GPX_B[0-7],EMMA2_GPX_G[0-7],EMMA2_GPX_R[0-7]
JL3522
JL3523
JL3524
JL3525
JL3526
JL3527
R3557
XX
JL3520
JL3521
R3559
XX
R3554
47
47
R3564
R3572
47
47
R3565
47
RB3500
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
47
RB3503
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
47
RB3502
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
47
RB3501
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
RB3504
47
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
1005
CHIP
R3586
XX
AA4
W5
V6
D20
F19
F18
E21
E19
H21
E20
M18
N19
E18
B17
C17
D17
D21
M20
K21
A17
C18
B21
A21
B20
A20
A19
B18
A18
G20
G19
G18
F21
D18
C21
C20
C19
K18
J21
J20
J19
H19
H18
G21
J18
F20
D19
B19
L19
L18
K20
K19
V21
V20
W21
W20
Y21
Y20
AA21
V19
Y19
V11
V12
W12
AA12
AA13
Y12
W13
Y11
Y13
W11
V14
W14
Y14
AA14
1
M
1
2
M
1
3
N9
N
1
0
N
1
1
N
1
2
N
1
3
U
1
1
U
1
2
U
1
3
V
1
3
W
1
0
V
1
0
AA10
Y9
W
9
W
8
A
A
9
AA20
H20
UPD61123F1-100-KA3-A
IC3502
M
11
GND
M12
GND
M13
GND
N9
GND
N10
GND
N11
GND
N12
GND
N13
AGNDV
U11
AGNDV
U12
AGNDV
U13
AGNDV
V13
TEST / GND
W10
NMI/EDINT
V10
JTRST
AA10
JTMS
Y9
JTDO
W9
JTDI
W8
JTCK
AA9
AO0
_BCK
AO0_MCK
W5
ATX
V6
PAR / PPORT56
D20
FRAMEB / PPORT57
F19
IRDYB / PPORT58
F18
TRDYB / PPORT59
E21
STOPB / PPORT60
E19
IDSEL / PPORT61
H21
DEVSELB / PPORT62
E20
REQB0 / PPORT63
M18
GNTB0 / PPORT64
N19
PERRB / PPORT65
E18
VDOE_VCK_IN / AD1 / PPORT70
B17
VDOE_VVSB_IN / AD2 / PPORT71
C17
VDOE_VHSB_IN / AD3 / PPORT72
D17
VDOE_VCK / SERRB / PPORT66
D21
VDOE_VVSB_OUT / INTAB / PPORT67
M20
VDOE_VHSB_OUT / PCICLK / PPORT68
K21
VDOE_FLD / AD0 / PPORT69
A17
VDOE_A7 / AD11 / PPORT80
C18
VDOE_A6 / AD10 / PPORT79
B21
VDOE_A5 / AD9 / PPORT78
A21
VDOE_A4 / AD8 / PPORT77
B20
VDOE_A3 / AD7 / PPORT76
A20
VDOE_A2 / AD6 / PPORT75
A19
VDOE_A1 / AD5 / PPORT74
B18
VDOE_A0 / AD4 / PPORT73
A18
VDOE_R7 / AD19 / PPORT88
G20
VDOE_R6 / AD18 / PPORT87
G19
VDOE_R5 / AD17 / PPORT86
G18
VDOE_R4 / AD16 / PPORT85
F21
VDOE_R3 / AD15 / PPORT84
D18
VDOE_R2 / AD14 / PPORT83
C21
VDOE_R1 / AD13 / PPORT82
C20
VDOE_R0 / AD12 / PPORT81
C19
VDOE_G7 / AD27 / PPORT96
K18
VDOE_G6 / AD26 / PPORT95
J21
VDOE_G5 / AD25 / PPORT94
J20
VDOE_G4 / AD24 / PPORT93
J19
VDOE_G3 / AD23 / PPORT92
H20
VDOE_G2 / AD22 / PPORT91
H19
VDOE_G1 / AD21 / PPORT90
H18
VDOE_G0 / AD20 / PPORT89
G21
VDOE_B7 / CBE3 / PPORT104
J18
VDOE_B6 / CBE2 / PPORT103
F20
VDOE_B5 / CBE1 / PPORT102
D19
VDOE_B4 / CBE0 / PPORT101
B19
VDOE_B3 / AD31 / PPORT100
L19
VDOE_B2 / AD30 / PPORT99
L18
VDOE_B1 / AD29 / PPORT98
K20
VDOE_B0 / AD28 / PPORT97
K19
VDO0_D7 / PPORT23
V21
VDO0_D6 / PPORT22
V20
VDO0_D5 / PPORT21
W21
VDO0_D4 / PPORT20
W20
VDO0_D3 / PPORT19
Y21
VDO0_D2 / PPORT18
Y20
VDO0_D1 / PPORT17
AA21
VDO0_D0 / PPORT16
AA20
VDO0_VCK / PPORT15
V19
VDO0_FLD / PPORT12
Y19
VAR
V11
VAG
V12
VAB
W12
VAY
AA12
VAC
AA13
VACVBS
Y12
VREF1
W13
VREF0
Y11
RSET1
Y13
RSET0
W11
AVDDV
V14
AVDDV
W14
AVDDV
Y14
AVDDV
AA14
R3553
100
0
R3578
0
R3577
0
R3579
R3555
10k
P_GPX_HS
P_GPX_VS
EPP_GPX_CK
FE_MRSTB
YC_C
YC_Y
CVBS
EMMA2_GPX_VS
EMMA2_GPX_HS
EMMA2_GPX_CK
TUE_DEMOD_RESETB
NAND_WPB
TUNERB_CI
A0
_BCK
EMMA2_SPDIF
A0_MCK
XX
C3531
XX
C3532
XX
C3533
XX
R3589
200
R3581
200
R3582
200
R3583
R3585
0.5%
7.5k
1k
R3588
0.5%
TUNER_CIB
EMMA2_YS_MUTE
3V3_EMMA
+3V3
+8V5
E2_VIDEO_CK
USB_HW_ON
JL3535
54
3
2
1
TC7SZ04FU(TE85R)
IC3503
NC
IN
GND
OUT
VCC
BE_3.3V
22
R3592
XX
R3593
TUE_TUNER_SW
10k
R3595
GND_1
GND_1
GND_1
GND_1
GND_1
123
4
5
6
IC3504
XX
1A
GND
2A
2Y
VCC
1Y
GND_1
BE_3.3V
GND_1
0
R3597
0
R3598
10V
4.7
C3540
X7R
2012
C3534
4.7
100
R3560
16V
0.1
C3542
16V
0.1
C3543
16V
0.1
C3541
16V
0 . 1
C3544
16V
0 . 1
C3547
C3535
0.1
10uH
L3500
JTRST
JTMS
JTDO
JTDI
JTCK
NMI_EDINT
EMMA2_VIDEO_D[5]
EMMA2_VIDEO_D[4]
EMMA2_VIDEO_D[3]
EMMA2_VIDEO_D[0]
EMMA2_GPX_A[7]
EMMA2_GPX_A[6]
EMMA2_GPX_A[5]
EMMA2_GPX_A[4]
EMMA2_GPX_A[3]
EMMA2_GPX_A[2]
EMMA2_GPX_A[1]
EMMA2_GPX_A[0]
EMMA2_GPX_R[7]
EMMA2_GPX_R[6]
EMMA2_GPX_R[5]
EMMA2_GPX_R[4]
EMMA2_GPX_R[3]
EMMA2_GPX_R[2]
EMMA2_GPX_R[1]
EMMA2_GPX_R[0]
EMMA2_GPX_G[7]
EMMA2_GPX_G[6]
EMMA2_GPX_G[5]
EMMA2_GPX_G[4]
EMMA2_GPX_G[3]
EMMA2_GPX_G[2]
EMMA2_GPX_G[1]
EMMA2_GPX_G[0]
EMMA2_GPX_B[7]
EMMA2_GPX_B[6]
EMMA2_GPX_B[5]
EMMA2_GPX_B[4]
EMMA2_GPX_B[3]
EMMA2_GPX_B[2]
EMMA2_GPX_B[1]
EMMA2_GPX_B[0]
EMMA2_VIDEO_D[7]
EMMA2_VIDEO_D[6]
EMMA2_VIDEO_D[2]
EMMA2_VIDEO_D[1]
E2_VIDEO_CK
MSPON
MSMODE
THIS CAPACITOR
TO BE PLACED
UNDERNEATH BGA
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
THESE RB’s MAY BE PIN-SWAPPED FOR LAYOUT
NOTE SYMBOL
IS WRONG
IS WRONG
VAR
VAB
VAG
CN / AV / MS
CN / AV / MS
CN / AV / MS
CN / AV / MS
/ AV / MS
POWER
CI
CN / AV / MS
GRAPHICS OUT
CS IN
GRAPHICS OUT
VIDEO OUT
8.5V
MEMORY
PLACE THESE COMPONENTS TOGETHER
ON BE SECTION OF FB2-BOARD
ON BE SECTION OF FB2-BOARD
MOUNT TO BYPASS INVERTER
IF INVERT NOT REQ’D
IF INVERT NOT REQ’D
IC3505 - TO CORRECT SETUP/HOLD
TIMING ISSUE FROM EPP
NOTE - TI PART SELECTED TO
MEET TIMING, THIS SHOULD BE
CHECED IF CHANGING TO DIFFERENT
PART NUMBER
TIMING ISSUE FROM EPP
NOTE - TI PART SELECTED TO
MEET TIMING, THIS SHOULD BE
CHECED IF CHANGING TO DIFFERENT
PART NUMBER
EPP
FB2
13B/17
- 117 -
~ FB2 Board Schematic Diagram [ PC & HDMI Inputs ] Page 13C/17 ~
11
22
Q
O
P
A
B
C
D
E
F
G
H
J
I
K
L
M
N
12
13
14
15
16
17
18
19
20
21
EMMA2_DQ[0-15]
EMMA2_DADD[0-12]
DS656_E2LR_D[0-7]
CI_TSCLK,CI_TSSYNC,CI_TSVAL
AVC_TSD[0],AVC_TSCLK,AVC_TSSYNC,AVC_TSVAL
R3556
10k
E
5
E17
F
5
F
1
7
G
5
G
1
7
T17
U
5
U
6
U
1
7
E
8
E
9
E10
E11
E12
E13
E
6
E
7
E14
E15
E16
H
5
H
1
7
J
5
J
1
7
K
5
K
A16
B16
A15
B15
A14
B14
A13
B13
D13
C13
D14
C14
D15
C15
D16
C16
D12
A9
B9
D8
A8
B8
A7
B7
A6
B6
D6
C6
D7
C7
C8
D9
A11
A12
C11
C12
C9
D10
C10
D11
B10
A10
B11
B12
Y17
W17
V17
AA17
AA16
Y16
W16
V16
AA15
A1
B2
A2
B3
A3
C4
B4
A4
A5
D5
F4
N4
P2
G2
R2
G1
K3
V1
C1
Y1
P3
B1
E4
F2
UPD61123F1-100-KA3-A
IC3502
DQ15
A16
DQ14
B16
DQ13
A15
DQ12
B15
DQ11
A14
DQ10
B14
DQ9
A13
DQ8
B13
DQ7
D13
DQ6
C13
DQ5
D14
DQ4
C14
DQ3
D15
DQ2
C15
DQ1
D16
DQ0
C16
DADD13
D12
DADD12
A9
DADD11
B9
DADD10
D8
DADD9
A8
DADD8
B8
DADD7
A7
DADD6
B7
DADD5
A6
DADD4
B6
DADD3
D6
DADD2
C6
DADD1
D7
DADD0
C7
DBA1
C8
DBA0
D9
UDQM
A11
UDQS
A12
LDQM
C11
LDQS
C12
DCSB
C9
DRASB
D10
DCASB
C10
DWEB
D11
DCKE
B10
DCLK
A10
DCLKB
B11
DVREF
B12
VDI_D7 / PPORT121
Y17
VDI_D6 / PPORT120
W17
VDI_D5 / PPORT119
V17
VDI_D4 / PPORT118
AA17
VDI_D3 / PPORT117
AA16
VDI_D2 / PPORT116
Y16
VDI_D1 / PPORT115
W16
VDI_D0 / PPORT114
V16
VDI_VCK / PPORT113
AA15
STP0_DAT7 / PPORT8
A1
STP0_DAT6 / PPORT7
B2
STP0_DAT5 / PPORT6
A2
STP0_DAT4 / PPORT5
B3
STP0_DAT3 / PPORT4
A3
STP0_DAT2 / PPORT3
C4
STP0_DAT1 / PPORT2
B4
STP0_DAT0 / PPORT1
A4
STP0_EN / PPORT9
A5
STP0_CLK / PPORT0
D5
REGB / PPORT34
F4
IOWRB / PPORT31
N4
IORDB / PPORT30
P2
INPACKB / PPORT33
G2
GPIO_VS1B / PPORT28
R2
GPIO_RESET / PPORT32
G1
GPIO_IREQB / PPORT24
K3
GPIO_CD1B / PPORT26
V1
GPIO_CD2B / PPORT35
C1
PCE1B(CE2B_2) / PPORT36
Y1
PCE0B(CE2B_1) / PPORT27
P3
IOSI16B / PPORT25
B1
STP1_STRT / PPORT38
E4
STP1
EN
/
PPORT37
F2
VDD3
E5
VDD3
E17
VDD3
F5
VDD3
F17
VDD3
G5
VDD3
G17
VDD3
T17
VDD3
U5
VDD3
U6
VDD3
U17
VDD2
E8
VDD2
E9
VDD2
E10
VDD2
E11
VDD2
E12
VDD2
E13
VDD1
E6
VDD1
E7
VDD1
E14
VDD1
E15
VDD1
E16
VDD1
H5
VDD1
H17
VDD1
J5
VDD1
J17
VDD1
K5
VDD1
EMMA2_DWEB
EMMA2_DCKE
EMMA2_DCLK
EMMA2_DCLKB
EMMA2_DBA1
EMMA2_DQM0
EMMA2_DCASB
EMMA2_DRASB
EMMA2_DBA0
EMMA2_DCSB
EMMA2_DQM1
2099_RESETB
DS656_HS
DS656_VS
JL3512
JL3514
+2V5
+3V3
3V3_EMMA
3V3_EMMA
EMMA2_DVREF
E2_DS656_CK
10k
R3590
2099_INTB
JL3536
GND_1
GND_1
GND_1
+2V5_DDR
LAMP_IGN_INT
10k
R3596
XX
C3548
GND_1
AVC_DVO_ENB
10k
R3599
EMMA2_DQS1
EMMA2_DQS0
TUE_LNA_SW
10V
4.7
2012
C3501
2012
10V
4.7
X7R
C3517
0uH
FB3508
0uH
FB3503
0.1
C3526
16V
0.1
C3513
16V
0.1
C3522
16V
0.1
C3524
16V
0.1
C3511
16V
0.1
C3520
16V
0.1
C3521
16V
0.1
C3512
16V
0.1
C3515
16V
0.1
C3523
16V
0.1
C3525
16V
0.1
C3514
16V
0.1
C3510
EMMA2_DQ[0]
EMMA2_DQ[1]
EMMA2_DQ[2]
EMMA2_DQ[3]
EMMA2_DQ[4]
EMMA2_DQ[5]
EMMA2_DQ[6]
EMMA2_DQ[7]
EMMA2_DQ[8]
EMMA2_DQ[9]
EMMA2_DQ[10]
EMMA2_DQ[11]
EMMA2_DQ[12]
EMMA2_DQ[13]
EMMA2_DQ[14]
EMMA2_DQ[15]
EMMA2_DADD[0]
EMMA2_DADD[1]
EMMA2_DADD[2]
EMMA2_DADD[3]
EMMA2_DADD[4]
EMMA2_DADD[5]
EMMA2_DADD[6]
EMMA2_DADD[7]
EMMA2_DADD[8]
EMMA2_DADD[9]
EMMA2_DADD[10]
EMMA2_DADD[11]
EMMA2_DADD[12]
DS656_E2LR_D[0]
DS656_E2LR_D[3]
DS656_E2LR_D[6]
DS656_E2LR_D[7]
DS656_E2LR_D[5]
DS656_E2LR_D[4]
DS656_E2LR_D[2]
DS656_E2LR_D[1]
AVC_TSD[0]
AVC_TSVAL
AVC_TSCLK
CI_TSVAL
CI_TSSYNC
E2_DS656_CK
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
DIFFERENTIAL PAIR SIGNALS
MEMORY
MEMORY
MEMORY
CI
BUFF
VIDEO IN
CI
CI
EPP
TVM
AVC
TUE
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
FB2
13C/17
- 118 -
~ FB2 Board Schematic Diagram [ PC & HDMI Inputs ] Page 13D/17 ~
11
21
22
R
Q
P
EE
FF
S
T
U
V
W
X
Y
Z
AA
BB
CC
DD
20
18
19
17
15
16
14
12
13
JL3531
EMMA2_RDATA[0-7]
47
R3569
EMMA2_RADD[19-25]
TP3530
XX
C3528
XX
C3529
JL3529
JL3528
1k
R3566
10k
R3568
47
R3567
CI_TSCLK,CI_TSSYNC,CI_TSVAL
47
R3570
47
R3571
8
7
6
5
4
3
2
1
ICS7150MLFT
IC3501
X1
NC
VIN
GND
CLK
VDD
PD
X2
R3556
10k
M
1
7
J
9
J
1
0
J
1
1
J
1
2
J
1
3
K
9
K10
K11
K12
K13
L
9
L
1
0
L
1
1
L
1
2
L
1
3
M
9
M
1
0
M
1
1
M
1
2
M
1
3
N
9
N10
N11
N12
N13
U11
U12
U13
V13
P2
G2
R2
G1
K3
V1
C1
Y1
P3
B1
E4
F2
H1
R1
R3
T1
T3
U1
D1
D2
C3
U2
R4
V2
W2
V4
C2
D4
E2
J1
G3
J4
K4
L2
M2
N2
L4
M4
J3
H3
M1
N1
K1
N3
T2
M3
L3
H4
G4
J2
H2
F1
E3
E1
D3
V3
K2
L1
P1
T4
W1
U3
U4
AA18
Y18
Y2
P4
F3
AA11
Y10
V7
M21
N17
UPD61123F1-100-KA3-A
IC3502
IORDB / PPORT30
P2
INPACKB / PPORT33
G2
GPIO_VS1B / PPORT28
R2
GPIO_RESET / PPORT32
G1
GPIO_IREQB / PPORT24
K3
GPIO_CD1B / PPORT26
V1
GPIO_CD2B / PPORT35
C1
PCE1B(CE2B_2) / PPORT36
Y1
PCE0B(CE2B_1) / PPORT27
P3
IOSI16B / PPORT25
B1
STP1_STRT / PPORT38
E4
STP1_EN / PPORT37
F2
STP1_CLK / PPORT29
H1
RDATA15 / STP1_DAT7 / BOOT_NAND_SEL1
R1
RDATA14 / STP1_DAT6 / BOOT_NAND_SEL0
R3
RDATA13 / STP1_DAT5 / BOOTSEL1
T1
RDATA12 / STP1_DAT4 / BOOTSEL0
T3
RDATA11 / STP1_DAT3 / MINIBOOT
U1
RDATA10 / STP1_DAT2 / BWSEL
D1
RDATA9 / STP1_DAT1 / ROMBEND
D2
RDATA8 / STP1_DAT0 / MCLKSEL2
C3
RDATA7 / MCLKSEL1
U2
RDATA6 / MCLKSEL0
R4
RDATA5 / VRCLKSEL1
V2
RDATA4 / VRCLKSEL0
W2
RDATA3
V4
RDATA2 / MRGMODE1
C2
RDATA1 / MRGMODE0
D4
RDATA0 / ENDIAN
E2
RADD25 / HSD7 / EJTAG_MODE
J1
RADD24 / HSD6 / DINT_EN
G3
RADD23 / HSD5 / DSYSELB
J4
RADD22 / HSD4 / PCI_MODE
K4
RADD21 / HSD3 / PCI_SIZE1
L2
RADD20 / HSD2 / PCI_SIZE0
M2
RADD19 / HSD1 / NAND_CS
N2
RADD18 / HSD0
L4
RADD17 / PKTSTRT
M4
RADD16 / HSDE
J3
RADD15 / HSDCLK
H3
RADD14
M1
RADD13
N1
RADD12
K1
RADD11
N3
RADD10
T2
RADD9
M3
RADD8
L3
RADD7
H4
RADD6
G4
RADD5
J2
RADD4
H2
RADD3
F1
RADD2
E3
RADD1
E1
RADD0
D3
FCSB1
V3
FCSB0
K2
FWEB
L1
FOEB
P1
NSEB
T4
NRBB
W1
NCLE
U3
NALE
U4
GCSB3 / PPORT50
AA18
GCSB2 / PPORT49
Y18
GCSB1
Y2
GCSB0
P4
GRDYB
F3
RSTSWB
AA11
RSTOUT
Y10
PWMOUT
V7
CLK27IN
M21
AVDDP
N17
AGNDP
M17
GND
J9
GND
J10
GND
J11
GND
J12
GND
J13
GND
K9
GND
K10
GND
K11
GND
K12
GND
K13
GND
L9
GND
L10
GND
L11
GND
L12
GND
L13
GND
M9
GND
M10
GND
M11
GND
M12
GND
M13
GND
N9
GND
N10
GND
N11
GND
N12
GND
N13
AGNDV
U11
AGNDV
U12
AGNDV
U13
AGNDV
V1
3
27MHz
X3501
0uH
FB3504
0
R3584
XX
R3580
FE_MRSTB
RSTB
2099_RESETB
NAND_ALE
NAND_CLE
FOEB
FWEB
FCSB0
3V3_EMMA
+3V3
1V5_E2LR
CI_TSD[0-7]
10k
R3590
2099_INTB
JL3536
GND_1
GND_1
GND_1
GND_1
GND_1
LAMP_IGN_INT
10k
R3599
NAND_RBB
2012
10V
4.7
C3536
0uH
FB3506
0.1
C3530
16V
1005
1005
16V
0 . 1
C3527
16V
0.1
C3538
16V
0.1
C3539
16V
0.1
C3537
EMMA2_RDATA[0]
EMMA2_RDATA[1]
EMMA2_RDATA[2]
EMMA2_RDATA[3]
EMMA2_RDATA[4]
EMMA2_RDATA[5]
EMMA2_RDATA[6]
EMMA2_RDATA[7]
EMMA2_RADD[22]
EMMA2_RADD[23]
EMMA2_RADD[24]
EMMA2_RADD[25]
EMMA2_RADD[20]
EMMA2_RADD[21]
EMMA2_RADD[19]
CI_TSCLK
CI_TSVAL
CI_TSSYNC
CI_TSD[7]
CI_TSD[6]
CI_TSD[5]
CI_TSD[4]
CI_TSD[3]
CI_TSD[2]
CI_TSD[1]
CI_TSD[0]
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
LAYOUT NOTE:-
REMOVE GND PLANE AROUND IC3501 AND X3501
AND ALSO FROM UNDERNEATH X3501 AND IC3501
INCLUDING TRACKS FROM XTAL TO IC.
REMOVE GND PLANE AROUND IC3501 AND X3501
AND ALSO FROM UNDERNEATH X3501 AND IC3501
INCLUDING TRACKS FROM XTAL TO IC.
27MHz CLOCK
CI
MEMORY
MEMORY & CI
CN / AV /MS
CI
TVM
FB2
13D/17
- 119 -
~ FB2 Board Schematic Diagram [ PC & HDMI Inputs ] Page 14A/17 ~
10
11
12
13
14
15
16
1
5
6
4
2
3
8
9
7
J
I
H
K
L
M
D
C
A
B
E
F
G
J
I
H
K
L
M
D
C
A
B
E
F
G
GND_1
GND_1
EMMA2_RADD[19-25]
GND_1
EMMA2_RDATA[0-7]
GND_1
470
R3606
GND_1
EMMA2_DQ[0-15]
EMMA2_DADD[0-12]
GND_1
1k
R3633
1k
R3630
XX
R3629
XX
R3632
XX
R3626
XX
R3631
XX
R3625
1k
R3628
1k
R3627
1k
R3624
1k
R3611
1k
R3609
XX
R3604
1k
R3623
R3603
1k
XX
R3610
XX
R3600
10k
R3615
XX
R3601
XX
R3614
GND_1
100
R3622
JL3600
JL3601
TP3603
2.5mm Side A
TP3602
2.5mm Side A
0uH
FB3600
0uH
FB3601
NAND_WPB
NAND_ALE
FOEB
NAND_CLE
RSTB
FCSB0
FWEB
NAND_RBB
EMMA2_DBA1
EMMA2_DRASB
EMMA2_DCSB
EMMA2_DQM0
EMMA2_DWEB
EMMA2_DCASB
EMMA2_DBA0
EMMA2_DQS0
1k
R3617
1k
R3639
1k
R3619
1k
R3602
R3634
1k
XX
R3636
1k
R3635
XX
R3607
1k
R3621
1k
R3608
1k
R3605
1k
R3612
XX
R3613
1k
R3620
1k
R3616
1k
R3638
XX
R3637
1k
R3618
+3V3
+3V3
CI_TSD[0-7]
+2V5_DDR
10V 4.7 C3603
2012
10V 4.7 C3600
2012
16V 0.1 C3604
16
V
V
0. C
3
16V 0.1 C3601
16V 0.1 C3602
48
43
6
5
46
4
3
2
1
47
45
44
42
41
37
38
39
40
12
10
11
9
8
7
36
31
32
33
34
35
18
17
16
15
14
13
30
29
28
27
26
25
24
23
22
21
20
19
K9F5608U0D-PIB0T
IC3600
NC
NC
NC
NC
NC
NC
RB
FOE
CE
NC
NC
VCC
VSS
NC
NC
CLE
ALE
WE
WP
NC
NC
NC
NC
NC
NC
NC
NC
NC
I/O1
I/O2
IO/3
IO/4
NC
NC
NC
VSS
VCC
LOCKPRE
NC
NC
IO/5
IO/6
IO/7
IO/8
NC
NC
NC
NC
EMMA2_DQ[1]
EMMA2_DQ[5]
EMMA2_RDATA[2]
EMMA2_DQ[4]
EMMA2_RDATA[7]
EMMA2_RDATA[2]
EMMA2_RDATA[0]
EMMA2_DADD[10]
EMMA2_RDATA[6]
EMMA2_DADD[2]
EMMA2_RDATA[5]
EMMA2_RDATA[4]
EMMA2_DADD[0]
EMMA2_RADD[24]
EMMA2_DQ[2]
EMMA2_DADD[3]
EMMA2_RDATA[4]
EMMA2_DQ[7]
EMMA2_RDATA[3]
EMMA2_RDATA[7]
EMMA2_DQ[6]
EMMA2_RDATA[5]
EMMA2_RADD[23]
EMMA2_RDATA[3]
EMMA2_RDATA[6]
EMMA2_RADD[22]
EMMA2_RDATA[1]
EMMA2_RADD[25]
EMMA2_RDATA[1]
EMMA2_DADD[1]
EMMA2_RADD[21]
EMMA2_RDATA[0]
EMMA2_RADD[20]
EMMA2_DQ[3]
EMMA2_DQ[0]
CI_TSD[7]
CI_TSD[6]
CI_TSD[5]
CI_TSD[4]
CI_TSD[3]
CI_TSD[2]
CI_TSD[1]
CI_TSD[0]
EMMA2_RADD[19]
MRGMODE0
STRAP PINS
EMMA2LR
MCLKSEL2
ENDIAN
EMMA2LR
EJTAG_MODE
MINIBOOT
ROMBEND
DINT_EN
BOOTSEL1
MRGMODE1
DSYSELB
SAMSUNG 256Mb
NAND FLASH
MCLKSEL0
PCIMODE
VRCLKSEL0
BOOT_NAND_SEL_1
PCI_SIZE1
VRCLKSEL1
ENDIAN = 1 = Big Endian
MRGMODE1-0 = 10 = Full merge & All bytes
VRCLKSEL1-0 = 10 = 187MHz
MCLKSEL2-0 = 101 = 166.5MHz
ROMBEND = 1 = Big Endian
BWSEL = 1 = 8bit
MINIBOOT = 1 = use miniboot
BOOTSEL1-0 = 11 = Nand, then Memory Stick
BOOT_NAND_SEL1-0 = 00 = <256mbit
EJTAG_MODE = 1 = EJTAG
DINT_EN = 0 = disable
DSYSELB = 1 = main only
PCIMODE = 1 = host
PCI_SIZE1-0 = 00 = 32Mbyte
NANDCS = 0 = CS0
PCI_SIZE0
BWSEL
BOOTSEL0
NANDCS
RESERVED
MCLKSEL1
BOOT_NAND_SEL_0
PLACE THE
S
EMMA2LR
NOTE: PIN-6 IS GND
ON TOSHIBA DEVICES
TO FORCE BOOT FROM MEMORY-STICK:
CONNECT (SHORT) TP3602 AND TP3603
FB2-FIX2
FB2
14A/17
Click on the first or last page to see other KDL-40X3500 / KDL-46X3500 / KDL-52X3500 service manuals if exist.