Sony DVP-CX777ES Service Manual ▷ View online
109
DVP-CX777ES
•
MB BOARD IC403 CXD1935Q (AV DECODER)
Pin No.
Pin Name
I/O
Description
1
IOVDD00
—
Power supply terminal (+3.3V) (for digital system)
2 to 5
HDATA0 to
HDATA3
I/O
Two-way data bus terminal
6
CVS00
—
Ground terminal (for digital system)
7 to 10
HDATA4 to
HDATA7
I/O
Two-way data bus terminal
11
CVD00
—
Power supply terminal (+1.8V) (for digital system)
12 to 15
HDATA8 to
HDATA11
I/O
Two-way data bus terminal
16
IOVSS00
—
Ground terminal (for digital system)
17 to 20
HDATA12 to
HDATA15
I/O
Two-way data bus terminal
21
CVS01
—
Ground terminal (for digital system)
22
ACLK
I
Audio clock signal input from the clock generator
23
CVD01
—
Power supply terminal (+1.8V) (for digital system)
24
ACH12O
O
Audio data (for front) output to the audio DSP
25
ACH34O
O
Audio data (for rear) output to the audio DSP
26
ACH56O
O
Audio data (for center and woofer) output to the audio DSP
27
IOVDD01
—
Power supply terminal (+3.3V) (for digital system)
28
LRCKO
O
L/R sampling clock output to the audio DSP
29
BCKO
O
Bit clock output to the audio DSP
30
DO
O
Serial data output terminal Not used
31
CDIN2I
I
Digital audio data input from the DSP
32
CDIN1I
I
Serial data input from the DSP
33
IOVSS01
—
Ground terminal (for digital system)
34
CDBCKI
I
Bit clock input from the DSP
35
CDLRKI
I
L/R sampling clock input from the DSP
36
CVS02
—
Ground terminal (for digital system)
37 to 40
DT0I to DT3I
I
Stream data input from the DSP
41
IOVDD02
—
Power supply terminal (+3.3V) (for digital system)
42 to 45
DT4I to DT7I
I
Stream data input from the DSP
46
CVD02
—
Power supply terminal (+1.8V) (for digital system)
47
ICLKI
I
Stream data bus clock signal input from the DSP
48
IERRIN
I
Stream data bus error flag signal input from the DSP
49
ISTARTIN
I
Stream data bus header signal input from the DSP
50
IVALIN
I
Stream data bus acknowledge signal input from the DSP
51
IREQON
O
Stream data bus request signal output to the DSP
52
IOVSS02
—
Ground terminal (for digital system)
53
IOAVSS00
—
Ground terminal (for analog system)
54
AVDD00
—
Power supply terminal (+3.3V) (for analog system)
55
YOUT
O
Y (luminance) analog video signal output terminal Not used
56
AVSS00
—
Ground terminal (for analog system)
57
GOUT
O
Green analog video signal output terminal Not used
58
AVDD01
—
Power supply terminal (+3.3V) (for analog system)
59
ROUT
O
Red analog video signal output terminal Not used
60
AVSS01
—
Ground terminal (for analog system)
110
DVP-CX777ES
Pin No.
Pin Name
I/O
Description
61
BOUT
O
Blue analog video signal output terminal Not used
62
AVDD02
—
Power supply terminal (+3.3V) (for analog system)
63
COUT
O
C (chroma) analog video signal output terminal Not used
64
AVSS02
—
Ground terminal (for analog system)
65
COMPOUT
O
Composite analog video signal output terminal Not used
66
DVSS33
—
Ground terminal (for digital system)
67
DVDD33
—
Power supply terminal (+3.3V) (for digital system)
68
VGO
I
Connected to the power supply (+3.3V) with capacitor
69
IOAVDD00
—
Power supply terminal (+3.3V) (for analog system)
70, 71
VREF
I
D/A converter reference voltage input terminal
72
IOVDD03
—
Power supply terminal (+3.3V) (for digital system)
73
FLEDO
O
Field ID output terminal Not used
74
HSYNCO
O
Horizontal sync signal terminal Not used
75
CVS03
—
Ground terminal (for digital system)
76, 77
DSPACK0,
DSPACK1
I
Acknowledge signal input from the audio DSP
78
CVD03
—
Power supply terminal (+1.8V) (for digital system)
79
IOVSS03
—
Ground terminal (for digital system)
80
I2C_CLK
—
Not used
81
CVS04
—
Ground terminal (for digital system)
82
I2C_DATA
—
Not used
83
IOVDD04
—
Power supply terminal (+3.3V) (for digital system)
84 to 87
DVO0 to DVO3
O
Digital video signal output to the I/P converter
88
CVD04
—
Power supply terminal (+1.8V) (for digital system)
89 to 92
DVO4 to DVO7
O
Digital video signal output to the I/P converter
93
BF_ID
O
Blending factor exist ID output terminal Not used
94
NC
—
Not used
95
D1CLKO
O
Digital video clock (27 MHz) output to the I/P converter
96
IOVSS04
—
Ground terminal (for digital system)
97
TDI
I
Serial data input from the I/P converter
98
TDO
O
Serial data output terminal
99
TCK
I
Clock signal input terminal
100
IOVDD05
—
Power supply terminal (+3.3V) (for digital system)
101
TMS
I
Mode selection signal input terminal
102
TRST
I
Reset signal input from the interface controller “L”: reset
103
CVS05
—
Ground terminal (for digital system)
104
IOVSS05
—
Ground terminal (for digital system)
105 to 108
SDAD2O to
SDAD5O
O
Address signal output to the SD-RAM
109
CVD05
—
Power supply terminal (+1.8V) (for digital system)
110 to 113
SDAD0O, SDAD1O,
SDAD6O, SDAD7O
O
Address signal output to the SD-RAM
114
IOVDD06
—
Power supply terminal (+3.3V) (for digital system)
115, 116
SDAD8O,
SDAD10O
O
Address signal output to the SD-RAM
117
SDAD12O
O
Address signal output terminal Not used
118
SDAD9O
O
Address signal output to the SD-RAM
111
DVP-CX777ES
Pin No.
Pin Name
I/O
Description
119
IOVSS06
—
Ground terminal (for digital system)
120
SDAD11O
O
Address signal output to the SD-RAM
121, 122
SDCS0ON,
SDCS1ON
O
Chip select signal output to the SD-RAM
123
IOVDD07
—
Power supply terminal (+3.3V) (for digital system)
124
SDCKEO
O
Clock enable signal output to the SD-RAM
125
SDRASON
O
Row address strobe signal output to the SD-RAM
126
IOVSS07
—
Ground terminal (for digital system)
127
SDCLKO
O
Clock (108 MHz) signal output to the SD-RAM
128
IOVDD08
—
Power supply terminal (+3.3V) (for digital system)
129
SDCASON
O
Column address strobe signal output to the SD-RAM
130
SDWEON
O
Write enable signal output to the SD-RAM
131
CVS06
—
Ground terminal (for digital system)
132, 133
SDDQM0O,
SDDQM1O
O
DQM signal output to the SD-RAM
134
IOVSS08
—
Ground terminal (for digital system)
135 to 138
SDDQ6 to SDDQ9
I/O
Two-way data bus with the SD-RAM
139
CVD06
—
Power supply terminal (+1.8V) (for digital system)
140 to 143
SDDQ4, SDDQ5,
SDDQ10,
SDDQ11
I/O
Two-way data bus with the SD-RAM
144
IOVDD09
—
Power supply terminal (+3.3V) (for digital system)
145 to 148
SDDQ2, SDDQ5,
SDDQ12,
SDDQ13
I/O
Two-way data bus with the SD-RAM
149
IOVSS09
—
Ground terminal (for digital system)
150, 151
SDDQ1, SDDQ14
I/O
Two-way data bus with the SD-RAM
152
IOVDD10
—
Power supply terminal (+3.3V) (for digital system)
153, 154
SDDQ0, SDDQ15
I/O
Two-way data bus with the SD-RAM
155
IOVSS10
—
Ground terminal (for digital system)
156
CRPCLKI
I
Not used
157
TESTI
I
Input terminal for the test (normally: fixed at “H”)
158
CLKI
I
Clock (27 MHz) signal input from the clock generator
159
PAVDD18P
—
Power supply terminal (+3.3V) (for analog system)
160
SCLKI
I
System clock (27 MHz) signal input from the clock generator
161
PAVSS18G
I
Ground terminal (for analog system)
162
MBIST_EN
I
Not used
163
SCAN_MOD
I
Not used
164
SCAN_EN
I
Not used
165
IOVDD11
—
Power supply terminal (+3.3V) (for digital system)
166, 167
HAD22I, HAD23I
I
Chip select signal input from the system controller
168, 169
HAD20I, HAD21I
I
Address signal input terminal
170
CVS07
—
Ground terminal (for digital system)
171 to 174
HAD16I to HAD19I
I
Address signal input terminal
175
IOVSS11
—
Ground terminal (for digital system)
176 to 179
HAD12I to HAD15I
I
Address signal input terminal
180
CVD07
—
Power supply terminal (+1.8V) (for digital system)
181 to 184
HAD8I to HAD11I
I
Address signal input terminal
185
IOVDD12
—
Power supply terminal (+3.3V) (for digital system)
112
DVP-CX777ES
Pin No.
Pin Name
I/O
Description
186 to 189
HAD4I to HAD7I
I
Address signal input terminal
190
CVS08
—
Ground terminal (for digital system)
191 to 194
HAD3I to HAD0I
I
Address signal input terminal
195
IOVSS12
—
Ground terminal (for digital system)
196
HCSN
I
Read enable signal input from the system controller
197
HRWN
I
Write enable signal input from the system controller
198
HCPUMDI
I
CPU mode selection signal input terminal
199
HIRQON
O
Interrupt signal output to the system controller
200
HWAITON
O
Wait signal output to the system controller
201
CVD08
—
Power supply terminal (+1.8V) (for digital system)
202
DMACK1IN
I
Acknowledge signal input from the system controller
203
DMARQ1ON
O
Request signal input from the system controller
204
DMACK0IN
I
Acknowledge signal input from the system controller
205
DMARQ0ON
O
Request signal input from the system controller
206
IOVDD13
—
Power supply terminal (+3.3V) (for digital system)
207
RSTN
I
Reset signal input from the system controller “L”: reset
208
IOVSS13
—
Ground terminal (for digital system)
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