Sony DVP-CX777ES Service Manual ▷ View online
101
DVP-CX777ES
– PANEL-L Board –
IC1007
MSM9201-04GS-K
61
62
40
39
38
59
60
57
58
55
56
53
54
51
52
49
50
47
48
45
46
43
44
41
42
65
63
64
66
68
67
70
71
72
73
74
75
76
77
78
79
80
69
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1 2
COMMAND
DECODER
CONTROL
CIRCUIT
GRID
DRIVER
PORT
DRIVER
TIMING
GENERATOR1
TIMING
GENERATOR2
8BIT
SHIFT
REGISTER
WRITE
ADDRESS
COUNTER
COUNTER
READ
ADDRESS
COUNTER
COUNTER
OSCILLATOR
DUTY
CONTROL
DIGIT
CONTROL
ADDRESS
SELESTOR
ADRAM
24W x 4B
DCRAM
24W x 8B
CGRAM
240W x 35B
CGRAM
16W x 35B
AD
DRIVER
SEGMENT
DRIVER
COM23
COM24
OSC0
VFL1
GND
OSC1
CS
RESET
DA
VDD
P1
P2
P3
P4
VFL2
NC
VDISP2
AD1
AD2
CP
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
AD3
AD4
COM2
COM1
VDISP1
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
COM21
COM22
COM19
COM20
COM17
COM18
COM15
COM16
COM13
COM14
COM11
COM12
COM9
COM10
COM7
COM8
COM5
COM6
COM3
COM4
102
DVP-CX777ES
7-44.
IC PIN FUNCTION DESCRIPTION
•
MB BOARD IC104 MB91307RPFV-G-BND-E1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 5
HA17 to HA21
O
Address signal output terminal
6
(NOT_USED)
O
Not used
7
WP
O
Write protect signal output to the EEPROM
8
XSACS
O
Chip select signal output to the DSD decoder
9
AVCC
—
Power supply terminal (+3.3V)
10
AVRH
—
Reference voltage input (+3.3V) terminal
11
AVSS
—
Ground terminal
12
DISC_AD
I
Disc detect sensor input terminal
13, 14
MOD_SET1,
MOD_SET2
I
Mode setting input terminal
15
IPSW
I
Scan select switch input terminal
16
XAVDECINT
I
Interrupt signal input from the AV decoder
17
XARPINT
I
Interrupt signal input from the DSP
18
XSDSPINT
I
Interrupt signal input from the DSP
19
XGAINT
I
Interrupt signal input from the mechanism controller
20
XIFINT
I
Interrupt signal input from the interface controller
21
XADSPINT0
I
Interrupt signal input from the audio DSP
22
XADSPINT1
I
Interrupt signal input terminal Not used
23
XSARDY
I
Ready signal input from the DSD decoder
24
VCC
—
Power supply terminal (+3.3V)
25
IFSI
I
Serial data input from the interface controller
26
IFSO
O
Serial data output to the interface controller
27
IFSC
O
Serial clock signal output to the interface controller
28
SIN1
I
Serial data input from the audio DSP, digital audio processor and DSD decoder
29
SOUT1
O
Serial data output to the audio DSP, D/A converter, digital audio processor and DSD decoder
30
SCK1
O
Serial clock signal output to the audio DSP, D/A converter, digital audio processor and DSD
decoder
decoder
31
RX
I
Serial data input terminal (for check)
32
TX
O
Serial data output terminal (for check)
33
XDVD/SACD
O
DVD/SACD selection signal output terminal Not used
34
VSS
—
Ground terminal
35
XRSTO
O
Reset signal output to the DSP, AV decoder, audio DSP, D/A converter, mechanism controller
and digital audio processor “L”: reset
and digital audio processor “L”: reset
36
WIDE
O
Wide control signal output terminal
37
(RGBSEL)
O
Not used
38
SDA
I/O
Two-way data bus with EEPROM, I/P converter and D/A converter
39
SCL
O
Serial clock signal output to the EEPROM, I/P converter and D/A converter
40
XSARST
O
Reset signal output to the DSD decoder “L”: reset
41
(EUROY/V)
O
Not used
42
(ISEL)
O
Not used
43
MODE_SELECT0
I
Mode selection signal input terminal (Fixed at “H” in this set)
44, 45
MODE_SELECT1,
MODE_SELECT2
I
Mode selection signal input terminal (Fixed at “L” in this set)
46
AVDREQ0
I
Request signal input from the AV decoder
47
AVDDACK0
O
Acknowledge signal output to the AV decoder
48
XDRVMUTE
O
Drive muting signal output to the motor/coil driver
103
DVP-CX777ES
Pin No.
Pin Name
I/O
Description
49
AVDREQ1
I
Request signal input from the AV decoder
50
AVDDACK1
O
Acknowledge signal output to the AV decoder
51
XIFCS
O
Chip select signal output to the interface controller
52
VSS
—
Ground terminal
53
X1
O
System clock output terminal (16.5 MHz)
54
X0
I
System clock input terminal (16.5 MHz)
55
VCC
—
Power supply terminal (+3.3V)
56
(CKSW1)
O
Not used
57
(OCSW1)
O
Not used
58
XROMCS
O
Chip select signal output to the flash memory
59
XRAMCS
O
Chip select signal output to the S-RAM
60, 61
XAVCS0, XAVCS1
O
Chip select signal output to the AV decoder
62
XARPCS
O
Chip select signal output to the DSP
63
XSDSPCS
O
Chip select signal output to the DSP
64
VCCI
—
Power supply terminal (+1.8V)
65
XGACS
O
Chip select signal output to the mechanism controller
66
(NC)
O
Not used
67
XWAIT
I
Wait signal input from the DSP and AV decoder
68
TEST (H)
I
Input terminal for the test (normally: fixed at “H”)
69
TEST
I
Input terminal for the test
70
XRD
O
Read enable signal output to the flash memory, S-RAM, DSP, AV decoder and mechanism
controller
controller
71
XWRH
O
High byte write enable signal output to the flash memory, S-RAM, DSP, AV decoder and
mechanism controller
mechanism controller
72
XWRL
O
Low byte write enable signal output to the S-RAM
73
XNMI
I
Not used
74
VCCI
—
Power supply terminal (+1.8V)
75
VSS
—
Ground terminal
76
XRESET
I
Reset signal input from the interface controller “L”: reset
77
CPUCK
O
Master clock (33 MHz) signal output to the mechanism controller
78
SMUTE
O
Soft muting control signal output to the DSD decoder
79
XDACS
O
Chip select signal output to the D/A converter
80
XADSPCS
O
Chip select signal output to the audio DSP
81
48/44.1K
O
PLL frequency control signal output to the clock generator
82
XLDON
O
Laser diode control signal output to the RF amplifier
83
MAMUTE
O
Audio muting control signal output terminal
84
XSRWE
O
Write enable signal to the S-RAM
85 to 100
HD0 to HD15
I/O
Two-way data bus terminal
101
VSS
—
Ground terminal
102 to 109
HA0 to HA7
O
Address signal output terminal
110
VCC
—
Power supply terminal (+3.3V)
111 to 118
HA8 to HA15
O
Address signal output terminal
119
VSS
—
Ground terminal
120
HA16
O
Address signal output terminal
104
DVP-CX777ES
•
MB BOARD IC201 SP3726A (CD/DVD/SACD RF AMP, FOCUS/TRACKING ERROR AMP)
Pin No.
Pin Name
I/O
Description
1, 2
RFIP, RFIN
I
RF signal input from the optical pick-up block
3
CP
—
Tracking low-pass filter terminal
4
WIN
I
Wobble detection signal input terminal Not used
5
WPP
O
Wobble push-pull signal output terminal Not used
6
CN
—
Tracking low-pass filter terminal
7 to 10
A2 to D2
I
Photo detector interface input from the optical pick-up block
(AC coupled input for the DPD and wobble)
(AC coupled input for the DPD and wobble)
11 to 14
D to A
I
Photo detector interface input from the optical pick-up block (main)
15, 16
E, F
I
Photo detector interface input from the optical pick-up block (sub)
17
SIGDET B
O
Signal detection signal output to the DSP
18
INTR
I
Interruption control signal input from the DSP
19
VC
O
Reference voltage (+2.5V) output to the optical pick-up block
20
VPB
—
Power supply terminal (+5V) ( for servo block)
21
PGSELO
O
PDIC gain selection signal output to the optical pick-up block
22
PD
I
Automatic power control signal input from the optical pick-up block
23
VNB
—
Ground terminal (for servo block)
24
LDSELO
O
Automatic power control laser diode selection signal output to the optical pick-up block
25
DVDLD
O
DVD automatic power control signal output terminal
26
CDLD
O
CD automatic power control signal output terminal
27
LDONB
I
Laser diode output control signal input from the system controller
28
MEVO
O
Envelope signal output terminal for mirror
29
MIN
I
RF signal input terminal for mirror
30
MP
—
Mirror top hold terminal
31
MB
—
Mirror bottom hold terminal
32
MLPF
—
Mirror low-pass filter terminal
33
MIRR
O
Mirror signal output to the DSP
34
BYP2
—
Servo AGC gain control terminal
35
PII
I
Pull-in signal input terminal
36
PI
O
Pull-in signal output to the DSP
37
TZC
O
Tracking zero crossing signal output to the DSP
38
DFT
O
Defect signal output to the DSP
39
VCI
I
Reference voltage input from the motor/coil driver
40
TZIN
I
Tracking zero crossing signal input terminal
41
TE
O
Tracking error signal output to the DSP
42
FE
O
Focusing error signal output to the DSP
43
TPH
—
Pull-in top hold terminal
44
MON
O
Monitor signal output to the DSP
45
SRD
O
Serial data output to the DSP
46
SWD
I
Serial data input from the DSP
47
SCLK
I
Serial clock signal input from the DSP
48
SDEN
I
Serial data enable signal input from the DSP
49
V33
—
Power supply terminal (+3.3V) (for CMOS output buffers)
50
RX
I
Reference resistor input terminal
51
TPA
—
RF top hold terminal
52
MEV
—
RF bottom envelope terminal
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