Sony DAV-C770 / HCD-C770 / HCD-C990 Service Manual ▷ View online
101
HCD-C770/C990
Pin No.
Pin Name
I/O
Description
122
WRFD
I
Not used
123
WCK
I
Operation clock signal input for PSP physical disc mark detection from the DVD decoder
124, 125
WAVDD0,
WAVDD1
—
A/D power supply terminal (+2.5V) (for PSP physical disc mark detection)
126
WARFI
I
Analog RF signal input for PSP physical disc mark detection from the DVD/CD RF amplifier
127
WAVRB
I
A/D bottom reference terminal for PSP physical disc mark detection
128, 129
WAVSS0, WAVSS1
—
A/D ground terminal (for PSP physical disc mark detection)
130
VSIO
—
Ground terminal (for I/O)
131 to 134
DQ7 to DQ4
I/O
Two-way data bus with the SD-RAM
135
VDIOA2
—
Power supply terminal (+3.3V) (for I/O)
136 to 139
DQ3 to DQ0
I/O
Two-way data bus with the SD-RAM
140
VSIOA3
—
Ground terminal (for I/O)
141
DCLK
O
Clock signal output to the SD-RAM
142
DCKE
O
Clock enable signal output to the SD-RAM
143
XWE
O
Write enable signal output to the SD-RAM
144
XCAS
O
Column address strobe signal output to the SD-RAM
145
XRAS
O
Row address strobe signal output to the SD-RAM
146
VDIOA3
—
Power supply terminal (+3.3V) (for I/O)
147
NC
O
Not used
148, 149
A11, A10
O
Address signal output to the SD-RAM
150
VSCA3
—
Ground terminal (for core)
151, 152
A9, A8
O
Address signal output to the SD-RAM
153
VDCA3
—
Power supply terminal (+2.5V) (for core)
154 to 157
A7 to A4
O
Address signal output to the SD-RAM
158
VSIOA4
—
Ground terminal (for I/O)
159 to 162
A3 to A0
O
Address signal output to the SD-RAM
163
VDIOA4
—
Power supply terminal (+3.3V) (for I/O)
164
XSRQ
O
Serial data request signal output to the DVD decoder
165
XSHD
I
Header flag signal input from the DVD decoder
166
SDCK
I
Serial data transfer clock signal input from the DVD decoder
167
XSAK
I
Serial data effect flag signal input from the DVD decoder
168
SDEF
I
Error flag signal input from the DVD decoder
169 to 176
SD0 to SD7
I
Stream data signal input from the DVD decoder
102
HCD-C770/C990
•
DVD BOARD IC901
µ
PD703033BYGF-M01-3BA (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DAMP-DATA
O
Serial data output to the stream processors
2
DAMP-CLK
O
Serial data transfer clock signal output to the stream processors
3
I2C-DATA
I/O
Communication data bus with the DVD system processor and mechanism controller
4
CQ-RST
O
Reset signal output to the DVD system processor “L”: reset
5
I2C-CLK
I/O
Communication data reading clock signal input or transfer clock signal output with the DVD
system processor and mechanism controller
system processor and mechanism controller
6
DSP-DO
I
Write data input from the audio digital signal processor
7
DIG-DI
O
Read data output to the digital audio interface IC, audio digital signal processor and D/A
converter
converter
8
DIG-CLK
O
Clock signal output to the digital audio interface IC, audio digital signal processor and D/A
converter
converter
9
EVDD
—
Power supply terminal (+5V)
10
EVSS
—
Ground terminal
11
P-PWM
O
PWM voltage control signal output
12
DSP-RST
O
Reset signal output to the audio digital signal processor “L”: reset
13
DSP-PM
O
PLL reset signal output to the audio digital signal processor “L”: reset
14
DSP-CS
O
Chip select signal output to the audio digital signal processor
15
DSP-HACN
I
Acknowledge signal input from to the audio digital signal processor
16
DSP-BST
O
Boot trap signal output to the audio digital signal processor
17
DSP-GP9
I
Decode signal input from to the audio digital signal processor
18
DIR-ZERO
I
Audio serial data input from the digital audio interface IC
19
DIR-ERR
I
PLL lock error and data error flag input from the digital audio interface IC
20
DIR-CE
O
Chip enable signal output to the digital audio interface IC
21
VPP
—
Power supply terminal (for programming) Not used
22
DIR-XST
I
Source clock switching monitor input from the digital audio interface IC
23
DIR-AD
O
Not used
24
DIR-XMODE
I
System reset signal input from the digital audio interface IC “L”: reset
25
DI
I
Write data input from the digital audio interface IC
26
DAMP-RST
O
Reset signal output to the stream processors “L”: reset
27
DAMP-MUTEG
O
Muting on/off control signal output to the stream processors “H”: muting on
28
DAMP-MUTEN
O
Muting on/off control signal output to the stream processors “H”: muting on
29
CS1
O
Chip select signal output to the stream processor (for front L-ch and R-ch)
30
CS2
O
Chip select signal output to the stream processor (for center and woofer)
31
CS3
O
Chip select signal output to the stream processor (for rear L-ch and R-ch)
32
DAC-CS
O
Chip select signal output to the D/A converter
33
AD-RST
O
Reset signal output to the A/D converter and D/A converter “L”: reset
34
RESET
I
System reset signal input “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
35
XT1
I
Sub system clock input terminal Not used
36
XT2
O
Sub system clock output terminal Not used
37
REG0
—
Not used
38
X2
O
Main system clock output terminal (20 MHz)
39
X1
I
Main system clock input terminal (20 MHz)
40
VSS
—
Ground terminal
41
VDD
—
Power supply terminal (+5V)
42
CLKOUT
O
Clock signal output terminal Not used
103
HCD-C770/C990
Pin No.
Pin Name
I/O
Description
43
DIP-RST
O
Reset signal output to the power amplifier “L”: reset
44
DIP-OCP
I
Protect signal input from the power amplifier
45
ST-POWER
O
System power on/off control signal output “H”: power on
46
HP-MUTE
O
Headphone muting on/off control signal output “L”: muting on
47
AU-MUTE
O
Audio line muting on/off control signal output “L”: muting on
48
AV-SEL2
O
Audio/video selection signal output
49
PROG SW
I
SCAN SELECT switch input terminal “L”: SELECTABLE, “H”: INTERLACE
50
TU-ON
O
Power supply for tuner pack on/off control signal output
51
TUNED
I
Tuning detection signal input from the tuner unit “L”: tuned
52
TUN-DI
I
Serial data input from the tuner unit
53
TUN-CE
O
Chip enable signal output to the tuner unit
54
TUN-DO
O
Serial data output to the tuner unit
55
TUN-CLK
O
Serial data transfer clock signal output to the tuner unit
56
FL-MUTE
O
Reset signal output to the fluorescent indicator tube driver “L”: reset
57
FL-CLK
O
Serial data transfer clock signal output to the LED driver and fluorescent indicator tube driver
58
BVDD
—
Power supply terminal (+5V) (for bus interface)
59
BVSS
—
Ground terminal (for bus interface)
60
FL-DATA
O
Serial data output to the LED driver and fluorescent indicator tube driver
61
FL-CS
O
Chip select signal output to the fluorescent indicator tube driver “L” active
62
LED-CS
O
Standby signal output to the LED driver “L”: standby
63
LED-CLR
O
Reset signal output to the LED driver “L”: reset
64
HPSW
I
Connection detection signal input of the headphone jack
“L”: no connected, “H”: headphone connected
“L”: no connected, “H”: headphone connected
65
DFIL RST2
O
Reset signal output to the digital audio processor “L”: reset
66
SP RELAY
O
Relay drive signal output terminal for the speaker protect Not used
67
PARA-DO2
I
Serial data input from the changer controller (rotary encoder)
68
PARA-RST
O
Reset signal output to the changer controller (motor, switch) and changer controller (rotary
encoder) “L”: reset
encoder) “L”: reset
69
PARA-LT1
O
Serial data latch pulse signal output to the changer controller (motor, switch)
70
PARA-LT2
O
Serial data latch pulse signal output terminal Not used
71
PARA-CLK
O
Serial data transfer clock signal output to the changer controller (motor, switch)
72
PARA-DATA
O
Serial data output to the changer controller (motor, switch)
73
PARA-DO1
I
Serial data input terminal Not used
74
AVDD
—
Power supply terminal (+5V) (analog system)
75
AVSS
—
Ground terminal (analog system)
76
AVREF
I
Reference voltage (+5V) input terminal (analog system)
77
NO USE
—
Not used
78
OPT-SEN2
I
Not used
79
OPT-SEN
I
Disc insert detection signal input from the disc sensor
80
AREA1
I
Destination setting terminal
81
SEN2
I
Disc loading detection signal input
82 to 84
KEY0 to KEY2
I
Key input terminal (A/D input)
85
EN-A
I
Jog dial pulse input from the rotary encoder (A phase input)
86
EN-B
I
Jog dial pulse input from the rotary encoder (B phase input)
87
MODEL
I
Model setting terminal
88
RDS-DATA
I
RDS serial data input from the RDS decoder (Used for the AEP model)
89
DVD-POWER
O
DVD power on/off control signal output “H”: power on
90
STOP
I
System stop signal input
104
HCD-C770/C990
Pin No.
Pin Name
I/O
Description
91
POWER-SW
I
System power on/off control signal input “H”: power on
92
SIRCS
I
Remote control signal input
93
WAKE
I
System wake up signal input by pressing any key on the front panel or remote commander or disc
insert detect sensor
insert detect sensor
94
RDS-CLK
I
RDS serial data transfer clock signal input from the RDS decoder (Used for the AEP model)
95
AV-SEL0
O
Audio/video selection signal output
96
AV-SEL1
O
Audio/video selection signal output
97
DF-SW
O
selection signal output to the digital audio processor
98
DF-SYNC
O
Sync signal output to the digital audio processor
99
DF-RST
O
Reset signal output for the digital audio processor “L”: reset Not used
100
I2HLP
I/O
Busy signal input/output for the I2C bus
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