Sony BDP-CX960 Service Manual ▷ View online
BDP-CX960
73
Pin No.
Pin Name
I/O
Description
AH3
UMVDD18
-
Power supply terminal (+1.8V)
AH4, AH5
UMDQ30, UMDQ26
I/O
Two-way data bus with the SD-RAM
AH6, AH7
GND
-
Ground terminal
AH8
WMVDD18
-
Power supply terminal (+1.8V)
AH9, AH10
GND
-
Ground terminal
AH11
WMVDD18
-
Power supply terminal (+1.8V)
AH12
GND
-
Ground terminal
AH13
WMCSB1
O
Chip select signal output to the SD-RAM
AH14
WMCASB
O
Column address strobe signal output to the SD-RAM
AH15 to
AH17
WMA11, WMA7,
WMA10
O
Address signal output to the SD-RAM
AH18
GND
-
Ground terminal
AH19
WMVDD18
-
Power supply terminal (+1.8V)
AH20,
AH21
GND
-
Ground terminal
AH22
WMVDD18
-
Power supply terminal (+1.8V)
AH23
GND
-
Ground terminal
AH24
WMVDD18
-
Power supply terminal (+1.8V)
AH25 to
AH29
GND
-
Ground terminal
AH30 to
AH33
RADD22 to RADD25
O
Address signal output terminal Not used
AJ1
GND
-
Ground terminal
AJ2
UMDM3
I/O
Data mask signal output to the SD-RAM
AJ3, AJ4
UMDQ27, UMDQ25
I/O
Two-way data bus with the SD-RAM
AJ5
GND
-
Ground terminal
AJ6, AJ7
WMDQ26, WMDQ28
I/O
Two-way data bus with the SD-RAM
AJ8
GND
-
Ground terminal
AJ9, AJ10
WMVDD18
-
Power supply terminal (+1.8V)
AJ11
WMRQ0
O
Not used
AJ12
WMODT1
O
ODT signal output terminal Not used
AJ13
WMRQ1
O
Not used
AJ14
WMA4
O
Address signal output to the SD-RAM
AJ15
WMA13
O
Address signal output terminal Not used
AJ16
WMCKE
O
Clock enable signal output to the SD-RAM
AJ17
WMBA0
O
Bank address signal output to the SD-RAM
AJ18
WMCKERSTB
I
Clock enable control signal input terminal Not used
AJ19
WMWEB
O
Write enable signal output to the SD-RAM
AJ20,
AJ21
WMVDD18
-
Power supply terminal (+1.8V)
AJ22
GND
-
Ground terminal
AJ23
WMVDD18
-
Power supply terminal (+1.8V)
AJ24
GND
-
Ground terminal
AJ25
FCSB0
O
Chip select signal output to the NOR fl ash ROM
AJ26,
AJ27
FCSB2, FCSB3
O
Chip select signal output terminal Not used
AJ28
GND
-
Ground terminal
AJ29,
AJ30
RADD17, RADD18
O
Address signal output to the NOR fl ash ROM
AJ31 to
AJ33
RADD19 to RADD21
O
Address signal output terminal Not used
AK1
UMDQS3
O
Data strobe signal (positive) output to the SD-RAM
AK2
GND
-
Ground terminal
AK3
UMDQ24
I/O
Two-way data bus with the SD-RAM
AK4
GND
-
Ground terminal
AK5, AK6
WMDQ25, WMDQ30
I/O
Two-way data bus with the SD-RAM
AK7
GND
-
Ground terminal
AK8 to
AK12
WMDQ29, WMDQ16,
WMDQ17, WMDQ20,
WMDQ17, WMDQ20,
WMDQ22
I/O
Two-way data bus with the SD-RAM
AK13
WMRASB
O
Raw address strobe signal output to the SD-RAM
BDP-CX960
74
Pin No.
Pin Name
I/O
Description
AK14,
AK15
WMA2, WMA12
O
Address signal output to the SD-RAM
AK16
GND
-
Ground terminal
AK17 to
AK19
WMDQ6, WMDQ3,
WMDQ0
I/O
Two-way data bus with the SD-RAM
AK20
GND
-
Ground terminal
AK21,
AK22
WMDQ11, WMDQ14
I/O
Two-way data bus with the SD-RAM
AK23
GND
-
Ground terminal
AK24
WMDQ8
I/O
Two-way data bus with the SD-RAM
AK25
GCSB1
O
Chip select signal output terminal Not used
AK26
FOEB
O
Output enable signal output to the NOR fl ash ROM
AK27
FCSB1
O
Chip select signal output to the NAND fl ash ROM
AK28
FWEB
O
Write enable signal output to the NOR fl ash ROM
AK29 to
AK33
RADD12 to RADD16
O
Address signal output to the NOR fl ash ROM
AL1
UMDQSB3
O
Data strobe signal (negative) output to the SD-RAM
AL2, AL3
GND
-
Ground terminal
AL4, AL5
WMDQ24, WMDQ27
I/O
Two-way data bus with the SD-RAM
AL6
WMVDD18
-
Power supply terminal (+1.8V)
AL7, AL8
WMDQ31, WMDQ18
I/O
Two-way data bus with the SD-RAM
AL9
WMVDD18
-
Power supply terminal (+1.8V)
AL10
WMDM2
O
Data mask signal output to the SD-RAM
AL11
WMDQ21
I/O
Two-way data bus with the SD-RAM
AL12
WMA15
O
Address signal output to the SD-RAM
AL13
WMVDD18
-
Power supply terminal (+1.8V)
AL14
WMA6
O
Address signal output to the SD-RAM
AL15
GND
-
Ground terminal
AL16
WMA3
O
Address signal output to the SD-RAM
AL17 to
AL20
WMDQ5, WMDQ4,
WMDQ1, WMDQ15
I/O
Two-way data bus with the SD-RAM
AL21
WMDM1
O
Data mask signal output to the SD-RAM
AL22 to
AL24
WMDQ13, WMDQ12,
WMDQ10
I/O
Two-way data bus with the SD-RAM
AL25
WMVDD18
-
Power supply terminal (+1.8V)
AL26
NALE
O
Address latch enable signal output to the NAND fl ash ROM
AL27
NCLE
O
Command latch enable signal output to the NAND fl ash ROM
AL28
GRDYB
I
Not used
AL29 to
AL33
RADD7 to RADD11
O
Address signal output to the NOR fl ash ROM
AM2 to
AM4
GND
-
Ground terminal
AM5
WMDM3
O
Data mask signal output to the SD-RAM
AM6, AM7
GND
-
Ground terminal
AM8
WMDQ19
I/O
Two-way data bus with the SD-RAM
AM9,
AM10
GND
-
Ground terminal
AM11
WMDQ23
I/O
Two-way data bus with the SD-RAM
AM12
GND
-
Ground terminal
AM13
WMCSB0
O
Chip select signal output to the SD-RAM
AM14
WMA5
O
Address signal output to the SD-RAM
AM15
WMVDD18
-
Power supply terminal (+1.8V)
AM16
WMBA1
O
Bank address signal output to the SD-RAM
AM17
WMDM0
O
Data mask signal output to the SD-RAM
AM18,
AM19
GND
-
Ground terminal
AM20
WMDQ2
I/O
Two-way data bus with the SD-RAM
AM21,
AM22
GND
-
Ground terminal
AM23
WMDQ9
I/O
Two-way data bus with the SD-RAM
AM24,
AM25
GND
-
Ground terminal
BDP-CX960
75
Pin No.
Pin Name
I/O
Description
AM26
NWEB
O
Write enable signal output to the NAND fl ash ROM
AM27
NRBB
O
Ready/busy selection signal output to the NAND fl ash ROM “L”: busy, “H”: ready
AM28
GCSB0
O
Chip select signal output terminal Not used
AM29 to
AM32
RADD3 to RADD6
O
Address signal output to the NOR fl ash ROM
AN3
WMDQS3
O
Data strobe signal (positive) output to the SD-RAM
AN4
WMDQSB3
O
Data strobe signal (negative) output to the SD-RAM
AN5
GND
-
Ground terminal
AN6
WMCK1
O
Clock signal (positive) output to the SD-RAM
AN7
WMCKB1
O
Clock signal (negative) output to the SD-RAM
AN8
GND
-
Ground terminal
AN9
WMDQS2
O
Data strobe signal (positive) output to the SD-RAM
AN10
WMDQSB2
O
Data strobe signal (negative) output to the SD-RAM
AN11
GND
-
Ground terminal
AN12
WMODT0
O
ODT signal output to the SD-RAM
AN13
WMA8
O
Address signal output to the SD-RAM
AN14
WMVDD18
-
Power supply terminal (+1.8V)
AN15
WMA1
O
Address signal output to the SD-RAM
AN16
WMDQ7
I/O
Two-way data bus with the SD-RAM
AN17
GND
-
Ground terminal
AN18
WMDQS0
O
Data strobe signal (positive) output to the SD-RAM
AN19
WMDQSB0
O
Data strobe signal (negative) output to the SD-RAM
AN20
GND
-
Ground terminal
AN21
DMCK0
O
Clock signal (positive) output to the SD-RAM
AN22
DMCKB0
O
Clock signal (negative) output to the SD-RAM
AN23
GND
-
Ground terminal
AN24
WMDQS1
O
Data strobe signal (positive) output to the SD-RAM
AN25
WMDQSB1
O
Data strobe signal (negative) output to the SD-RAM
AN26
GND
-
Ground terminal
AN27
NFOEB
O
Output enable signal output to the NAND fl ash ROM
AN28
VDD3
-
Power supply terminal (+3.3V)
AN29
RADD0
O
Address signal output terminal Not used
AN30,
AN31
RADD1, RADD2
O
Address signal output to the NOR fl ash ROM
BDP-CX960
76
MB-124-MEGA-SM BOARD IC309 SN0608006PWPR (POWER CONTROL1)
Pin No.
Pin Name
I/O
Description
1
VLDOIN
I
Power supply input terminal (for VTT LDO) Not used
2
VTT
O
VTT LDO output terminal Not used
3
VTTGND
-
Ground terminal (for VTT LDO)
4
VTTSNS
I
VTT voltage detection signal input terminal Not used
5
GND
-
Ground terminal
6
MODE
I
Electrical discharge mode setting terminal Not used
7
VTTREF
O
Reference voltage output terminal Not used
8
COMP
O
Transformer conductance amplifi er output terminal for phase compensation
9
VDDQSNS
I
VDDQ reference voltage input terminal
10
VDDQSET
I
VDDQ output voltage setting terminal
11
S3
I
S3 signal input terminal Not used
12
S5
I
S5 signal input terminal
13
PGOOD
O
Power good open drain output terminal Not used
14
V5IN
I
+5V power supply input terminal
15
CS
I
Current detection comparator input terminal
16
PGND
-
Ground terminal (for rectifi cation MOSFET driver)
17
DRVL
O
Rectifi cation MOSFET gate drive signal output terminal
18
LL
I
Return terminal of switching MOSFET driver
19
DRVH
O
Switching MOSFET gate drive signal output terminal
20
VBST
I
Boot strap voltage input terminal for switching MOSFET driver
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