Sony CDX-F5500 / CDX-F5500X / CXS-F550GF Service Manual ▷ View online
17
CDX-F5500/F5500X
• IC801 MB90487PF-G-103-BNDE1 (SYSTEM CONTROL) (MAIN BOARD (2/2))
Pin No.
Pin Name
I/O
Pin Description
1
ATT
O
Audio mute control signal output
2 to 4
NC
—
Not used in this set. (Open)
5
BEEP
O
Beep signal output to power amp IC
6
VOL ATT
O
Electrical volume ATT control output
7 to 10
NC
—
Not used in this set. (Open)
11
VSS
—
Ground pin
12 to 14
NC
—
Not used in this set. (Open)
15
TU ATT
O
Tuner mute control output
16, 17
NC
—
Not used in this set. (Open)
18
CD SI
I
CD servo serial data signal input Not used in this set. (Open)
19
CD SO
O
CD servo serial data signal output Not used in this set. (Open)
20
CD SCK
O
CD servo serial clock signal output Not used in this set. (Open)
21
RE 0
I
Rotary encoder signal input 0
22
RE 1
I
Rotary encoder signal input 1
23
VCC+3.3
—
Power supply pin (+3.3 V)
24
EEP SIO
I/O
Serial data signal input/output for EEPROM communication
25
EEP SCK
O
Serial clock signal output for EEPROM communication
26
SHUT SW
I
Shutter switch open/close detect signal input Not used in this set. (Open)
“L”: Panel open, “H”: Panel close
27
LCD CE
O
Chip enable signal output to LCD driver IC
28
LCD SO
O
Serial data signal output to LCD driver IC Flash: UART serial out
29
LCD SCK
O
Serial clock signal output to LCD driver IC
30
NC
—
Not used in this set. (Open)
31
STB
O
Standby signal output to power amp IC
32
AUX
—
Not used in this set. (Open)
33
IIC SCK
O
IIC bus serial clock signal output
34
IIC SIO
I/O
IIC bus serial data signal input/output
35
VCC+3.3
—
Power supply pin (+3.3 V) (for A/D converter)
36
AVRH+3.3
—
External reference power supply (+3.3 V) (for A/D converter)
37
AVSS
—
Ground pin (for A/D converter)
38, 39
KEY IN0, 1
I
Key signal input
40
NC
—
Not used in this set. (Open)
41
RC IN0
I
Rotary commander key signal input
42
VSS
—
Ground pin
43, 44
NC
—
Not used in this set. (Fixed at “L”.)
45
VSM
I
S meter voltage detect signal input
46
DST SEL
I
Destination select pin
47
KEY ACK
I
Key acknowledge detect signal input
48
NC
—
Not used in this set. (Open)
49, 50
MD0, 1
I
Input for operation mode designation (Fixed at “H”.)
51
MD2
I
Input for operation mode designation (Fixed at “L”.)
52
NC
—
Not used in this set. (Open)
53
BU IN
I
Back up power supply detect signal input
54
OP REQ/INTQ
O
OP REQ/INTQ select signal output
55
CD SELFSW
I
CD mechanism self load position detect switch signal input Not used in this set. (Open)
56
DIAG
I
Condition input from power amp IC
57
TU ATT IN
I
Tuner ATT signal input
58
UNI SI
I
Serial data signal input
59
UNI SO
O
Serial data signal output
60
UNI SCK
O
Serial clock signal output
61
BUS ON
O
Bus on signal output
62
SYS RST
O
System reset signal output
18
CDX-F5500/F5500X
Pin No.
Pin Name
I/O
Pin Description
63
TEL ATT
O
TEL ATT signal output
64
ACC IN
I
Accessory power supply detect signal input
65
SIRCS
I
Remote control signal (infrared rays) input
66
RAM BU
O
Not used in this set. (Fixed at “L”.)
67
TEST IN
I
Test mode detect signal input
68
FLASH W
I
Memory mode changeover signal input
Normally “H” input (single chip mode) “L” after reset: Flash write mode
69
NOSE SW
I
Nose detect switch signal input
70, 71
NC
—
Not used in this set. (Open)
72
DOOR SW
I
Front panel open/close detect signal input
“L” input: Panel close, “H” input: Panel open
73
DOOR IND
O
Door indicator control signal output
74
RC IN1
I
Rotary commander shift key signal input
75
XKEY ON
O
Key power supply control signal output Pin rj (KEY ACK) active: “L” output
76
NC
—
Not used in this set. (Open)
77
RESET
I
Reset signal input
78
NC
—
Not used in this set. (Open)
79
X1A
—
Oscillator connect pin (32 kHz)
80
X0A
—
Oscillator connect pin (32 kHz)
81
VSS
—
Ground pin
82
X0
—
Oscillator connect pin (3.68 MHz)
83
X1
—
Oscillator connect pin (3.68 MHz)
84
VCC+3.3
—
Power supply pin (+3.3 V)
85 to 88
NC
—
Not used in this set. (Open)
89
ZERO DET R
I
Mechanism deck mute zero closs detect signal input R
90
ZERO DET L
I
Mechanism deck mute zero closs detect signal input L
91
CD STB
O
CD servo data strob signal output Timing of data latch: “L” output
Not used in this set. (Open)
92
CD IN SW
I
CD mechanism IN-SW detect signal input Not used in this set. (Open)
93
CD LOAD
O
CD mechanism loading motor control signal output Not used in this set. (Open)
94
CD ON/EJECT
O
CD mechanism eject motor control signal output
95
CDM ON/D SW
I
CD mechanism DSW detect signal input
96
CD LIMIT
I
CD mechanism IN-LIMIT SW signal input Not used in this set. (Open)
97
RFOK
I
CD servo RFOK signal input
98
CD XRST
O
CD servo reset signal output Not used in this set. (Open)
99
CD A0
O
CD servo command/parameter identification signal output Not used in this set. (Open)
Command transmission: “L” output, parameter transmission: “H” output
100
NC
—
Not used in this set. (Open)
19
19
CDX-F5500/F5500X
3-2. BLOCK DIAGRAM — CD SECTION —
46
ASYO
RF AMP,DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
IC3
41
RFACO
24
FEO
22
TEO
42 RFACI
23 FEI
21 TEI
13 FFDR
PD1
PD2
E
F
I-V AMP
PD
LD
DETECTOR
45 ASYI
27
26
29
28
19
20
E
C
D
A
B
F
36 LD
37
PD
(FOCUS)
(TRACKING)
2-AXIS DEVICE
OPTICAL
PICK-UP BLOCK
(KSS1000E)
• Siganal Path
: CD PLAY
LASER DIODE
M
M
M
13
12
VO1–
VO1+
6
7
VO4+
VO4–
8
9
VO3–
VO3+
5
4
VOL+
VOL–
FWD
REV
1
2
VIN2+ 22
14 FRDR
VIN2– 21
11 TFDR
VIN1+B 19
12 TRDR
VIN1–B 18
9 SFDR
VIN4+ 31
10 SRDR
VIN4– 32
6 MDP
VIN3+ 25
MUTE 34
11
10
VO2–
VO2+
M903
(LOADING)
M901
(SPINDLE)
M902
(SLED)
FOCUS/TRACKING COIL DRIVE,
SLED/SPINDLE/LOADING
MOTOR DRIVE
IC1
3
FOK
96
SQSO
97
SQCK
100
XRST
102
DATA
104
XLAT
105
CLOK
107
SENS
CD-L
MAIN
SECTION
A
81
AOUT1
86
AOUT2
R-CH
18 CD SQCK
15 CD XRST
15 CD XRST
14 CD DATA
13 CD XLAT
53 MEC_SELFSW
45 MEC_INSW
42 MEC_LIMIT
12 CD CLOK
11 CD SENS
108
SCLK
10 CD SCLK
113
GFS
8
CD GFS
114
C2POT
7
CD C2PO
115
SCOR
52 CD SCORT
81 X1
80 X0
MEC LOAD
43
MEC EJECT
44
CD
SYSTEM CONTROL
IC4
AUDIO INTERFACE
IC8
+1.5V REG
IC7
SYSTEM CONTROL
IC801 (1/3)
19 CD FOK
16 CD SQSO
DRON
41
SD1O
14
LRCK1B
19
LRCK1A
16
SD0O
11
BCK1B
18
BCK1A
15
CLCK
22
SRMSTB
41
RESET
2
STANDBY
3
BUCK
36
I2C SCL
7
I2C SDA
6
BUSO
28
SW2
(SELF)
46 MEC_DSW
SW1
(DOWN)
SW3
(DISC IN)
SW4
(LIMIT)
89
LMUTE
22 CD LMUT
90
RMUTE
23 CD RMUT
20
LINK OFF
56
UNISI
25
RXD
57
UNISO
58
UNICLK
50
BUS ON
51
BU IN
75
RSTX
61
EJECT OK
67
MECON CHK
69
EMPH
32
DEC SDA
31
DEC SCL
30
DEC INT
29
DEC STBY
28
DEC XRST
27
DEC SSTBY
37
DEC XMUTE
65
DECON
62
OPEN REQ
63
MECON
64
CDON
66
ZMUT
60
A ATT
26
TXD
PD1
E
F
LD
PD
FCS+
FCS–
TRK+
TRK–
PD2
AUTOMATIC
POWER
CONTROL
Q1
+1.5V
CONTROL
Q2,3
+3.3V
CONTROL
Q5,6
• R-ch is omitted due to same as L-ch.
77
78
X1
16.934MHz
X2
18.43MHz
XTAI
XTAO
66
BCK
60
BCKI
61
PCMDI
63
LRCK
62
LRCKI
65
PCMD
MAIN
SECTION
B
OPEN REQ
54
RF OK
LINK OFF
UNI SI
UNI SO
ATT
UNI SCK
BUS ON
BU IN
SYS RST
97
CD ON
VOUT
94
CDM ON
95
ZERO DET
MECHA+6V
89
68
CDON CHK
1
5
VDD
3
CE
SERVO+3.3V
+1.5V
+3.3V
U COM+3.3V
(Page 20)
(Page 20)
20
20
CDX-F5500/F5500X
1 ANT
7 B2
ELECTRONIC VOLUME
IC401
PJ601
(ANTENNA)
TUX601
(TUNER UNIT)
POWER AMP
IC100
SYSTEM CONTROL
IC801 (2/3)
CNP901
6 B1
R-CH (FRONT)
R-CH (REAR)
R-CH (REAR)
BATT
9 C2
8 C1
R-CH
4
3
3
10
VCC
11
TU VDD
15
E2P VDD
13
TU-SCL
14
TU-SDA
6
S-METER
7
TU MUTE
16
E2P SCL
17
E2P SDA
45 VSM
AU+8V
TU+5V
U COM+3.3V
U COM+3.3V
15 TU ATT
25 EEP SCK
24 EEP SIO
24 EEP SIO
L
R
CD-L
R-CH
17
18
18
OUTS1
OUTS2
R-CH
L
R
5
3
3
RR+
RR-
9
7
7
RF+
RF-
29
27
27
SW1
R-CH
SW2
BATT
30
37
37
REG1
REG2
31
33
33
REG3
REG4
34
REG5
TU+5V
BATT
25
24
24
OUTF1
OUTR1
29
MUTE
2 SDA
AU+8V
U-COM+5V
SERVO+3.3V
MECHA+6V
MECHA+6V
DISP+B
4 SCL
SDA
SCL
16 ACGND
22 STB
25 DIAG
25 DIAG
AU+8V
35 VP
15
13
7
10
12
11
16
1
9
2
4
3
5
6
30
31
31
SCL
SDA
SCL
SDA
SCL
SDA
SCL
SDA
33
IIC SCK
34
IIC SIO
6
VOL ATT
1
ATT
5
BEEP
31
STB
56
DIAG
53
BU IN
67
TEST IN
12 INRR(FL)
FL+
FL-
RL+
RL-
FR+
FR-
RR+
RR-
AMP-REM
ANT-REM
ACC
TEST
23
OUTF2
11 INRF(RL)
22
OUTR2
MUTE
Q405
MUTE
Q407
REAR
AUDIO OUT
MUTE CONTROL
Q400,401
58
UNI SI
59
UNI SO
60
UNI SCK
61
BUS ON
62
SYS RST
10 B/U-C
8 DATA OUT
9 DATA IN
11 CLK IN
12 BUSON
13 RST
RESET
3
5
4
7
6
2
1
3
BATT
6
DATA I/O
4
CLK
1
BUS ON
2
RST
64
ACC IN
ACC CHECK
Q900
TU+5V REG
Q601
U-COM+3.3V
BATT
U-COM+5V
BATT
+3.3V REG
IC803
BATTERY CHECK
Q902
BUS INTERFACE
IC900
MUTE
Q404
ATT
63
TEL ATT
TEL ATT
Q901
D400
F901
R-CH
L
R
FRONT
AUDIO OUT
R-CH
5
3
3
AP2
AP1
R-CH
L
R
BUS
AUDIO IN
PJ401
BUS
CONTROL
IN
D804
D818
D912
CD
SECTION
A
DISPLAY
SECTION
C
SYS RST
LINK OFF
BUS ON
UNI SCK
UNI SO
UNI SI
BU IN
ATT
CD
SECTION
B
TH900
CNJ900
8
BATT
LINK ON/OFF
SWITCH
Q903
BUS ON SWITCH
Q904,905
• Signal Path
• R-CH is omitted due to same as L-CH.
: CD PLAY
: FM
: AM
3-3. BLOCK DIAGRAM — MAIN SECTION —
(Page 19)
(Page 19)
(Page 21)
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