Sony CDX-DAB6650 Service Manual ▷ View online
37
CDX-DAB6650
IC750 TDA8588BJ/N2/R1 (MAIN Board (2/3))
MUTE
MUTE
ENABLE
LOGIC
STANDBY
MUTE
CHIP DETECT
DIAGNOSTIC
PROTECTION
DIAGNOSTIC
SWITCH
REGULATOR
SWITCH
REFERENCE
VOLTAGE
LOADDUMP
PROTECTION
TEMPERATURE
PROTECTION
BACK-UP
SWITCH
REGULATOR
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
TAB
OUT FL-
OUT FL+
OUT RL-
OUT RL+
INRL
SGND
INRR
OUT RR+
OUT RR-
OUT FR+
OUT FR-
DIAG
SW2(ANT REM)
SW1(ANT REM)
REG3(SERVO)
REG4(DR+B)
VP(REG)
REG2(BU 5V)
SDA
SCL
VP2
PGND3
SVR
INFL
INFR
AC GND
PGND2
VP1
STB
PGND1
RST
CRES
REG1(AUDIO +B)
GND(REG)
REG5(ILL)
CBU
FL
RL
RR
VP
FR
I2C BUS
38
CDX-DAB6650
• IC PIN DESCRIPTIONS
• IC3 MB90487APFV-G-142-BNDE1 (CD SYSTEM CONTROL) (SERVO BOARD (2/2))
Pin No.
Pin Name
I/O
Pin Description
1
NC
O
Servo 1.5 V power supply control signal output
2 to 6
NC
—
Not used. (Open)
7
CD BUS0
I/O
Bus data signal input/output 0
8
CD BUS1
I/O
Bus data signal input/output 1
9
VSS
—
Ground pin
10
CD BUS2
I/O
Bus data signal input/output 2
11
CD BUS3
I/O
Bus data signal input/output 3
12
CD BUCK
O
Bus clock signal output
13
CD XCCE
O
Chip enable signal output
14
CD XRST
O
Reset signal output
15
CD ZDET
I
Zero detection signal input
16 to 20
NC
—
Not used. (Open)
21
VCC
—
Power supply pin (+3.3 V)
22
DAC ZDETL
I
Zero data detection signal input (L-ch)
23
DAC ZDETR
I
Zero data detection signal input (R-ch)
24
NC
—
Not used. (Open)
25
RXD
I
UART RXD data signal input (MCBUS/Flash data input)
26
TXD
O
UART TXD data signal output (MCBUS/Flash data output)
27
DEC SSTBY
O
SRAM STANDBY mode control signal output
28, 29
NC
—
Not used. (Open)
30
DEC INT
I
Request signal input
31, 32
NC
—
Not used. (Open)
33
AVCC
—
Power supply pin (+3.3 V) for A/D converter
34
AVRH
—
External reference voltage for A/D converter
35
AVSS
—
Ground pin
36
NC
—
Not used. (Open)
37
DEC XMUTE
O
Mute signal output L: mute
38, 39
NC
—
Not used. (Open)
40
VSS
—
Ground pin
41
NC
—
Not used. (Open)
42
MEC LIMIT
I
Sled limit in detection switch signal input
43
MEC LOAD
O
Loading motor signal output (Load direction)
44
MEC EJECT
O
Loading motor signal output (Eject direction)
45
MEC INSW
I
Pack-in detection signal input
46
MEC DSW
I
Chucking end detection switch signal input
47, 48
MD0, MD1
I
CPU operation mode designation signal input (Connect to Vcc.)
49
MD2
I
CPU operation mode designation signal input (Connect to Vss.)
50
BUS ON
I
Bus on signal input L: bus on
51
BU IN
I
Backup on/off signal input H: backup on, L: backup off
52
CD SBSY
I
SUBQ sync signal input L: interruption
53
MEC SELFSW
I
Disc insert detection switch signal input L: disc in interruption
54, 55
NC
—
Not used. (Open)
56
UNISI
I
Serial data signal input
57
UNISO
O
Serial data signal output
58
UNICKI
I
Serial clock signal input
59
LINEOFF
O
Line off signal output
60
A ATT
O
Audio attenuation signal output H: ATT on
61
EJECT OK
I
Front panel open signal input H: eject
62
OPEN REQ
O
Front panel open/close request signal output H: open request
63
MECON
O
Mechanism deck power supply control signal output
64
CDON
O
Servo power supply control signal output
39
CDX-DAB6650
Pin No.
Pin Name
I/O
Pin Description
65
XUART
I
Sony-Bus/MC-Bus change signal input H: Sony-Bus, L: MC-Bus
66
ZMUTE
O
Zero detection mute signal output
67
MECON CHK
I
MECON rising detection signal input
68
CDON CHK
I
CDON rising detection signal input
69 to 74
NC
—
Not used. (Open)
75
RSTX
I
System reset signal input
76
NC
—
Not used. (Open)
77
X1A
—
Sub-clock connect pin Not used in this set. (Open)
78
X0A
—
Sub-clock connect pin Not used in this set. (Connect to Vss.)
79
VSS
—
Ground pin
80
X0
I
Main-clock connect pin (12 MHz)
81
X1
O
Main-clock connect pin (12 MHz)
82
VCC
—
Power supply pin (+3.3 V)
83
XTS
I
Not used in this set.
84
XINIT3
I
Not used in this set. (Open)
85
NC
—
Not used. (Open)
86
XSJIG
I
Not used in this set. (Open)
87 to 89
XINIT0 to 2
I
Not used in this set. (Open)
90 to 97
NC
—
Not used. (Open)
98
XLINE
I
Not used in this set. (Open)
99, 100
NC
—
Not used. (Open)
40
CDX-DAB6650
• IC501 MB90474PFV-G-211-BNDE1 (SYSTEM CONTROL) (MAIN BOARD (3/3))
Pin No.
Pin Name
I/O
Pin Description
1
ILL
I
Illumination detect signal input for auto dimmer “H”: ILL off, “L”: ILL on
2
DIMMER
O
Dimmer control signal output
3
DAB MONITOR
I
DAB monitor control signal input “L”: disable, “H”: enable
4
TU ATT
O
Tuner mute control signal output
5
NS MASK
O
Noise mask signal output
6
BEEP
O
Beep signal output to power amplifier
7, 8
A00, A01
O
Not used in this set. (Open)
9
VSS
—
Ground pin
10 to 15
A02 to A07
O
Not used in this set. (Open)
16
UNISI
I
SONY bus data signal input
17
UNISO
O
SONY bus data signal output
18
UNISCK
O
SONY bus clock signal output
19, 20
A11, A12
O
Not used in this set. (Open)
21
VCC5
—
Power supply pin (+3.3 V)
22 to 24
A13 to A15
O
Not used in this set. (Open)
25
RXD
I
DAB monitor data signal input
26
TXD
O
DAB monitor data signal output
27, 28
NCO
O
Not used. (Open)
29
PANEL IN
I
Front panel attachment detect signal input “L”: with panel, “H”: without panel
30
SYNCHRO SW
I
Retractible CD door open/close detect switch signal input
31
I2C SCK
I/O
I2C serial clock signal input/output
32
I2C SIO
I/O
I2C serial data signal input/output
33
DAVDD
—
A/D converter power supply pin (+3.3 V)
34
AVRH
—
A/D converter external reference power supply pin (+3.3 V)
35
DAVSS
—
A/D converter ground pin
36
QUALITY
I
Noise detect signal input
37
VSM
I
S-meter voltage detect signal input
38, 39
KEY1, KEY0
I
Key signal input
40
VSS
—
Ground pin
41
RC IN
I
Rotary commander key signal input
42, 43
NCO
O
Not used. (Open)
44
DAB I2C CNT
O
DAB I2C shut down switch control signal output “H”: I2C on, “L”: I2C off
45
E2P SI
I/O
EEPROM serial data signal input/output
46
E2P CK
O
EEPROM serial clock signal output
47
MD0
I
Input for operation mode designation (normally operation)
48
MD1
I
Input for operation mode designation (pull up)
49
MD2
I
Input for operation mode designation (normally operation)
50
KEYACK1
I
Key acknowledge detect signal input (KEY0)
51
TU ATTIN
I
Tuner mute zero cross detect signal input
52
BU IN
I
Buttery check signal input
53
FLASH W
I
Flash write mode when “L” after reset
54
DAVN
I
RDS data block synchronization detect signal input
55
KEYACK2
I
Key acknowledge detect signal input (RCIN0)
56
LCD CE
O
LCD driver chip enable signal output
57
LCD DA
O
LCD driver serial data signal output
58
LCD CLK
O
LCD driver serial clock signal output
59
CS3
O
Not used in this set. (Open)
60
DAC PD
O
DAC power on control signal output “H”: DAC on, “L”: DAC off
61
PH CNT
O
Phantom power control signal output “H”: on, “L”: off
62
PH CHK
I
Phantom power NG detect signal input
“H”: NG, “L”: normally when PH CENT: “H”
63
SIRCS
I
Remote control data signal input
Click on the first or last page to see other CDX-DAB6650 service manuals if exist.