Sony CDX-C7850R Service Manual ▷ View online
– 21 –
TP
SHUF
TP
SHUF
TP
SHUF
AM RF signal
generator
generator
antenna
terminal
terminal
AM dummy
antenna(50
antenna(50
Ω
)
30
Ω
65 pF
15 pF
set
SHUF
SHUF
FM RF signal
generator
generator
antenna
terminal
terminal
0.01
µ
F
set
MW Auto Scan/Stop Level Adjustment
Setting :
SOURCE
n MODE button : MW
Procedure :
1. Set to the test mode. (See page 19.)
2. Push the SOURCE button.
3. Push the MODE button and set to MW.
1. Set to the test mode. (See page 19.)
2. Push the SOURCE button.
3. Push the MODE button and set to MW.
Display
4. Push the preset 3 button.
Display
5. Adjust with the volume RV1 on TU10 so that the “MW”
indication turns to “MW0” indication on the display window.
But, in case of already indicated “MW0”, turn the RV1 so that
put out light “0” indication and adjustment.
But, in case of already indicated “MW0”, turn the RV1 so that
put out light “0” indication and adjustment.
Display
Carrier frequency : 999 kHz
30% amplitude
modulation by
1 kHz signal
output level
30% amplitude
modulation by
1 kHz signal
output level
: 33 dB (44.7
µ
V)
Adjustment Location : See page 22.
Carrier frequency : 98.00 MHz
Output level
Output level
: 35 dB (56.2
µ
V)
Mode
: mono
Modulation
: no modulation
Procedure :
1. Set to the test mode. (See page 19.)
2. Push the SOURCE button and set to FM.
1. Set to the test mode. (See page 19.)
2. Push the SOURCE button and set to FM.
Display
FM RDS S-Meter Adjustment
Setting :
SOURCE button : FM
3. Push the preset 10 button.
4. Adjust RV10 so that the display indication is “13.0”.
4. Adjust RV10 so that the display indication is “13.0”.
Display
Specification : Display indication : 12.8 to 13.2.
Adjustment Location : See page 22.
– 22 –
Adjustment Location : tuner unit (TU10)
–set upper view–
TU10
RV1
MW AUTO SCAN/
STOP LEVEL ADJ
RV2
FM AUTO SCAN/
STOP LEVEL ADJ
RV3
FM STEREO
SEPARATION ADJ
(WIDE)
RV10
FM RDS
S-METER
ADJ
RV4
FM STEREO
SEPARATION ADJ
(NARROW)
– 23 –
4-1. IC PIN DESCRIPTIONS
• IC5 CXP84640-050Q (CD SYSTEM CONTROL)
• IC5 CXP84640-050Q (CD SYSTEM CONTROL)
Pin No.
Pin Name
I/O
Pin Description
1 – 5
NCO
—
Not used in this set.
6
FP OPEN
I
Front panel open detection input
7
FP CLOSE
O
Front panel close control output
8
LINKOFF
I
Bus interface link input (Not used in this set.)
9
DRV OE
O
Focus/tracking coil/sled motor control output
10
D SW
I
Down switch input (SW4)
11 – 13
NCO
—
Not used in this set.
14
LM EJ
O
Loading motor control output
15
LM LOD
O
Loading motor control output
16
EMPH O
O
De-emphasis ON/OFF control output
17
CDMON
O
CD mechanism deck power control output
18
CD ON
O
CD power control output
19
A MUT
O
System attenuate control output
20
LD ON
O
Laser power ON/OFF control output
21
CD RST
O
CD system reset output
22 – 24
—
—
Not used in this set.
25
PH3
I
Not used in this set.
26
TSTIN0
I
Not used in this set.
27
TSTIN1
I
Not used in this set.
28
TST CLV
I
Not used in this set.
29
NCO
—
Not used in this set.
30
RESET
I
System reset input (“L” = Reset)
31
X IN
I
X’tal oscillator input of system clock. (10 MHz)
32
X OUT
O
X’tal oscillator output of system clock. (10 MHz)
33
GND
—
Analog GND
34
XT OUT
O
Not used in this set.
35
XT IN
I
Not used in this set.
36
AVSS
—
A/D converter GND
37
AVREF
I
A/D converter reference voltage input
38
TEP L
I
Not used in this set.
39
TEP H
I
Not used in this set.
40
NCO
—
Not used in this set.
41
PH2
I
Not used in this set.
42
SCLK
O
CD-TEXT data read clock output
43
ESPXQOK
O
XQOK signal output to DRAM controller.
44
ESPSDT
I
Serial data input from DRAM controller.
45
GRSRST
O
Reset signal output to DRAM controller.
46
GRSCOR
I
Sub-cord sync input from DRAM controller.
47
CD XLAT
O
CD signal process serial latch output
48
TX CLK
O
EEPROM serial clock output
49
TX DATA
O
EEPROM serial data output
50
UNISO
O
Not used in this set.
51
BUS CLK
I/O
Bus system serial clock input/output
52
BUS SI
I
Bus system serial interface input
53
BUS SO
O
Bus system serial interface output
54
F OK
I
Focus OK signal input
55
GFS
I
GFS signal detection input
56
SCOR
O
Sub-cord sync output
57
SENS
I
SENS signal input
58
—
I
Fixed at “H” in this set.
59
CD CKO
O
CD signal process serial clock output
SECTION 4
DIAGRAMS
– 24 –
Pin No.
Pin Name
I/O
Pin Description
60
BU.IN
I
Back-up power detection input
61
BUSON
I
Bus on control input
62
IN SW
I
Disc in switch input (SW1)
63
SELF SW
I
Self switch input (SW2)
64
TX CE
O
EEPROM chip enable output
65
SCK2
O
Sub Q read clock output
66
SI2
I
Sub Q 80 bit, PCM peak and level data 16 bit input
67
CD DATA
O
CD signal process serial data output
68
ESPXWRE
O
Write signal output to DRAM controller.
69
ESPXRDE
O
Read signal output to DRAM controller.
70
ESPXLT
O
Serial data latch output to DRAM controller.
71
ESPXSOE
O
XSOE signal output to DRAM controller.
72
VDD
—
Power supply
73
HIN
I
Fixed at “H” in this set.
74
TEXT.ON/OFF
I
Fixed at “H” in this set.
75
PH1
I
Not used in this set.
76
FBTBSEL
I
Not used in this set.
77
CDOSEL
I
Not used in this set.
78 – 80
—
—
Not used in this set.
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