DOWNLOAD Sony STR-DB830 / STR-DB930 / STR-V929X Service Manual ↓ Size: 8.38 MB | Pages: 64 in PDF or view online for FREE

Model
STR-DB830 STR-DB930 STR-V929X
Pages
64
Size
8.38 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio / S/M STR-DB830/DB930/ 99 US CAN
File
str-db830-str-db930-str-v929x.pdf
Date

Sony STR-DB830 / STR-DB930 / STR-V929X Service Manual ▷ View online

— 58 —
IC1101
LC89055W DIGITAL AUDIO I/F RECEIVER (DIGITAL BOARD)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
I/O
I
O
I
O
I
O
I
I
O
O
O
O
O
O
I
O
O
O
O
O
O
I
I
I
I
I
I
O
O
I
I
I
Pin Name
DISEL
DOUT
DIN0
DIN1
DIN2
D. GND
D. V
DD
R
V IN
LPF
A. V
DD
A. GND
CK OUT
BCK
LRCK
DATA O
XSTATE
D. GND
D. V
DD
XMCK
XOUT
XIN
EMPHA
AUDIO
CSFLAG
F0/P0/C0
F1/P1/C1
F2/P2/C2
F3/P3/C3
D. V
DD
D. GND
AUTO
BPSYNC
ERROR
DO
DI
CE
CLK
XSEL
MODE0
MODE1
D. GND
D. V
DD
DOSEL0
DOSEL1
CKSEL0
CKSEL1
XMODE
Description
Input data select. (connected to ground.)
EIAJ data and parity flag output terminal (Not used)
Amplifier integrate data input terminal
Amplifier integrate data input terminal (Connecting to ground)
Amplifier integrate data input terminal (Connecting to ground)
Digital ground
Digital power supply
Input terminal for VCO generator band adjustment
Input terminal for VCO self running frequency set
External LPF for PLL is connected to this terminal
Analog power supply
Analog ground
256fs or 128fs clock output terminal (Select CLKMD terminal)
Bit clock output terminal
L, R clock output terminal (L-ch: “H”, R-ch: “L”)
Audio data output terminal
Xtal status frag output.
Digital ground
Digital power supply
Not used.
Crystal oscillator output terminal (Not used.)
Crystal oscillator input terminal
Emphasis monitor output terminal (“H” = ON) (Not used.)
Not used.
C-bit change frag output.
Not used.
Not used.
Not used.
Not used.
Digital power supply
Digital ground
Non PCM data detect flag output.
Non PCM sync detect flag output.
Error mute output terminal
Microprocessor I/F.  When CCB/SUB is  “H”, data output terminal (high level open drain output) (Not used)
Microprocessor I/F.  Data input terminal
Microprocessor I/F.  Chip enable/latch input terminal
Microprocessor I/F.  Clock input terminal
Xtal select. (Connected to +5V.)
Mode 0 input. (Connected to ground.)
Mode 1 input. (Connected to ground.)
Digital ground
Digital power supply
Output data select 0. (Connected to ground.)
Output data select 1. (Connected to ground.)
System clock select input 0. (Connected to ground.)
System clock select input 1. (Connected to ground.)
Reset input.
— 59 —
4-23.
IC BLOCK DIAGRAMS
IC1206 NJM2103M (DIGITAL BOARD)
1
2
3
4
5
6
7
8
V+
VSB/SESIN
VSA
RESET
GND
OUTC
VSC
CR
VREF
+
+
+
+
Q
R
S
IC1 BU1924F (TUNER BOARD)
ANALOG
DIGIT
AL
RCLK
NC
XO
XI
VSS2
T2
VDD2
T1
QUAL
RDA
T
VREF
MUX
VDD1
VSS1
VSS3
CMP
1
4
3
6
5
8
7
2
14
15
16
13
12 11 10
9
CLOCK
PLL 57kHz
RDS/ARI
COMPARATOR
8th SWITCHED
CAPACITOR
FILTER
ANTI-ALIASING
FILTER
BIPHASE
DECODER
PLL
1187.5Hz
DEFFERENTIAL
DECODER
TEST
— 60 —
IC414, 415, 416 TC9299P (MAIN BOARD)
IC501, 601 µPC2581V (MAIN BOARD)
IC701 µPC2581V (REAR AMP BOARD)
IC201 NJM2296M (VIDEO BOARD)
IC251, 252 NJM2296M (S VIDEO BOARD)
1
2
3
4
5
16
15
14
13
12
6
7
8
11
10
9
CK
GND
CS1
DATA
STB
CS2
A-GND
NC
IN
OUT
VSS
A-GND
NC
IN
OUT
VDD
L-CH
DATA 
LATCH
CIRCUIT
LEVEL
SHIFT
CIRCUIT
SHIFT
REGISTER
(13bit)
STROBE
GENERATOR
CIRCUIT
LEVEL
SHIFT
CIRCUIT
R-CH
DATA 
LATCH
CIRCUIT
R-ch
L-ch
PROTECTOR
DRIVE
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
PRE
DRIVE
PRE
DRIVE
BIAS CIRCUIT
REG
MUTE
+VOUT1
–VOUT1
COMP1
NF1
IN1
GND
IN2
NF2
COMP2
–VOUT2
+VOUT2
VCC1
VCC2
VEE
DRIVE
PROTECTOR
DRIVE
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
PRE
DRIVE
PRE
DRIVE
BIAS CIRCUIT
REG
MUTE
+VOUT1
–VOUT1
COMP1
NF1
IN1
GND
IN2
NF2
COMP2
–VOUT2
+VOUT2
VCC1
VCC2
VEE
DRIVE
9
S5
S6
S7
S4
S1
S2
S3
Vout1
Vout2
Vout3
V-
GND
SW3
SW2
SW1
SW5
SW4
Vin1
Vin2
Vin3
Vin4
Vin5
V+
10
11
12
13
14
15
16
1
5
2
3
4
6
7
8
9
S5
S6
S7
S4
S1
S2
S3
Vout1
Vout2
Vout3
V-
GND
SW3
SW2
SW1
SW5
SW4
Vin1
Vin2
Vin3
Vin4
Vin5
V+
10
11
12
13
14
15
16
1
5
2
3
4
6
7
8
— 61 —
IC103 TD62C950RF (DISPLAY BOARD)
IC105 BA6208F (DISPLAY BOARD)
IC104 MSC1164GS (DISPLAY BOARD)
20 BIT
SHIFT
REGISTER
20 BIT
LATCH
GATE
CIRCUIT
OUTPUT
CIRCUIT
NC
NC
DOUT
LS
CL
V
CC
HVO20
HVO19
HVO18
HVO17
HVO16
HVO15
HVO14
HVO13
HVO12
HVO11
HVO1
Vhv
GND
CLK
DIN
CHG
NC
D
CK
CK
Q
HVO2
HVO3
HVO4
HVO5
HVO6
HVO7
HVO8
HVO9
HVO10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
32
31
Q
D
ST
ST
Q
D
CK
D
Q
Q
D
CK
24
25
23
22
21
26
27
28
36
40
39
38
37
35
34
33
32
31
1
20
29
60
41
30
OUT1
OUT20
H V
CC
P GND
L GND
CL
NC
STB
NC
NC
S IN
V
DD
OUT40
OUT21
H V
CC
P GND
L GND
NC
CHG
NC
CK
NC
S OUT
V
DD
5
SWITCH
6
7
4
3
2
8
B IN
NC
GND
A IN
A OUT
GND
B OUT
VCC
1
SWITCH
REG
MOTOR
DRIVE
MOTOR
DRIVE
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