DOWNLOAD Sony STR-DB830 / STR-DB930 / STR-V929X Service Manual ↓ Size: 8.38 MB | Pages: 64 in PDF or view online for FREE

Model
STR-DB830 STR-DB930 STR-V929X
Pages
64
Size
8.38 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio / S/M STR-DB830/DB930/ 99 US CAN
File
str-db830-str-db930-str-v929x.pdf
Date

Sony STR-DB830 / STR-DB930 / STR-V929X Service Manual ▷ View online

— 54 —
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Description
SDTO source select pin
“L”: internal ADC output, “H”: DAUX input
ORed with serial control register if P/S = “L” (Connected to ground)
MCKO clock frequency select pin
“L”: MCLK, “H”: MCLK/2.  ORed with serial control register if P/S = “L” (Connected to ground)
Audio data master/slave mode select pin
“L”: slave mode, “H”: master mode (Connected to ground)
Audio serial data clock pin
Input/output channel clock pin
DAC1 audio serial data input pin
DAC2 audio serial data input pin
DAC3 audio serial data input pin
Audio serial data output pin
AUX audio serial data input pin (Connected to ground)
Double speed sampling mode pin
“L”: normal speed, “H”: double speed
ORed with serial control register if P/S = “L” (Connected to ground)
De-emphasis pin
ORed with serial control register if P/S = “L” (Connected to ground)
Master clock output pin (Not used)
Digital power supply pin
Digital ground pin
Power-down & reset pin
When “L”, the AK4526 is powered-down and the control registers are reset to default state.
If the state of P/S, M/S, CAD0-1 changes, then the AK4526 must be reset by PD.
X’tal oscillator select/test mode pin
“H”: X’tal oscillator selected
“L”: External clock source selected
“NC”: If pin is floating then test mode is enabled. (Connected to ground)
Input clock select 1 pin (Connected to ground)
Input clock select 0 pin (Connected to ground)
Chip address pin
Used during the serial control mode. (Connected to ground)
Chip address pin
Used during the serial control mode. (Connected to ground)
Lch #3 analog output pin
Rch #3 analog output pin
Lch #2 analog output pin
Rch #2 analog output pin
Lch #1 analog output pin
Rch #1 analog output pin
Lch analog negative input pin
Lch analog positive input pin
Pin Name
SDOS
MCLK
S/M
BCLK
LRCK
SDT11
SDT12
SDT13
SDTO
DAUX
DFS
DEM1 – DEM0
MCKO
D. 5V
D. GND
PD
TEST
ICKS1
ICKS0
CAD1
CAD0
LOUT3
ROUT3
LOUT2
ROUT2
LOUT1
ROUT1
LIN–
LIN+
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12 – 13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
IC1503
AK4526A A/D,D/A CONVERTER (DIGITAL BOARD)
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Pin No.
31
32
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36
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Description
Rch analog negative input pin
Rch analog positive input pin
Negative voltage reference input pin, AVSS (Connected to ground)
Common voltage output pin,  AVDD/2
 Large external capacitor is used to reduce power-supply noise
Positive voltage reference input pin, AVDD
Analog power supply pin
Analog ground pin
X’tal input pin (Not used)
External master clock input pin if XTS = “L”
Parallel/serial select pin
“L”: serial control mode, “H”: parallel control mode (Connected to ground)
Chip select pin in serial mode
Control data clock pin in serial mode
Control data input in serial mode
Control data output pin in serial mode
Pin Name
RIN–
RIN+
VREFL
VCOM
VREFH
A. 5V
A. GND
XTI
MCLKI
S/P
CS
CCLK
CDTI
CDTO
If pins TEST, ICKS0, ICKS1, PD, S/P, DFS, DEM0, DEM1, CAD0, CAD1, S/M, MCLK, SDOS are not driven, then TEST, ICKS0, ICKS1, CAD0, CAD1,
must be tied to either AVSS or AVDD. PD, S/P, DFS, DEM0, DEM1, S/M, MCLK, SDOS must be tied to either DVSS or DVDD.
— 56 —
IC102
MB90553APF-G-138-BND DISPLAY CONTROL(DISPLAY BOARD)
Description
PHONO display data output to LED.
TUNER display data output to LED.
CD display data output to LED.
MD/DAT data output to LED.
TAPE display data output to LED.
Not used. (Connected to Ground)
Power reay display.
Power check (+5V)
Not used. (Connected to Ground)
Not used. (Connected to Ground)
Ground (Connected to Ground)
Not used. (Connected to Ground)
Not used. (Connected to Ground)
Not used. (Connected to Ground)
Not used. (Connected to Ground)
Not used. (Connected to Ground)
Not used. (Connected to Ground)
Not used. (Connected to Ground)
UART data output to rewrite flash memory
UART data intput to rewrite flash memory
Clock output to flourescent display tube
Data output to flourescent display tube
Power supply +5 V
Fluorescent latch
Fluorescent clear
SIRCS input
External power regulator capacitor 0.1µ is connected to this terminal.
Not used (Connected to Ground)
Not used (Connected to Ground)
Not used (Connected to Ground)
Not used (Connected to Ground)
Not used (Connected to Ground)
Not used (Connected to Ground)
Analog power supply +5 V
AVRH (Connected to power supply +5 V)
SVRL (Connected to Ground)
Ground (Connected to Ground)
Key input 1
Key input 2
Key input 3
Key input 4
Ground (Connected to Ground)
Key input 5
Not used (Pull up)
Not used (Pull up)
RDS signal input (AEP only)
Stop input
Not used (Connected to Ground)
MD 0
MD 1 (Connected to power supply +5 V)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
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27
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Pin Name
LED PHONE
LED
LED
LED
LED
POWER RY
5V CHECK
VSS
FLASH DATA OUT
FLASH DATA IN
FL CLK
FL DATA
VCC
FL LAT
FL CLEAR
SIRCS IN
C
AVCC
AVRH
AVRL
AVSS
KEY INPUT 1
KEY INPUT 2
KEY INPUT 3
KEY INPUT 4
VSS
AD KEY IN 5
AD KEY IN 6
AD KEY IN 7
RDS SIGNAL
STOP
MD 0
MD 1
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— 57 —
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
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74
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78
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81
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Description
Pin Name
MD 2
HW STANDBY
RDS CLOCK
RDS DATA
VOL UP
VOL DOWN
U-RESET
U-SREQ
U-MREQ
U-DATA
U-CLOCK
AUBUS-IN
SPEAKER
SPEAKER
POW-KEY IN
AUBUS-OUT
VIRSION IN1
VIRSION IN 2
VIRSION IN 3
VIRSION IN 4
VIRSION IN 5
VIRSION OUT 1
VIRSION OUT 2
JOG-UP
JOG-DOWN
RESET
FUNCTION UP
FUNCTION DOWN
VSS
X0
X1
VCC
LED CLK
LED DATA
LED CE
LED CLR
MBUS-V1
MBUS-DVD
MBUS-TV
MBUS-STATUS
LAT
RESET
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MD 2
Hardware STANDBY input
RDS clock input
RDS data input
Volume up output
Volume down output
Not used (Connected to Ground)
Reset output (Connected to MB90573 RESET)
Slave request and data input (Connected to MB90573 SLV DATA/REQ)
Master request output (Connected to MB90573 DISPMR)
Master data output  (Connected to MB90573 DISP DATA)
Master clock output  (Connected to MB90573 DISPCLK)
Audio bus input
Speaker A signal input.
Speaker B signal input.
POWER-KEY input.
Audio bus output
Virsion input.
Virsion input.
Virsion input.
Virsion input.
Virsion input.
Virsion output.
Virsion output.
Function encoder up input.
Function encoder down input.
Reset (Display MCU)
Rotary encoder input.
Rotary encoder input.
Not used (Connected to Ground)
Ground (Connected to Ground)
External ceramic filter 4 MHz is connected to this terminal
External ceramic filter 4 MHz is connected to this terminal
Power supply +5 V
Not used. (Connected to Ground)
Not used. (Connected to Ground)
LED clock input.
LED data input.
LED chip eneble input.
LED clear input.
Not used. (Connected to Ground)
Not used. (Connected to Ground)
V1 input from MBUS.
DVD input from MBUS.
TV input from MBUS.
STATUS input from MBUS.
Not used. (Connected to Ground)
Learning microprocessor latch output.
Reset.
Not used. (Connected to Ground)
Page of 64
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