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Model
STR-DA5400ES
Pages
127
Size
14.87 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
str-da5400es.pdf
Date
PREV: Sony CMT-EH55DAB Service Manual

Sony STR-DA5400ES Service Manual ▷ View online

STR-DA5400ES
STR-DA5400ES
29
29
6-3.  BLOCK  DIAGRAM  - DIGITAL AUDIO Section -
52
DA-MUTE
51
50
49
TA
-L
AT
TA-SIO
TA-RST
131
INITX
STB +3.3V
126
RST_TRG
RESET SIGNAL
BUFFER
IC2509
SYSTEM MUTING
SWICTH
Q2205, 2206
ERR
ANA/DIGI
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
: AUDIO (DIGITAL)
: AUDIO (ANALOG)
SYSTEM CONTROLLER
IC2513 (2/3)
SD-RAM
IC2224
LIP SYNC ADJUST
IC2223
5 DIB
4 DIA
20
DOB
19
DOA
DOD
WEN
A0 – A10, BA
DQ0 – DQ15
CSN
SI
SCLK
DMUTEN
RSTN
SIO
XCS
DOC 21
22
43
40
3
2
10
9
14
15
11
8
BCK
LRCK
27
VOUT1
11 DATA2
12 DATA3
13 DATA4
7 BCK
8 LRCK
5 SCK
4 SDA
DEV_I2C2_SDA
1 ZR1
DAC_ZERODATA
3 SCL
DEV_I2C2_SCL
26
VOUT2
LOW-PASS
FILTER
IC2222
D/A-L
R-CH
22
VOUT3
21
VOUT4
LOW-PASS
FILTER
IC2221
D/A-SL
R-CH
16
VOUT7
15
VOUT8
LOW-PASS
FILTER
IC2219
D/A-SBL
R-CH
20
VOUT5
19
VOUT6
LOW-PASS
FILTER
IC2220
D/A-C
D/A-SW
D/A CONVERTER
IC2218
64
COM1_DATA
COM1_CLK
17
24MHz
63
10
6 DATA1
SDO2
20
21
RX232C
TX232C
30
D232C_RX
D232C_TX
18
SDO1
7 DID
6 DIC
SDO4
SDO3
DATA SELECTOR
IC2506
2C0 10
2C2 12
1Y 7
2C1 11
B
2
A
14
5 1C2
9 2Y
4 1C1
BCKI
MCKI
D/A MCK
RESET
SWITCH
IC2512
RESET SIGNAL
GENERATOR
IC2510
J1499
RS-232C
2
3
RS-232C DRIVER
IC1499
T1OUT 14
R1IN 13
T1IN
11
232C-MIN 134
R1OUT
12
LEVEL SHIFT
IC2504
232C-MOUT 135
232C-SEL2 170
232C-SEL1
MD2 128
15
18
WE
CS
27
30
31
HA
TS AMCK_SEL
HA
TS MIDDLE
HA
TS RESET
29
HA
TS MUTE
DSP M-D BUSY
46
DSP M-D INT
33
DSP D-M BUSY
47
DSP UCOM MODE
35
DSP UCOM END-FLAG
34
DSP_UCOM_RESET
48
MD_BUSY
MD_INT
DUCOM SDA
6
DUCOM SCL
7
DUCOM SDA
DUCOM SCL
DM_BUSY
MD2
DRST_TRG
DUCOM_RESET
19
CASN
RASN
42
41
16
17
CAS
RAS
CLKO
CKE
30
29
35
34
CLK
CKE
DQM 31
36
14
UDQM
LDQM
A0 – A11
DQ1 – DQ16
FIELD PROGRAMMABLE
GATE ARRAY
IC2003
42 SD1IN
40 SD0IN
18
31
45 SD3IN
43 SD2IN
BCKIN
LRCKIN
25
SD1OUT
24
SD0OUT
9
7
28
SD3OUT
27
SD2OUT
BCKOUT
LRCKOUT
4
AMCKOUT
17
MCLKIN
88
SCL
72
SDA
22
AMCKIN
(US, Canadian)
(US, Canadian)
(AEP, Continental European,
 East European, UK)
SD-RAM
IC2002
XWE
A0 – A10
D0 – D15
XCS
81
76
15
18
XWE
BA0
74
19
BA0
XCS
XCAS
XRAS
80
79
16
17
XCAS
XRAS
CLK
CKE
143
144
35
34
CLK
CKE
LDQM
86
14
LDQM
UNQM
142
36
UDQM
FLASH MEMORY
IC2004
∗DCLK
∗nCS0
15
2
6
1
DCLK
nCS
∗DATA0
14
2
DATA
∗ASD0
1
5
ASDI
A0 – A10
DQ0 – DQ15
21
57
MIDDLE
XRESET
65
MUTE
3
MUTEOUT
MUTING
SWITCH
IC2227
CLOCK
SELECT
IC2005
CLOCK
BUFFER
IC2006
X2001
22.5792MHz
90
SYSCLK
BUFFER
IC2216
DATA SELECTOR
IC2507
1Y 7
2C0 10
5 1C1
9
61
2Y
6 1C0
BUFFER
IC2505
OUT3 5
IN1 1
IN2 6
3 IN3
7 OUT1
2 OUT2
(Page 28)
(Page 28)
(Page 27)
(Page 27)
(Page 37)
(Page 27)
(Page 32)
(Page 28)
(Page 34)
STR-DA5400ES
STR-DA5400ES
30
30
6-4.  BLOCK  DIAGRAM  - HDMI Section (1/2) -
• SIGNAL PATH
: AUDIO (DIGITAL)
: VIDEO
VIDEO SYSTEM CONTROLLER
IC3610 (1/3)
CN3501
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 6
CN3502
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 5
(for AUDIO)
CN3503
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 4
CDT0P
CDT0N
CDT1P
CDT1N
CDT2P
CDT2N
CCLKP
CCLKN
52
51
7
9
55
54
4
6
58
57
1
3
49
48
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
HDMI INPUT
SELECTOR
IC3503
45
46
71
70
7
9
74
73
4
6
77
76
1
3
68
67
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
63
19
64
9
8
7
9
12
11
4
6
15
14
1
3
6
5
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
CEC
13
12
16
15
SDA_C
2
SCL_C
3
HDMI RECEIVER
IC3511
(1/2)
HDMI TRANSMITTER
IC3513
34
35
40
39
YDT0P 31
YDT0N
YDT1P
YDT1N
YDT2P
YDT2N
YCLKP
YCLKN
32
44
43
28
29
48
47
25
26
52
R0XC+
R0XC–
R0X0+
R0X0–
R0X1+
R0X1–
R0X2+
R0X2–
DSDA0
DSCL0
51
33
R0PWR5V
35
DSCL1
29
DSDA1
28
R1PWR5V
DSCL
DSDA
30
34
CSDA
CSCL
26
27
SCL_SINK 38
SDA_SINK 39
HPD_SINK 40
OUTDIS 42
SELA 23
SELB 22
SELC 21
1444_SELB1
100
1444_SELA1
99
1444_OEB1
94
1444_HPD1
93
101
1444_SELC1
1444_SELB[1]
1444_SELA[1]
1444_OEB[1]
1444_HPD[1]
1444_SELC[1]
1444_SELB[1]
1444_SELA[1]
1444_OEB[1]
1444_HPD[1]
1444_SELC[1]
DATA SELECTOR
IC3508
EEPROM
IC3509
2Y3
4
2Y1
5
1Y3
11
1Y1
14
3
2-COM
13
1-COM
5 SDA
6 SCL
10
A
9
B
7
WP
8
TX_RST1
30
CEC_SEL
172
TX_INT1
123
TX_RST2
170
TX_INT2
169
UC3V_SCL
118
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SDA,
UC3V_SCL
117
EDIO_SEL1
EDIO_SEL0
173
REPEA
T_P
ATH_SEL
9
2Y0
1
1Y0
12
+5V POWER SELECT
IC3526
1Y1
14
1Y2
15
2Y1
5
2Y2
2
13
1-COM
3
2-COM
9
B
10
A
1Y3
11
2Y3
+5V POWER 3
+5V POWER 2
+5V POWER 1
4
Q0 – Q15
98 - 90,
86 - 80
D0 - D15
79 - 77
75 - 67,
63 - 56
D16 - D35
ODCK 5
HSYNC 20
VSYNC 21
DE
FLI_ODCK[1]
FLI_ODCK[2]
HSYNC
VSYNC
DE
19
SPDIF 78
SD0 -SD3
4
4
4
MCLK 89
SCK 86
WS 85
IDCK
88
HSYNC
2
VSYNC
3
DE
1
81 -84
SPDIF
DL0, DR1,
DL1, DR2
4
DL2
21
SD0 -SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+ 34
TX0– 33
7
9
TX1+ 37
TX1– 36
4
6
TX2+ 40
TX2– 39
1
3
TXC+ 31
TXC– 30
10
HPD
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
HOT PLUG DET
CEC
51
19
12
16
15
13
DSDA 47
DSCL 46
INT 24
RESET# 25
CSDA 49
CSCL 48
CEC DATA
SWITCH
Q2501 – 2504
CN3511
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT A
TX_INT[1]
TX_RST[1]
TX_INT[1]
TX_RST[1]
TX_INT[2]
TX_RST[2]
CEC_RX
HDMI_SPDIF
HDMI_LRCK
HDMI_MCK
HDMI_BCK
SD0 -SD3
HDMI_BCK, HDMI_LRCK,
HDMI_MCK
HDMI_SPDIF
95
94
XTALIN
XTALOUT
X3501
28.322MHz
32
33
8
SD0
HDMI_SPDIF
SD0
SD2
SD2
SD1
SD1
SD3
SD3
1
36
CEC_TX
24
RX_HSYNC
RX_VSYNC
RX_DE
RX_ODCK[3]
D[2] - D[1
1],
D[14], D[15],
31
37
19
19
44
62
HPD_C
BDT0P
BDT0N
BDT1P
BDT1N
BDT2P
BDT2N
BCLKP
BCLKN
SDA_B
SCL_B
HPD_B
ADT0P
ADT0N
ADT1P
ADT1N
ADT2P
ADT2N
ACLKP
ACLKN
SDA_A
SCL_A
HPD_A
80
+5V_SELB
96
+5V_SELA
95
BUFFER
IC3525
LEVEL SHIFT
Q3501
LEVEL SHIFT
Q3500
BUFFER
IC3524
D[16] - D[23],
D[26] - D[35] 
Q[2] - Q[1
1],
Q[14], Q[15],
Q[16] - Q[23],
Q[26] - Q[35] 
16 - 13,
10 - 7,
3 - 1,144,
141 - 138
BUS
SWITCH
IC3858
BUS
SWITCH
IC3859
CLOCK GENERATOR
IC3862
RELAY DRIVE
IC3860
135 - 132,
129 - 126,
123 - 120,
117 - 1
14,
11
1 - 108
Q16 – Q35
RY3601
HDMI TRANSMITTER
IC3514
UC3V_SCL
UC3V_SDA
98 - 90,
86 - 80
D0 - D15
79 - 77
75 - 67,
63 - 56
D16 - D35
4
4
IDCK
88
HSYNC
2
VSYNC
3
DE
1
SPDIF
DL0, DR1,
DL1, DR2
4
DL2
21
SD0 -SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+ 34
TX0– 33
7
9
TX1+ 37
TX1– 36
4
6
TX2+ 40
TX2– 39
1
3
TXC+ 31
TXC– 30
10
HPD
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
HOT PLUG DET
51
19
12
16
15
DSDA 47
DSCL 46
INT 24
RESET# 25
CSDA 49
CSCL 48
CN3512
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT B
TX_INT[2]
TX_RST[2]
REF
1
CLK1 3
CLK3 5
CLK2 2
CLOCK SELECT
IC3864
2D+
3
1D+
1
1D-
2
2D-
4
S
9
D+ 8
D- 7
D-VIDEO BUS
(Page 31)
(Page 31)
(Page 32)
(Page 37)
(Page 
32)
(Page 
27)
(Page 
27)
(Page 
27)
STR-DA5400ES
STR-DA5400ES
31
31
6-5.  BLOCK  DIAGRAM  - HDMI Section (2/2) -
VIDEO SYSTEM CONTROLLER
IC3610 (2/3)
HDMI RECEIVER
IC3511
(2/2)
58
57
62
61
66
65
70
R1XC+
R1XC–
R1X0+
R1X0–
R1X1+
R1X1–
R1X2+
R1X2–
69
AUDIO MUTE REQ
MUTEOUT 75
RESET#
INT
D3502
D3512
HDMI_ERROR
BUFFER
IC3518
31
TX_5VPWR1
TX_5VPWR1
171
TX_5VPWR2
TX_5VPWR2
53
98
100 102
DSCL
DSDA
37
7
• SIGNAL PATH
: AUDIO (DIGITAL)
: VIDEO
CN3504
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 3
CN3505
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 2
CN3506
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 1
CDT0P
CDT0N
CDT1P
CDT1N
CDT2P
CDT2N
CCLKP
CCLKN
52
51
7
9
55
54
4
6
58
57
1
3
49
48
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
HDMI INPUT
SELECTOR
IC3504
45
46
71
70
7
9
74
73
4
6
77
76
1
3
68
67
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
63
19
64
9
8
7
9
12
11
4
6
15
14
1
3
6
5
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
CEC
13
12
16
15
SDA_C
2
SCL_C
3
34
35
YDT0P 31
YDT0N
YDT1P
YDT1N
YDT2P
YDT2N
YCLKP
YCLKN
32
28
29
25
26
SCL_SINK 38
SDA_SINK 39
HPD_SINK
40
OUTDIS
42
SELA
23
SELB
22
SELC
21
1444_SELB2
108
1444_SELA2
107
1444_OEB2
104
1444_HPD2
102
109
1444_SELC2
+5V POWER 1
+5V POWER 2
+5V POWER 3
31
19
19
44
62
HPD_C
BDT0P
BDT0N
BDT1P
BDT1N
BDT2P
BDT2N
BCLKP
BCLKN
SDA_B
SCL_B
HPD_B
ADT0P
ADT0N
ADT1P
ADT1N
ADT2P
ADT2N
ACLKP
ACLKN
SDA_A
SCL_A
HPD_A
80
VIDEO PROCESSOR2
IC3606
2nd Faro UCOM BUSY
145
FSCLKP
D5
FSCLKN
C5
FLASH MEMORY
IC3627
SD-RAM
IC3624
A3P
AF4
C1P
AC1
B1P
AC2
A1P
AB1
CVBS IN
2ND_CVBS
MSTR1_SDA
CY IN
CB IN
CR IN
DCLK P24
DHS P25
DVS R26
DEN P26
C26 TCLK
ZF_D [0] – ZF_D [15]
ZZF_A [1] – ZZF_A [21]
ZFSDATA [16] – ZFSDATA [31]
ZFSADD [0] – ZFSADD [12]
ZFSADD [0] – ZFSADD [12]
FSCKE
C4
FSBKSEL0
C21
FSBKSEL1
C20
FSCS0
D21
FSRAS
C24
FSCAS
D24
FSWE
C23
FSDQM3
B22
FSDQM2
B17
FSDQS3
A22
45
46
44
26
27
24
23
22
21
20
47
16
A17
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
51
ROM_CS_N AD24
OCN_RE_N AC25
OCN_WE_N AC26
26
28
11
CE
OE
WE
12 RESET
FSDQS2
SD-RAM
IC3607
ZFSDATA [0] – ZFSDATA [15]
ZCLKP
ZCLKN
ZCKE
ZFSBKSEL0
ZFSBKSEL1
ZFSCS0
ZRAS
ZCAS
ZWE
ZCLKP
ZCLKN
ZCKE
ZFSBKSEL0
ZFSBKSEL1
ZFSCS0
ZRAS
ZCAS
ZWE
FSDQM1
A11
FSDQM0
A6
FSDQS1
B11
45
46
44
26
27
24
23
22
21
20
47
16
B6
51
FSDQS0
FSDATA16 – 
FSDATA31
FSDATA0 – 
FSDATA15
DQ0 – DQ15
A0 – A12
DQ0 – DQ15
A0 – A20
DQ0 – DQ15
A0 – A12
FSADDR0 – 
FSADDR12
OCMDATA0 – 
OCMDATA15
OCMADDR1 – 
OCMADDR21
2nd Faro Power DETECT
163
MSTR1_SCL A3
2nd Faro UCOM UART Tx
144
OCM_UDI_1 B3
2ND_FARO_WAKE
113
LBADC_IN1 AF10
2nd Faro UCOM UART Rx
143
OCM_UDO_1 B2
2nd Faro UCOM RESET
164
RESET AD9
EEPROM
IC3628
DATA BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
39
44
23 P_HSYNC
50 S_HSYNC
24 P_VSYNC
49 S_VSYNC
V
Y/G
SDA
21
SCLK
22
RESET
33
39
CVBS OUT2
CY OUT2
CB/R 38
CB OUT2
CR/B 37
CR OUT2
25 P_BLANK
48 S_BLANK
32 CLKIN_A
FREQUENCY
MULTIPLIER
IC3857
D/A CONVERTER
IC3855
2
8
4
IN
OUT2
FSO
61
A2
MSTR0_SDA AA23
SDA
5
MSTR0_SCL AA24
SCL
6
PD8 – PD23
K23 – K26, J23,
J24, G23 – G26,
F23 – F26, E23, E24
16
16
65
FLI_CLK
2nd DAC CLOCK SEL
165
2nd VDAC RESET
166
DAC SDA
6
DAC SCL
7
RX_RST
35
RX_INT
121
4 – 9, 12, 13,
16 – 18, 26 – 30
Y0 – 
Y7, 
C0 – C7 
(Page 30)
(Page 30)
(Page 27)
(Page 32)
(Page 36)
(Page 
36)
(Page 
38)
STR-DA5400ES
STR-DA5400ES
32
32
6-6.  BLOCK  DIAGRAM  - VIDEO PROCESS Section -
VIDEO SYSTEM CONTROLLER
IC3610 (3/3)
VIDEO PROCESSOR1
IC3601
YAMAHA
 W
AIT_N
Faroudja UCOM BUSY
142
FSCLKP
D5
FSCLKN
C5
FLASH MEMORY
IC3615
SD-RAM
IC3618
A3P AF4
C1P AC1
B1P AC2
A1P AB1
CVBS
AIP_RAW_HS_CS AF12
AIP_RAW_VS AE12
MSTR1_SDA
CY
CB
CR
AND
GATE
IC3609
BUFFER
IC3620
PD0 – PD23, JT
AG_BS_TMS,
JT
AG_BS_TDO, GPIO_44,
JT
AG_BS_TDI, JT
AG_BS_RST
,
JT
AG_BS_TCK
L23 – L26, N23 – N26, K23 – K26,
J23, J24, G23 –G26, F23 – F26,
E23, E24, 
T24 – 
T26, R23 – R25
DCLK
P24
DHS
P25
DVS
R26
ODCK
FLI_ODCK[2]
HSYNC
VSYNC
DEN
P26
DE
C26
TCLK
X3602
19.6608MHz
F_D [0] – F_D [15]
F_A [1] – F_A [21]
FSDATA [16] – FSDATA [31]
FSADD [0] – FSADD [12]
FSADD [0] – FSADD [12]
FSCKE
C4
FSBKSEL0
C21
FSBKSEL1
C20
FSCS0
D21
FSRAS
C24
FSCAS
D24
FSWE
C23
FSDQM3
B22
FSDQM2
B17
FSDQS3
A22
45
46
44
26
27
24
23
22
21
20
47
16
A17
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
/CLK
CKE
BA0
BA1
CS
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
51
ROM_CS_N AD24
OCN_RE_N AC25
OCN_WE_N AC26
26
28
11
CE
OE
WE
12 RESET
FSDQS2
SD-RAM
IC3602
FSDATA [0] – FSDATA [15]
CLKP
CLKN
CKE
FSBKSEL0
FSBKSEL1
FSCS0
RAS
CAS
WE
CLKP
CLKN
CKE
FSBKSEL0
FSBKSEL1
FSCS0
RAS
CAS
WE
FSDQM1
A11
FSDQM0
A6
FSDQS1
B11
45
46
44
26
27
24
23
22
21
20
47
16
B6
51
FSDQS0
FSDATA16 – 
FSDATA31
FSDATA0 – 
FSDATA15
DQ0 – DQ15
A0 – A12
DQ0 – DQ15
A0 – A20
I/O0 –
I/O15
A0 –
A16
DQ0 – DQ15
A0 – A12
FSADDR0 – 
FSADDR12
OCMDATA0 – 
OCMDATA15
OCMADDR1 – 
OCMADDR21
137
136
HSYNC_N
VSYNC_N
SV1P AB2
SV2P AE1
SV3P AE4
103
104
105
R
G
B
W
AIT_N
23
YAMAHA
 INT_N
INT_N
25
YAMAHA
 RESET
YAMAHA
 CE
RESET_N
39
CS_N
28
WR_N
29
RD_N
30
Faroudja Power DETECT
125
MSTR1_SCL A3
Faroudja UCOM UART TX
141
OCM_UDI_1 B3
MAIN_FARO_WAKE
110
LBADC_IN1 AF10
Faroudja UCOM UART RX
140
OCM_UDO_1 B2
Faroudja UCOM RESET
126
RESET AD9
119
22
IREF
106
21
15 – 22
D0 – D7
46 – 56, 59 – 63
SRAM IO0 – SRAM IO15/
YAMAHA
 D0 – 
YAMAHA
 D7
64 – 72, 75 – 83
SRAM 
A0 – SRAM 
A16/
YAMAHA
 PS0 – 
YAMAHA
 PS2
33 – 31
PS0 – PS2
DIR
1
XOE
19
18
BUFFER
IC3619
XOE
19
YAMAHA_D [0] –
YAMAHA_D [7]
YAMAHA_A [0] –
YAMAHA_A [2]
SRAM CE
CE
6
19
SRAM LB,WE
1
26
SRAM UB,WE/Y
AMAHA
 WR_N
2
27
SRAM OE,UB,LB/Y
AMAHA
 RD_N
25
3
10 9
8
12 13
11
17
40
39
WE
UB
LB
41
OE
Flash Update RX 134
Flash Update TX 135
MAIN UCOM SDA
4
MAIN UCOM SCL
5
MAIN UCOM UART BUSY 139
D [8] – D [15]
D [0] – D [15]
D [0] – D [15]
A [0] – 
A [2]
A [0] – 
A [17]
A [1] – 
A [17]
RX232C
TX232C
VIDEO_UCOM_SDA
VIDEO_UCOM_SCL
VUCOM_BUSY
STOP IN
2
INITX 131
STOP
VUCOM_RST
ENDFLAG 136
VUCOM_FLG
MD2 128
VUCOM_MD
FLASH MEMORY
IC3603
EEPROM
IC3621
34
13
74
73
OE
WE
MOE_N
MWE_N
Y_D [0] – Y_D [15]
Y_A [0] – Y_A [23]
OSD CONTROLLER
IC3604
142
141
XOUT
XIN
X3603
33.2MHz
39
40
X0
X1
X3601
4MHz
S-RAM
IC3611
DATA BUS
DATA BUS
ADDRESS BUS
DA
TA
 BUS
ADDRESS
BUS
ADDRESS BUS
DATA BUS
ADDRESS BUS
14 RESET
26
30
NON_LPCM
92
NON_LPCM
51
38
C3P AF5
2ND_CVBS
B3P AE5
EXT_IN
UC3V_SCL
UC3V_SDA
44
23 P_HSYNC
50 S_HSYNC
24 P_VSYNC
49 S_VSYNC
V
Y/G
SDA
21
SCLK
22
RESET
33
39
CVBS OUT1
CY OUT1
CB/R 38
CB OUT1
CR/B 37
CR OUT1
HSYNC
VSYNC
DE
ODCK
DAC_CLK_SEL
VDAC_RESET
4 – 9, 12, 13,
16 – 18, 26 – 30
Y0 – Y7, 
C0 – C7 
25 P_BLANK
48 S_BLANK
32 CLKIN_A
FREQUENCY
MULTIPLIER
IC3854
D/A CONVERTER
IC3850
2
8
4
IN
OUT2
FSO
41
VDAC_RESET
32
DAC CLOCK SEL
3
DAC_CLK_SEL
VDAC_RESET
30
16
32
UC3V_SDA,
UC3V_SCL
33
• SIGNAL PATH
: VIDEO
A2
MSTR0_SDA AA23
SDA
5
MSTR0_SCL AA24
SCL
6
CLOCK GENERATOR
IC3863
CLK2
2
FLI_ODCK[1]
CLK1
3
CLK3
5
REF 1
D[2] - D[11],
D[14] - D[23],
D[26] - D[35] 
ADA
TA0 – 
ADA
TA23,
BDA
TA0 – BDA
TA5
B1, C1 – C3, D1 – D3,
P1 – P3, R1 – R4, 
T1 – 
T4,
U1 – U4, V1 – V4, W1 – W4, 
Y4
IPCLK1
P4
AHS
Y1
AVS
Y2
RX_ODCK[3]
RX_HSYNC
RX_VSYNC
AHREF_DE
Y3
RX_DE
30
Q[2] - Q[11],
Q[14] - Q[23],
Q[26] - Q[35] 
D[16] - D[23],
D[28] - D[35] 
DQ0 – DQ15
A0 – A23
MD0 – MD15
MA1 – MA24
D-VIDEO BUS
65
FLI_CLK
REFERENCE
VOLTAGE
REGULATOR
Q001, 002
HDMI SYS +3.3V
(Page 30)
(Page 36)
(Page 31)
(Page 
36)
(Page 30)
(Page 
27)
(Page 
29)
(Page 
37)
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