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Model
SDP-E800
Pages
52
Size
5.97 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
sdp-e800.pdf
Date

Sony SDP-E800 Service Manual ▷ View online

— 13 —
3. Initialization
After executing the test mode, be sure to perform initialization.
When the  POWER  button is pressed while pressing the  DIGITAL 1
button and  DIGITAL 3  button, “All Clear!” is displayed on the
fluorescent display tube and all internal settings are initialized.
[Fluorenscent Display Tube All Lit]
With the power OFF, while pressing the  DIGITAL 3  button and  
button togher, press the  POWER  button to turn ON the power.
The fluorenscent display tube all lit modewill be set.
SECTION  3
TEST MODE
[Self-Diagnosis and Test Mode]
This unit is provided with a “self-diagnosis and self-recovery func-
tion” which detects DSP errors and automatically recovers the unit,
and a test mode for performing operation checks during repairs.
1. Main Functions
1. DSP Error Messages
2. Various operation check mode
3. Initialization
2. Entering the Test Mode
While pressing the  DIGITAL 2  button and  ANALOG  button
simultaneously in the power OFF state, press the  POWER  button.
1. DSP Error Messages
When errors occur in the DSP, they are displayed on the fluorescent
display tube.
(Refer to Table 1 for the error messages displayed.)
Table-1:
2. Operation Check Mode
• During the operation check mode, functions can be set by press-
ing the corresponding button. (See Table-2.)
• When a button other than those displayed in Table 2 is pressed,
press the  POWER  button to exit the check mode.
Table-2:
Button
Function
Fluorescent
Display Tube
Display
DIGITAL1
OPT-1
(L-FL, R-FR)
Like normal operations, Lch is output to
Lch and Rch to Rch.
DIGITAL2
OPT-2
(L-SL, R-SR)
Outputs the Lch DIGITAL-2 input signal
to the REAR Lch and the Rch to the REAR
Rch.
DIGITAL3
OPT-3
(L-C, R-SW)
Outputs the Lch DIGITAL-3 input signal
to the CENTER and the Rch only to the
WOOFER.
ANALOG
COAX
(L, R-ALL)
Outputs the Lch DIGITAL 1 COAXIAL
input signal to the FRONT Lch, REAR
Lch, CENTER, and the Rch to the FRONT
Rch, REAR Rch, and CENTER.
Possible cause
1 Failed in initial
booting
(BOOT ERROR)
2 DSP does not
operate
(RPLY ERROR)
3 Communication
port malfunction
(HREQ ERROR)
4 No reply from
DSP
(VRFY ERROR)
Mostly due to faulty connection (soldering)
between DSP and microprocessor
Faulty DSP clock (X102 and onwards), faulty
DSP part, etc.
Overrunning of DSP due to heat, micropro-
cessor bugging, or IC701 (PLL board PLL) is
faulty
Faulty DSP part, or faulty microprocessor part,
etc.
Cause of error
(Display)
Button name
Fluorenscent display tube state
DIGITAL 1
DIGITAL 2
DIGITAL 3
ANALOG
All lit
Partial lighting 1
Partial lighting 2
OFF
When the other buttons are pressed, press the  POWER button to
exit the mode.
Partial lighting 1
Partial lighting 2
[Key Check Mode]
When the  POWER  button is pressed while pressing the  DIGITAL 1
button and  ANALOG  button, “KEY CHECK:12 KEYS” is dis-
played on the fluorescent display tube and the key check mode is
set.
When the  POWER  button is pressed during this mode, the number
at “12 KEYS” is counted down. When all other buttons are pressed,
the number stops at “00 KEYS” (Note: The number is not counted
down when buttons already pressed once are pressed again.).
To exit the mode, press the  POWER  button and turn OFF the
power.
— 14 —
SECTION  4
DIAGRAMS
4-1. CIRCUIT BOARDS LOCATION
TRANS BOARD
AC SW BOARD
DISPLAY BOARD
VOL BOARD
PLL BOARD
MAIN BOARD
— 16 —
— 15 —
4-2.  BLOCK DIAGRAMS
— DA SECTION —
SDP-E800
DIGITAL 1
OPTICAL
IN
DIGITAL
INPUT
IC101
OUT
SELECTOR
IC106
D1
OUT
D2
D3
D5
D0
A B C
3
DIGITAL 2
OPTICAL
IN
DIGITAL
INPUT
IC102
OUT 3
DIGITAL 3
OPTICAL
IN
DIGITAL
INPUT
IC103
DIGITAL 3
OPTICAL
OUT
DIGITAL 1
COAXIAL
IN
OUT 3
3
2
IC105
J101
ANALOG
IN L
AC-3 (RF)
SECTION
OUTPUT
FRONT L
J106
3
5
2
1
14
4
11 10 9
DIGITAL AUDIO
INTERFACE RECEIVER
IC107
SELECTOR
IC108 (1/2)
DIN2
DATAO
B2
A2
Y2
2
SCLK
B0
A0
B1
A1
XLAT
SWDT
SRDT
EROR
XMODE
14
15
16
17
24
10
AINL+
AINL-
MCLK
4
15
A/D CONVERTER
IC203
5
13
14
10
17
2QD
SDATA
11
AVOCK
E/D
OUT
22
LRCK
Y0
Y1
S
21
BCK
LRCK
SCLK
DIRCLK
DIRLAT
DIWDAT
DIRDAT
DIRERR
DIRRST
ADINT
EXTAL
DAO
DIG-IN0
DIG-IN1
DIG-IN2
1QB
8
4
1CLK
1
CLOCK COUNTER
IC115
S
R
7
8
PD OUT 3
13
PLL
Q701-705
PLL
L702
2
7
BUFFER
IC116
8
10
BUFFER
IC702
X102
12.288MHz
2
H. P. F
IC202
6
1
7
6
L. P. F
IC201
7
23
10
9
DATA
BCKO
BCK
LRCKO
LRCK
11
DIGITAL FILTER, D/A CONVERTER (FRONT)
IC301
D/A
CONVERTER
DATAI
40
LRCKI
BCKI
ATT
XIN
SHIFT
LATCH
INIT
39
38
37
36
35
34
10
L1 (–)
L2 (+)
61
2
L1 (+)
L2 (–)
63
4
DIGITAL
OUTPUT
IC104
VIN
1
CLOCK COUNTER
IC703
PHASE
COMPARATOR
IC701
2QC
1CLK
9
1
AMP
IC304
CLK
DI
CE
IC303
ATT
IC305
5dB
OUT1
5dB
IN1
5
2
M
RV601
MASTER VOLUME
1dB
IN1
1dB
OUT
7
8
18 19
17
3
C
DSP
SECTION
H
PANEL
SECTION
I
DSP
SECTION
J
DSP
SECTION
D
DSP SECTION
A
DSP
SECTION
E
DSP
SECTION
F
3
2
6
5
SELECTOR
IC108 (2/2)
10
13
4
8
6
1
4
7
1
BUFFER
IC109
RST
MIX
AMP
H. P. F.
MUTE1
MUTE2
DIGITAL
FILTER
MODE
CLOCK
GENERATOR
DIGITAL FILTER, D/A CONVERTER
(CENTER, SUPER WOOFER)
IC1301
D/A
CONVERTER
DATAI
40
LRCKI
BCKI
ATT
SHIFT
LATCH
INIT
39
38
128FSO
DAINT
ANADIG
RY-F
DALAT
DACLK
DADAT
ATCE
ATDAT
ATCLK
VOL LED
VOL MT
INIT
LATCH
SHIFT
ATT
CE
DI
CLK
46
37
36
35
34
XIN
10
L1 (–)
L2 (+)
CENTER
L1 (+)
L2 (–)
DIGITAL
FILTER
MODE
CLOCK
GENERATOR
SOA
SOC
DSP SECTION
B
6
8
RY301
7
5
AMP
IC306
5
7
IC302
L. P. F.
7
2
J108
/
• R-CH, SUPER WOOFER is ommited.
• REAR L-CH and CENTER part was ommited.
   (Same as FRONT L-CH)
• Signal path
          : Digital in
          : Digital out
          : Analog
          : RF (AC-3)
          
61
2
63
4
09
3
6
— 18 —
— 17 —
— DSP SECTION —
SDP-E800
DIGITAL 1
AC-3
RF
BUFFER
Q101
J102
6
L.P.F.
IC110
7
BUFFER
Q102
1
4
6
9
FILTER
FL101
BUFFER
Q103
+
3
2
1
RV901
NO ADJUSTMENT
AMP
IC111
Q104
CPIN
DEMODULATION
S/P
ERROR
CORRECTOR
DAI
CONTROL
DIVIDER
DIGITAL
OUT
DAO
70
DAOUT
DIGITAL
PLL
26
L.P.F.
IC111
PHASE
COMPARATOR
DIVIDER
VIN
VOUT
X101
18.432MHz
55
56
63
78
89
88
X LOCK
AMP
Q105
51 - 44
D0 - D7
17 - 22•30•31•38•39•43•41•34•37•35
A0
A14
ADDRESS
GENERATOR
27 22
WE
OE
11 - 13 • 15 - 19
D0
D7
10 - 3•25•24•21•23•2•26•1
A0
A14
S RAM
IC113
WE
OE
36 42
INTERFACE
4
AC. RST
RESET
OSCON
MUTO
PDDIS
MUTO
G
DSP
SECTION
C
D/A
SECTION
82
XIN
PDO
6
7
Q106
+
IC110
2
1
MUTI
DOUTB
DOUT
09
DIGITAL SIGNAL PROCESSOR
(AC-3 RF DEMODULATOR)
IC114
• Signal path
          : RF (AC-3)
(Page 17)
(Page 21)
CPU
D101
3
66
65
Page of 52
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