Sony SCD-XB940 (serv.man2) Service Manual ▷ View online
21
Pin No.
Pin Name
I/O
Description
1
XSRQ
O
Data request signal output to the RF signal decoder (IC622)
2
XSHD
I
Header flag signal input from the RF signal decoder (IC622)
3
VDD
—
Power supply terminal (+3.3V)
4
VSS
—
Ground terminal
5
SDCK
I
Serial data clock signal input from the RF signal decoder (IC622)
6
SMUTE
I
Muting signal input from the system controller (IC605) “L”: muting
7
XMSLAT
I
Latch signal input from the system controller (IC605)
8
MSCK
I
Clock signal input from the system controller (IC605)
9
MSDATI
I
Serial data input from the system controller (IC605)
10
MSDATO
O
Serial data output to the system controller (IC605)
11
MSREDY
O
Ready signal input from the system controller (IC605) “L”: ready
12
XMSDOE
O
Data enable signal output terminal Not used (open)
13
XRST
I
Reset signal input from the expander (IC612)
14
MCKI
I
Master clock signal input terminal
15
VSS
—
Ground terminal
16
CK75S
I
Master clock select signal input terminal “L”: 512fs, “H”: 768fs (fixed at “H” in this set)
17
EXCKO1
O
External clock 1 signal output terminal Not used (open)
18
EXCKO2
O
External clock 2 signal output terminal Not used (open)
19
LRCK
I/O
Clock signal input/output terminal (44.1kHz) Not used (open)
20
NC
—
Not used (open)
21
MNT2
O
Monitor 2 signal output terminal Not used (open)
22
TRST
I
Reset signal input from the expander (IC612) “L”: reset
23
TCK
I
Clock signal input terminal for test (normally: fixed at “L”)
24
TDI
I
Data input terminal for test (normally: open)
25
TENA1
I
Data enable signal input terminal for test (normally: open)
26
TDO
O
Data output terminal for test (normally: open)
27
VST
—
Ground terminal for test (normally: fixed at “L”)
28
VDD
—
Power supply terminal (+3.3V)
29
VSS
—
Ground terminal
30
MNT1
O
Monitor 1 signal output terminal Not used (open)
31
MNT0
O
Monitor 0 signal output terminal Not used (open)
32
XBIT
O
Monitor signal output terminal Not used (open)
33
F75HZ
O
Clock output terminal (75Hz) Not used (open)
34
SUPDAT
O
Serial data output terminal Not used (open)
35
XSUPAK
O
Data flag signal output terminal Not used (open)
36
SUPEN
O
Data enable signal output terminal Not used (open)
37
TEST1
I
Test 1 signal input terminal for test (normally: fixed at “L”)
38
VSS
—
Ground terminal
39
TEST2
I
Test 2 signal input terminal for test (normally: fixed at “L”)
40, 41
VSS
—
Ground terminal
42
BCKD
I
Phase reference signal input terminal
43 to 45
NC
—
Not used (open)
46
BCKA
I
Shift clock signal input terminal
47
DSAL
O
DSD data (Lch) output terminal
48
DSAR
O
DSD data (Rch) output terminal
49
ZDFLGL
O
Data (Lch) flag detect signal output terminal
• MAIN BOARD IC617 CXD2751Q (DSD DECODER)
22
Pin No.
Pin Name
I/O
Description
50
ZDFLGR
O
Data (Rch) flag detect signal output terminal
51, 52
A0, A1
O
Address signal output to the D-RAM (IC625)
53
VDD
—
Power supply terminal (+3.3V)
54
VSS
—
Ground terminal
55 to 63
A2 to A10
O
Address signal output to the D-RAM (IC625)
64
NC
—
Not used (open)
65
VSS
—
Ground terminal
66
XWE
O
Write enable signal output to the D-RAM (IC625)
67
XCAS
O
Column address strobe signal output to the D-RAM (IC625)
68
XRAS
O
Row address strobe signal output to the D-RAM (IC625)
69
XOE
O
Read enable signal output to the D-RAM (IC625)
70 to77
DQ0 to DR7
I/O
Two-way data bus with the D-RAM (IC625)
78
VDD
—
Power supply terminal (+3.3V)
79
VSS
—
Ground terminal
80
WCK
I
Clock signal input terminal for disk mark detect
81
WRFD
I
RF data signal input terminal for disk mark detect
82 to 89 WAD0 to WAD7
I
A/D data signal input from the A/D converter (IC620) for disk mark detect
90
VSS
—
Ground terminal
91 to 98
SD7 to SD0
I
Stream data signal input from the RF signal decoder (IC622)
99
SDEF
I
Error flag signal input from the RF signal decoder (IC622)
100
XSAK
I
Data flag signal input from the RF signal decoder (IC622)
SCD-XB940
Sony Corporation
Audio Entertainment Group
9-929-212-81
2000E057548-1
Printed in Hungary
C
2000. 5
Published by HA Quality Assurance Dept.
22
Pin No.
Pin Name
I/O
Description
50
ZDFLGR
O
Data (Rch) flag detect signal output terminal
51, 52
A0, A1
O
Address signal output to the D-RAM (IC625)
53
VDD
—
Power supply terminal (+3.3V)
54
VSS
—
Ground terminal
55 to 63
A2 to A10
O
Address signal output to the D-RAM (IC625)
64
NC
—
Not used (open)
65
VSS
—
Ground terminal
66
XWE
O
Write enable signal output to the D-RAM (IC625)
67
XCAS
O
Column address strobe signal output to the D-RAM (IC625)
68
XRAS
O
Row address strobe signal output to the D-RAM (IC625)
69
XOE
O
Read enable signal output to the D-RAM (IC625)
70 to77
DQ0 to DR7
I/O
Two-way data bus with the D-RAM (IC625)
78
VDD
—
Power supply terminal (+3.3V)
79
VSS
—
Ground terminal
80
WCK
I
Clock signal input terminal for disk mark detect
81
WRFD
I
RF data signal input terminal for disk mark detect
82 to 89 WAD0 to WAD7
I
A/D data signal input from the A/D converter (IC620) for disk mark detect
90
VSS
—
Ground terminal
91 to 98
SD7 to SD0
I
Stream data signal input from the RF signal decoder (IC622)
99
SDEF
I
Error flag signal input from the RF signal decoder (IC622)
100
XSAK
I
Data flag signal input from the RF signal decoder (IC622)
SCD-XB940
Sony Corporation
Audio Entertainment Group
9-929-212-81
2000E057548-1
Printed in Hungary
C
2000. 5
Published by HA Quality Assurance Dept.
22
Pin No.
Pin Name
I/O
Description
50
ZDFLGR
O
Data (Rch) flag detect signal output terminal
51, 52
A0, A1
O
Address signal output to the D-RAM (IC625)
53
VDD
—
Power supply terminal (+3.3V)
54
VSS
—
Ground terminal
55 to 63
A2 to A10
O
Address signal output to the D-RAM (IC625)
64
NC
—
Not used (open)
65
VSS
—
Ground terminal
66
XWE
O
Write enable signal output to the D-RAM (IC625)
67
XCAS
O
Column address strobe signal output to the D-RAM (IC625)
68
XRAS
O
Row address strobe signal output to the D-RAM (IC625)
69
XOE
O
Read enable signal output to the D-RAM (IC625)
70 to77
DQ0 to DR7
I/O
Two-way data bus with the D-RAM (IC625)
78
VDD
—
Power supply terminal (+3.3V)
79
VSS
—
Ground terminal
80
WCK
I
Clock signal input terminal for disk mark detect
81
WRFD
I
RF data signal input terminal for disk mark detect
82 to 89 WAD0 to WAD7
I
A/D data signal input from the A/D converter (IC620) for disk mark detect
90
VSS
—
Ground terminal
91 to 98
SD7 to SD0
I
Stream data signal input from the RF signal decoder (IC622)
99
SDEF
I
Error flag signal input from the RF signal decoder (IC622)
100
XSAK
I
Data flag signal input from the RF signal decoder (IC622)
SCD-XB940
Sony Corporation
Audio Entertainment Group
9-929-212-81
2000E057548-1
Printed in Hungary
C
2000. 5
Published by HA Quality Assurance Dept.
