DOWNLOAD Sony SCD-XB940 (serv.man2) Service Manual ↓ Size: 262.95 KB | Pages: 22 in PDF or view online for FREE

Model
SCD-XB940 (serv.man2)
Pages
22
Size
262.95 KB
Type
PDF
Document
Service Manual
Brand
Device
Audio / SUPPLEMENT-1
File
scd-xb940-sm2.pdf
Date
PREV: Sony SCD-XB940 Service Manual

Sony SCD-XB940 (serv.man2) Service Manual ▷ View online

13
13
SCD-XB940
47
51
52
53
46
63
35
62
64
61
44
41
43
32
30
50
49
48
60
56
31
1 
–
 34
39 
–
 52
53, 54
P1 
–
 34
3G 
–
 16G
1G, 2G
31
29
ROTARY
ENCODER
S201 (1/2)
SEGMENT
DRIVE
Q201
GRID
DRIVE
Q202, 203
–33V
REGULATOR
Q921
+12V
REGULATOR
IC905
+12V
REGULATOR
IC907
+5V
REGULATOR
IC906
+5V
REGULATOR
IC903
LINE
FILTER
L901
+3.3V
REGULATOR
IC904
+3.3V
REGULATOR
IC306
+5V
REGULATOR
IC303
+3.3V
REGULATOR
IC619
+5V
REGULATOR
IC302
+7V
REGULATOR
IC304
–7V
REGULATOR
IC305
+12V
REGULATOR
IC307
–12V
REGULATOR
IC308
REMOTE
CONTROL
RECEIVER
IC202
RESET
SIGNAL
GENERATOR
IC271
IFBSY
(Page 11)
(Page 11)
+5V
IFSI0, IFSO0, IFSCO, XIFCS
XFRRST
D201
IFSI0
IFSO0
IFSCO
XIFCS
ACK
RESET
SOUT
SIN
SCK
REQ
SIRCS
CP
CS
DA
RESET OUT
KEY 0
JOG2
JOG1
EXTAL
XTAL
DISPLAY CONTROLLER
IC203
FLUORESCENT
INDICATOR TUBE DRIVE
IC201
X201
8MHz
FL CLK
FLT
FL DATA
FL RST
P35
S201 (2/2),
S251 – 254
F1
F2
FLUORESCENT
INDICATOR
TUBE
FL201
POWER TRANSFORMER
(DIGITAL)
T901
F1, F2
RECT
D917 – 920
RECT
D913 – 916
RECT
D909 – 912
RECT
D905 – 908
RECT
D901 – 904
+5V
–33V
TO
DISPLAY
SECTION
+12V
(M +12V)
+12V
+5V
+3.3V
POWER
S901
AC IN
POWER TRANSFORMER
(ANALOG)
T902
+5V
(D +5V)
+3.3V
+5V
+5V
+7V
–7V
+12V
–12V
AUDIO
SECTION
+3.3V
RF SIGNAL DECODER
(IC622)
RF, MAIN
SECTION
30
(Page 11)
05
2-5.
BLOCK  DIAGRAM  – DISPLAY/POWER SUPPLY Section –
14
14
2-6.
IC  PIN  FUNCTION  DESCRIPTION
• MAIN BOARD  IC605  MB91107PFV-G-BND (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
O
Address signal output to the expander (IC612) and ROM (IC632)
3
A19/P63
O
Address signal output to the expander (IC612)
4, 5
O
Address signal output terminal    Not used (open)
6, 7
O
Test signal output terminal for check (fixed at “H” in this set)
8
A24/P70
O
Address signal output terminal (fixed at “H” in this set)
9
AVCC
—
Power supply terminal (+3.3V) (for A/D converter)
10
AVRH
—
Reference voltage input (high) terminal (for A/D converter)
11
AVSS/AVRL
—
Ground terminal (for A/D converter) and Reference voltage input (low) terminal
12 to 15
AN0 to AN3
I
Analog input terminal (for A/D converter)
16
TRG0/PH0
O
Reset signal output to the expander (IC612)    “L”: reset
17
TRG1/PH1
O
SACD/CD mode signal output to the digital filter (IC301)
18
TRG2/PH2/CS6X
O
Serial data output to the digital filter (IC301)
19
TRG3/PH3/CS7X
O
Shift signal output to the digital filter (IC301)
20
OCPA0/PH4
O
Latch signal output to the digital filter (IC301)
21
OCPA1/PH5
O
Initial signal output to the digital filter (IC301)
22
OCPA2/PH6
O
Audio muting signal output terminal    “L”: muting
23
OCPA3/PH7
O
Filter control signal output terminal
24
VCC
—
Power supply terminal (+3.3V) (digital system)
25
INT0/PG0
I
External interrupt request signal input terminal    Not used (fixed at “H”)
26
INT1/PG1
I
Interrupt request 1 signal input from the expander (IC612)
27
INT2/PG2
I
External interrupt request signal input terminal    Not used (fixed at “H”)
28
INT3/PG3
I
Interrupt request 3 signal input from the expander (IC612)
29 to 32
I
External interrupt request signal input terminal    Not used (fixed at “H”)
33
SI0/RF0
I
Serial data input from the display controller (IC203) and EEPROM (IC600)
34
VSS
—
Ground terminal (digital system)
35
SO0/PF1
O
Serial data output to the display controller (IC203) and EEPROM (IC600)
36
SC0/PF2
O
Clock signal output to the display controller (IC203) and EEPROM (IC600)
37
SI1/PF3
I
Serial data input from the DSD decoder (IC617)
38
SO1/PF4
O
Serial data output to the DSD decoder (IC617)
39
SC1/PF5
O
Clock signal output to the DSD decoder (IC617)
40
SI2/PF6
I
Serial data input terminal for check
41
SO2/PF7
O
Serial data output terminal for check
42
SC2/PE0
O
Clock signal output terminal for check
43
DREQ0/PE1
I
External transfer request signal input terminal
44
DACK0/PE2
O
External transfer request acknowledge signal output terminal
45
EOP0/PE3
O
Not used (open)
46
DREQ1/PE4
I
External transfer request signal input terminal    Not used (fixed at “H”)
47
DACK1/PE5
O
External transfer request acknowledge signal output terminal    Not used (fixed at “H”)
48
EOP1/PE6
O
Not used (open)
49
DREQ2/PE7
I
External transfer request signal input terminal    Not used (open)
50
DACK2/PI0
O
External transfer request acknowledge signal output terminal    Not used (open)
51
EOP2/PI1/ATGX
O
Not used (open)
A17/P61, 
A18/P62
A20/P64, 
A21/P65
A22/P66, 
A23/P67
INT4/PG4 to 
INT7/PG7
Pin No.
Pin Name
I/O
Description
52
VSS
—
Ground terminal (digital system)
53
X1
O
System clock output terminal (12.5MHz)
54
X0
I
System clock input terminal (12.5MHz)
55
VCC
—
Power supply terminal (+3.3V) (digital system)
56
RAS0/PB0
O
Control signal output terminal     Not used (fixed at “H”)
57
CS0L/PB1
O
Interrupt request signal output to the display controller (IC203)
58
CS0H/PB2
O
Muting signal output to the DSD decoder (IC617)    “L”: muting
59
DW0X/PB3
O
Not used (open)
60
RAS1/PB4
O
Latch signal output to the DSD decoder (IC617)
61
CS1L/PB5
O
Not used (open)
62
CS1H/PB6
I
Ready signal input from the DSD decoder (IC617)    “L”: ready
63
DW1X/PB7
O
Write enable signal output terminal   “L”: active
64
C
—
Bypass capacitor terminal for internal capacitor
65
CS0X
O
Chip select signal output to the ROM (IC632)   “L”: active
66
CS1X/PA1
O
Chip select signal output to the expander (IC612) and S-RAM (IC632)   “L”: active
67, 68
O
Chip select signal output terminal   “L”: active (fixed at “H” in this set)
69
CS4X/PA4
O
Chip select signal output to the expander (IC612)   “L”: active
70
CS5X/PA5
O
Chip select signal output terminal   “L”: active (fixed at “H” in this set)
71
CLK/PA6
O
Clock signal output to the expander (IC612)
72
NMIX
I
Non maskable interrupt signal input terminal   “L”: active (fixed at “H” in this set)
73
HSTX
I
Hardware standby signal input terminal   “L”: active (fixed at “H” in this set)
74
RSTX
I
Reset signal input from the display controller (IC203)
75
VSS
—
Ground terminal (digital system)
76
MD0
I
Mode set signal input terminal (fixed at “H”)
77, 78
MD1, MD2
I
Mode set signal input terminal (fixed at “L”)
79
RDY/P80
I
Wait signal input from the expander (IC612)
80
BGRNTX/P81
O
External bus release acknowledge signal output terminal (fixed at “H” in this set)
81
BRQ/P82
I
External bus release request signal input terminal (fixed at “L” in this set)
82
RDX
O
Read strobe signal output to the expander (IC612)
83
WR0X
O
Write strobe 0 signal output to the expander (IC612)
84
WR1X/P85
O
Write strobe 1 signal output to the expander (IC612)
85 to 92
I/O
Two-way data bus with the S-RAM (IC609) and ROM (IC632)
93 to 100
D24 to D31
I/O
Two-way data bus with the servo digital signal processor (IC607), S-RAM (IC609), expander 
(IC612) , RF signal decoder (IC622), and ROM (IC632)
101
VSS
—
Ground terminal (digital system)
102
A00
O
Address signal output to the servo digital signal processor (IC607), expander (IC612) , and RF 
signal decoder (IC622)
103
A01
O
Address signal output to the servo digital signal processor (IC607), S-RAM (IC609), expander 
(IC612) , RF signal decoder (IC622), and ROM (IC632)
104 to 107
A02 to A05
O
Address signal output to the S-RAM (IC609), expander (IC612), RF signal decoder (IC622), and 
ROM (IC632)
108, 109
A06, A07
O
Address signal output to the S-RAM (IC609), RF signal decoder (IC622), and ROM (IC632)
110
VCC
—
Power supply terminal (+3.3V) (digital system)
111 to 118
A08 to A15
O
Address signal output to the S-RAM (IC609) and ROM (IC632)
119
VSS
—
Ground terminal (digital system)
120
A16/P60
O
Address signal output to the S-RAM (IC609) and ROM (IC632)
CS2X/PA2, 
CS3X/PA3
D16/P20 to 
D23/P27
15
• MAIN BOARD  IC607  CXD8791AQ (DIGITAL SERVO SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
HRD/HRXD
I
Data read strobe signal input from the expander (IC612)
2
HWR/HFS
I
Data write strobe signal input from the expander (IC612)
3
HCS
I
Chip select signal input from the expander (IC612)
4, 5
HA1, HA0/HCK
I
Address signal input from the system controller (IC605)
6
VDD
—
Power supply terminal (+3.3V) (digital system)
7 to 9
PWM0 to PWM2
O
Sled motor control signal output to the sled motor drive (IC615)
10
VSS
—
Ground terminal (digital system)
11, 12
EMU1, EMU0
I/O
Emulator signal input/output terminal    Not used (open)
13
TDO
O
Test data output terminal    Not used (open)
14
TCK
I
Test clock input terminal    Not used (open)
15
TDI
I
Test data input terminal    Not used (open)
16
TMS
I
Test mode select signal input terminal    Not used (open)
17
TRST
I
Test reset signal input terminal    Not used (open)
18
VDD
—
Power supply terminal (+3.3V) (digital system)
19
VSS
—
Ground terminal (digital system)
20
TRREF
I
Tracking reference signal input from the SSI33P3722 (IC001)
21
TRIN
I
Mirror detect signal input from the SSI33P3722 (IC001)
22
FGREF
I
FG reference clock signal input from the RF signal decoder (IC622)
23
FGIN
I
FG signal input terminal
24
PGREF
I
PG reference signal input terminal    Not used (open)
25
PGIN
I
PG signal input terminal    Not used (open)
26
RS
I
Reset signal input from the expander (IC612)
27
LG
I
Not used (open)
28
DFCT1
I
Defect signal input terminal
29
HEAD
I
Head signal input terminal    Not used (open)
30
CLKODIS
I
CLKOUT1 (pin ea ) disable signal input terminal    “H”: disable (fixed at “L” in this set)
31
CLKOUT1
O
Master clock output terminal    Not used (open)
32
VDD
—
Power supply terminal (+3.3V) (digital system)
33
VSS
—
Ground terminal (digital system)
34 to 37
GIO15 to GIO12
—
Not used (open)
38
GIO11
O
Defect control signal output terminal
39
GIO10
O
Function control signal input from the expander (IC612)
40
GIO9
—
Not used (open)
41
GIO8
O
Clock signal output to the SSI33P3722 (IC001)
42
GIO7
O
Serial write data output to the SSI33P3722 (IC001)
43
GIO6/TMC2
I
Serial read data input from the SSI33P3722 (IC001)
44
GIO5/TMC1
O
Serial data enable output to the SSI33P3722 (IC001)
45
VDD
—
Power supply terminal (+3.3V) (digital system)
46
GIO4/TMC0
I
Standby signal input from the tilt motor drive (IC614)
47
GIO3/INT5
—
Not used (open)
48
GIO2/INT4
O
Tilt motor control signal output to the tilt motor drive (IC614)
49
GIO1/INT3
O
Tilt motor control signal output to the tilt motor drive (IC614)
50
GIO0/INT2
I
Interrupt signal input terminal
51
VSS
—
Ground terminal (digital system)
52
TESTC
I
Test signal input terminal (fixed at “L”)
16
Pin No.
Pin Name
I/O
Description
53 to 56
I
Test signal input terminal (fixed at “L”)
57, 58
I
Test signal input terminal (fixed at “L”)
59
TESTSOA
O
Test signal output terminal (open)
60 to 64
ADC9 to ADC5
I
Reference voltage input terminal
65
ADC4
I
Spindle error signal input terminal
66
ADC3
I
TE gain control signal input terminal
67
ADC2
I
PI signal input from the SSI33P3722 (IC001)
68
ADC1
I
FE signal input from the SSI33P3722 (IC001)
69
ADC0
I
TE signal input from the SSI33P3722 (IC001)
70
VRTA
I
Reference voltage (top) input terminal (for A/D converter)
71
VCCA1
—
Power supply terminal (+3.3V) (analog system)
72
TESTA
O
Test signal output terminal (open)
73
GNDA1
—
Ground terminal (analog system)
74
VRBA
I
Reference voltage (bottom) input terminal (for A/D converter)
75
VSS3V1
—
Ground terminal (analog system)
76
VDD3V1
—
Power supply terminal (+3.3V) (analog system)
77
GNDA2
—
Ground terminal (analog system)
78
VCCA2
—
Power supply terminal (+3.3V) (analog system)
79
VRT3
I
Reference voltage (top) input terminal (for D/A converter)
80
DAB3
O
Focus coil control signal output to the focus coil drive (IC614)
81
VRB3
I
Reference voltage (bottom) input terminal (for D/A converter)
82
VSS3V2
—
Ground terminal (analog system)
83
VDD3V2
—
Power supply terminal (+3.3V) (analog system)
84
VRB2
I
Reference voltage (bottom) input terminal (for D/A converter)
85
DAB2
O
Focus coil control signal output to the focus coil drive (IC614)
86
VRT2
I
Reference voltage (top) input terminal (for D/A converter)
87
VCCA3
—
Power supply terminal (+3.3V) (analog system)
88
GNDA3
—
Ground terminal (analog system)
89
GNDA4
—
Ground terminal (analog system)
90
VCCA4
—
Power supply terminal (+3.3V) (analog system)
91
VRT1
I
Reference voltage (top) input terminal (for D/A converter)
92
DAB1
O
Tracking coil control signal output to the tracking coil drive (IC614)
93
VRB1
I
Reference voltage (bottom) input terminal (for D/A converter)
94
VSS3V3
—
Ground terminal (analog system)
95
VDD3V3
—
Power supply terminal (+3.3V) (analog system)
96
VRB0
I
Reference voltage (bottom) input terminal (for D/A converter)
97
DAB0
O
Tracking coil control signal output to the tracking coil drive (IC614)
98
VRT0
I
Reference voltage (top) input terminal (for D/A converter)
99
VCCA5
—
Power supply terminal (+3.3V) (analog system)
100
GNDA5
—
Ground terminal (analog system)
101, 102
I
Test signal input terminal (fixed at “L”)
103
TESTSOB
O
Test signal output terminal (open)
104
PLLMD
I
PLL mode select signal output terminal    Not used (fixed at “H”)
105
TESTB
I
Test signal input terminal (fixed at “L”)
TESTSIA1, 
TESTSIA0
TEST3 to 
TEST0
TESTSIB1, 
TESTSIB0
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