DOWNLOAD Sony NW-HD5 Service Manual ↓ Size: 2.03 MB | Pages: 51 in PDF or view online for FREE

Model
NW-HD5
Pages
51
Size
2.03 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
nw-hd5.pdf
Date

Sony NW-HD5 Service Manual ▷ View online

33
NW-HD5
IC9003
SC901584EPR2
POWER
SWITCH 2
SERIAL
PASS
REGULATOR 3
49
REGC2
50
REG2G
51
REGO2
52
REGI2
53
REGC1
54
REGO1
55
REGI1
22 INM1
21 RF1
58
DATA
59
STRB
60
CLK
61
WDT
62
SEQSEL
63
CLK
64
SLEEP
1
FFCLR
2
XWK4
3
XWK3
4
XWK2
5
XWK1
LVB
6
VRMC
FFCLR
7
HVB
8
VTSB
9
VC1
10
VCO1
11
VO1
13
L1
14
L1
15
PGND1
16
PGND1
12
34
XRST2
33
CRST2
20 DTC1
19 XRST1ADJ
18 CRST1
17 XRST1
25 LG
24 VG
26 PGND3
23 C1L
29 VGSEL1
28 VGSEL2
30 INM2
31 RF2
32 DTC2
RST2
REF2
VG SELECT, VG DUTY
CLK
36
PGND2
35
PGND2
L2
37
L2
38
VO2
39
VCO2
40
VCIN
41
VC2
42
DW 2T
43
DW 2B
44
MUTEON
45
REGC3
46
REGO3
47
REGI3
48
SERIAL
PASS
REGULATOR 2
SERIAL
PASS
REGULATOR 1
RST1
RST2
SEQSEL
MUTE ON
MUTING
BUFFER
VC2
RST2
POWER
SWITCH 1
RST2
STEP
UP-DOWN
DRIVER
PWM
START UP
RESET 2
VC2
REF2
VREF
VB
REF1
VC
VREF
27 VB
STEP UP
DC/DC CONVERTER
CONTROL
REF1
REF2
REF3
REF4
REF5
REF DAC
VREF0
RST1
LVB
DRIVER
VREF
VC
VC
STEP
UP-DOWN
DRIVER
PWM
VREF
RESET 1
VC
RST1
VREF
REF1
56
GND
57
VREF
VC
VREF0
BANDGAP
REFERENCE
IC8000
HAAM-312B
10
Z OUT (A)
9
Y OUT (A)
8
X OUT (A)
7
C SET
6
VCC
1
GND
2
F SET
3
Z OUT (D)
4
Y OUT (D)
5
X OUT (D)
DUTY CYCLE
MODULATOR
DEMULTI-PLEXER
MULTI-PLEXER
S/H
AMPLIFIER
EEPROM
Y SENSOR
S/H
X SENSOR
S/H
Z SENSOR
34
NW-HD5
IC9503
R2061K01-E2
IC9004
LTC3411EDD#TR
1
SHDN/RT
VB
+0.74V
2
SYNC/MODE
3
SGND
4
SW
5
PGND
SVIN
7
ERROR
AMPLIFIER
NMOS
COMPARATOR
REVERSE
COMPARATOR
PMOS CURRENT
COMPARATOR
BURST
COMPARATOR
HYSTERESIS
= 80 mV
LOGIC
OSCILLATOR
VOLTAGE
REFERENCE
SLOPE
COMPENSATION
PVIN
6
VFB
9
+0.86V
ITH
10
PGOOD
8
ITH
LIMIT
SIO 1
SCLK 2
7 OSCIN
VSB
4
VCC
5
VDD
6
CE
12
CIN
10
VSS
11
LEVEL
SHIFTER
DELAY
REAL
TIME
CLOCK
/VDCC 3
VOLTAGE
DETECTOR
BATTERY
VOLTAGE
MONITOR
8 OSCOUT
9 /INTR
VOLTAGE
REFERENCE
35
NW-HD5
IC Pin Function Description
MAIN BOARD  IC1003  CXR704060-201GA (SYSTEM CONTROLLER, D/A CONVERTER)
Pin No.
Pin Name
I/O
Description
1
VDIO0
-
Power supply terminal (+1.9V) (for I/O interface)
2 to 10
PM4/A12 to
PM7/A15,
PN0/A16 to
PN4/A20
O
Address signal output to the flash memory and multi interface
11 to 13
PN5/A21 to
PN7/A23
O
Address signal output to the multi interface
14
DVSS7
-
Ground terminal
15 to 22
FAD0 to FAD7
I/O
Not used
23
FCLE
O
Not used
24
FALE
O
Not used
25
VDIODF
-
Power supply terminal (for NAND flash memory interface)    Not used
26
FWE
O
Not used
27
PRE
O
Not used
28
FWP
O
Not used
29
FCE0
O
Not used
30
FRB0
I
Not used
31
FCE1
O
Not used
32
FRB1
I
Not used
33
PP0/RP
O
Wake up signal output to the sub system controller
34
PP1/RB
O
Communication request signal output to the sub system controller
35
DVDD0
-
Power supply terminal (+1.2V) (for core)
36
DVSS1
-
Ground terminal
37
VDIO1
-
Power supply terminal (+1.9V) (for I/O interface)
38 to 53
PO0/D0 to PO7/D7,
PB0/D8 to PB7/D15
I/O
Two-way data bus with the flash memory and multi interface
54
PA0/PWM
O
Not used
55
PA1/SDA
O
Not used
56
PA2/SCL
O
Not used
57
PC0/SCK0
I
Serial clock signal input from the sub system controller
58
PC1/SO0
O
Serial data output to the sub system controller
59
PC2/SI0
I
Serial data input from the sub system controller
60
PC3/SCS0
O
Chip select signal output to the sub system controller
61
DVSS2
-
Ground terminal
62
VDIO2
-
Power supply terminal (+1.9V) (for I/O interface)
63
KDI
O
Not used
64
KRB
O
Not used
65
KCLK
O
Not used
66
KCS
O
Not used
67
KDO
O
Not used
68
TEST4
I
Input terminal for the test mode setting
69
PE0/TXD0
O
Data output terminal    Not used
70
PE1/RXD0
I
Data input terminal    Not used
71
PE2/TXD1
O
Strobe signal output to the power control
36
NW-HD5
Pin No.
Pin Name
I/O
Description
72
PE3/RXD1
I
Data input terminal    Not used
73
PE4/SCK1
O
Serial clock signal output to the power control and real time clock
74
PE5/SO1
O
Serial data output to the power control and real time clock
75
PE6/SI1
I
Serial data input from the real time clock
76
PE7/SCS1
O
Chip enable signal output to the real time clock
77
XOUT/CKO
O
Clock signal (176 kHz) output to the multi interface
78
DVDD1
-
Power supply terminal (+1.2V) (for core)
79
DVSS3
-
Ground terminal
80
VDIO3
-
Power supply terminal (+1.9V) (for I/O interface)
81
PF0/EC0/INT3
I
Interrupt request signal input from the sub system controller
82
PF1/T1
O
Shut down signal output terminal    Not used
83
PF2/EC2/INT4
I
Interrupt request signal input from the multi interface
84
PF3/T3
O
Clock signal (176 kHz) output to the power control
85
PF4/BEEP
O
Beep signal output to the headphone amplifier
86
PG0/DACK0
I
Ready/busy selection signal input from the flash memory    "L": busy, "H": ready
87
PG1/DREQ0/INT5
I
Interrupt request signal input from the sub system controller
88
PG2/DACK1/INT6
I
Interrupt request signal input from the multi interface
89
PG3/DREQ1/INT7
I
Interrupt request signal input from the multi interface
90 to 93
TEST2, TEST3,
TEST0, TEST1
I
Input terminal for the test mode setting
94
TACK
O
Bus response signal output terminal    Not used
95
EVA
I
EVA mode selection signal input terminal    Not used
96
AVSAD
-
Ground terminal (for A/D converter)
97
AVDAD
-
Power supply terminal (+2.4V) (for A/D converter)
98
AN0
I
Battery voltage monitor input terminal (A/D input)
99
AN1
I
Not used
100
AN2
I
Acceleration detection signal of X shaft direction input from the acceleration sensor
101
AN3
I
Acceleration detection signal of Y shaft direction input from the acceleration sensor
102
AN4
I
Acceleration detection signal of Z shaft direction input from the acceleration sensor
103, 104
AN5, AN6/INT8
I
Set key input terminal (A/D input)
105
AN7/INT9
I
Remote commander key input terminal (A/D input)
106
RST
I
Reset signal input from the power control
107
RAMBK
I
RAM back up control signal input terminal    Not used
108
VDBK
-
Power supply terminal (+1.2V) (for RAM back up)
109
TDI
I
Data input terminal (for JTAG)    Not used
110
TMS
I
Test mode control signal input terminal (for JTAG)    Not used
111
TCK
I
Clock signal input terminal (for JTAG)    Not used
112
TRST
I
Reset signal input terminal (for JTAG)    Not used
113
TDO
O
Data output terminal (for JTAG)    Not used
114
VDIOJT
-
Power supply terminal (+1.9V) (for JTAG)
115
DVDD2
-
Power supply terminal (+1.2V) (for core)
116
DVSS4
-
Ground terminal
117
VDIO4
-
Power supply terminal (+1.9V) (for I/O interface)
118
PD0/CONNECT
I
Battery in detect switch input terminal
119
PD1/XVDATA
O
Test terminal for debug    Not used
Page of 51
Display

Click on the first or last page to see other NW-HD5 service manuals if exist.