Sony MDS-JB920 Service Manual ▷ View online
– 37 –
Pin No.
Pin Name
I/O
Function
40
AVDDL
—
Power supply terminal (+5V) (for L-ch side D/A converter section, analog system)
Not used (open)
Not used (open)
41
L1
O
L-ch PLM signal 1 output terminal Not used (open)
42
VDD2
—
Power supply terminal (+5V) (for L-ch side D/A converter section, digital system)
Not used (open)
Not used (open)
43, 44
VDD1
—
Power supply terminal (+5V) (for A/D converter section, digital system)
45
VSS1
—
Ground terminal (for A/D converter section, digital system)
46
TEST2
I
Input terminal for the test (fixed at “L”)
47
TEST3
I
Input terminal for the test (fixed at “L”)
48
VSS1
—
Ground terminal (for A/D converter section, digital system)
49
NU
—
Not used (open)
50
NU
—
Not used (open)
51
AVSS
—
Ground terminal (for A/D converter section, analog system)
52
LVDD
—
Power supply terminal (+5V) (for A/D converter section, buffer system)
53
LVSS
—
Ground terminal (for A/D converter section, buffer system)
54
REFO
O
Reference voltage (+3.3V) output terminal (for A/D converter section)
55
INLM
I
L-ch analog signal (+) input terminal
56
INLP
I
L-ch analog signal (–) input terminal
– 38 –
•
MAIN BOARD IC800 M30610MCA-264FP (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Function
1
JOG1
I
JOG dial pulse input from the rotary encoder (S713
≠ AMS ±)
2
JOG0
I
JOG dial pulse input from the rotary encoder (S713
≠ AMS ±)
3
C1
O
Monitor output terminal for the test C1 error rate is output when test mode
4
ADER
O
Monitor output terminal for the test ADER is output when test mode
5
SQSY
I
Subcode Q sync (SCOR) input from the CXD2654R (IC121)
“L” is input every 13.3 msec Almost all, “H” is input
“L” is input every 13.3 msec Almost all, “H” is input
6
RMC
I
Remote control signal input from the remote control receiver (IC761)
7
AIN1
I
Sircs remote control signal input of the S-LINK CONTROL A1
8
BYTE
I
External data bus line byte selection signal input “L”: 16 bit, “H”: 8 bit (fixed at “L”)
9
CNVSS
—
Ground terminal
10
XT-IN
I
Sub system clock input terminal (32.768 kHz)
11
XT-OUT
O
Sub system clock output terminal (32.768 kHz)
12
S.RST
I
System reset signal input from the LA5632 (IC700) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
13
XOUT
O
Main system clock output terminal (7 MHz)
14
GND
—
Ground terminal
15
XIN
I
Main system clock input terminal (7 MHz)
16
+3.3V
—
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt input terminal (fixed at “H” in this set)
18
DQSY
I
Digital In U-bit CD format subcode Q sync (SCOR) input from the CXD2654R (IC121)
“L” is input every 13.3 msec Almost all, “H” is input
“L” is input every 13.3 msec Almost all, “H” is input
19
P.DOWN
I
Power down detection signal input terminal “L”: power down, normally: “H”
20
XINT
I
Interrupt status input from the CXD2654R (IC121)
21
DVOL1
I
Digital rec level volume input terminal
22
DVOL0
I
Digital rec level volume input terminal
23 to 30
NC
I
Not used (fixed at “L”)
31
SWDT
O
Writing data output to the CXD2654R (IC121) and D/A converter (IC200)
32
SRDT
I
Reading data input from the CXD2654R (IC121)
33
SCLK
O
Serial clock signal output to the CXD2654R (IC121) and D/A converter (IC200)
34
FLCS
O
Chip select signal output to the FL/LED driver (IC771)
35
FLDATA
O
Serial data output to the FL/LED driver (IC771)
36
NC
I
Not used (fixed at “L”)
37
FLCLK
O
Serial data transfer clock signal output to the FL/LED driver (IC771)
38 to 47
NC
I
Not used (fixed at “L”)
48
CSET0
I
Destination setting terminal (US, Canadian models: fixed at “L”, AEP, UK models: fixed at “H”)
49
CSET1
I
Destination setting terminal (US, Canadian models: fixed at “H”, AEP, UK models: fixed at “L”)
50
XINSW
I
Setting terminal of the loading control system select (fixed at “H” in this set)
51
NC
I
Not used (fixed at “L”)
52
MNT2 (XBUSY)
I
Busy signal input from the CXD2654R (IC121)
53
DIG-RST
O
Reset signal output to the CXD2654R (IC121) and BH6511FS (IC152) “L”: reset
54
MNT1 (SHOCK)
I
Track jump detection signal input from the CXD2654R (IC121)
55
SENS
I
Internal status (SENSE) input from the CXD2654R (IC121)
56
LDON
O
Laser diode on/off control signal output to the automatic power control circuit “H”: laser on
57
REFLECT
I
Detection input from the disc reflection rate detect switch (S102)
“L”: high reflection rate disc, “H”: low reflection rate disc
“L”: high reflection rate disc, “H”: low reflection rate disc
58
PROTECT
I
Rec-proof claw detect input from the protect detect switch (S102) “H”: write protect
MDS-JB920
– 39 –
– 40 –
Pin No.
Pin Name
I/O
Function
59
WR-PWR
O
Laser power select signal output to the CXD2654R (IC121) and HF module switch circuit
“H”: recording mode, “L”: playback mode
“H”: recording mode, “L”: playback mode
60
MNT3 (SLOCK)
I
Spindle servo lock status monitor signal input from the CXD2654R (IC121)
61
SDA
I/O
Two-way data bus with the EEPROM (IC171)
62
+3.3V
—
Power supply terminal (+3.3V)
63
NC
I
Not used (fixed at “L”)
64
GND
—
Ground terminal
65
SCTX
O
Recording data output enable signal output to the CXD2654R (IC121) and overwrite head
driver (IC181) Writing data transmission timing output (Also serves as the magnetic head on/off
output)
driver (IC181) Writing data transmission timing output (Also serves as the magnetic head on/off
output)
66
SCL
O
Clock signal output to the EEPROM (IC171)
67
MNT0 (FOK)
I
Focus OK signal input from the CXD2654R (IC121)
“H” is input when focus is on (“L”: NG)
“H” is input when focus is on (“L”: NG)
68
LIMIT-IN
I
Detection input from the sled limit-in detect switch (S101)
The optical pick-up is inner position when “L”
The optical pick-up is inner position when “L”
Laser modulation select signal output to the HF module switch circuit
Playback power: “H”, Stop: “L”,
Recording power:
69
MOD
O
70
XLATCH
O
Serial data latch pulse signal output to the CXD2654R (IC121)
71
NC
I
Not used (fixed at “L”)
72
REC/PB
I
Not used (fixed at “L”)
73
PACK-IN
I
Detection input from the disc detect switch Not used (fixed at “L”)
74
PB-P
I
Detection input from the playback position detect switch (S604) “L” active
75
CHACK IN
I
Detection input from the disc chucking-in detect switch (S603) “L”: chucking
76
PACK-OUT
I
Detection input from the loading-out detect switch (S602)
“L” at a load-out position, others: “H”
“L” at a load-out position, others: “H”
77
REC-P
I
Detection input from the recording position detect switch (S601) “L” active
78
LDIN
O
Motor control signal output to the loading motor driver (IC400) “L” active *1
79
LDOUT
O
Motor control signal output to the loading motor driver (IC400) “L” active *1
80
LD-LOW
O
Loading motor drive voltage control signal output for the loading motor driver (IC400)
“H” active
“H” active
81
NC
I
Not used (fixed at “L”)
82
A1OUT
O
Sircs remote control signal output of the S-LINK CONTROL A1
83
MUTE
O
Audio line muting on/off control signal output terminal “L”: line muting on
84
STB
O
Strobe signal output to the power supply circuit “H”: power on, “L”: standby mode
2 sec
0.5 sec
Pin No.
Pin Name
I/O
Function
85
COAX/XOPT
O
Optical in 1/2 or coaxial in selection signal output to the digital input selector (IC300)
“L”: OPT 1/2, “H”: COAXIAL
“L”: OPT 1/2, “H”: COAXIAL
86
OPT2/XOPT1
O
Optical in 1 or optical in 2 selection signal output to the digital input selector (IC300)
“L”: OPT 1, “H”: OPT 2
“L”: OPT 1, “H”: OPT 2
87
DALATCH
O
Serial data latch pulse signal output to the D/A converter (IC200)
88
DARST
O
Reset signal output to the A/D converter (IC100) and D/A converter (IC200) “L”: reset
89
LED0
O
LED drive signal output terminal Not used (pull down)
90
LED1
O
LED drive signal output terminal Not used (pull down)
91
TIMER
I
TIMER switch (S751) input terminal (A/D input)
“L”: PLAY, “H”: REC (OFF: center voltage)
“L”: PLAY, “H”: REC (OFF: center voltage)
92
SOURCE
I
INPUT switch (S741) input terminal (A/D input)
93
KEY3
I
Key input terminal (A/D input) S731 to S734 (TIME, FADER, MUSIC SYNC, MEGA
CONTROL keys input)
CONTROL keys input)
94
KEY2
I
Key input terminal (A/D input) S722 to S726 (PLAY/MODE, REPEAT, SCROLL/CLOCK
SET, DISPLAY/CHAR, I/
SET, DISPLAY/CHAR, I/
u keys input)
95
KEY1
I
Key input terminal (A/D input) S711 to S714 and S716 (MENU/NO, YES, PUSH ENTER,
§
EJECT keys input)
96
AVSS
—
Ground terminal
97
KEY0
I
Key input terminal (A/D input) S701 to S706 (
r REC, p, ), 0, P, · keys input)
98
VREF
I
Reference voltage (+3.3V) input terminal (for A/D converter)
99
+3.3V
—
Power supply terminal (+3.3V) (for analog system )
100
MONO/ST
I
REC MODE switch (S746) input terminal “L”: MONO, “H”: STEREO
*1 Loading motor (M103) control
Mode
Terminal
LDIN (pin &•)
“L”
“H”
“L”
“H”
LDOUT (pin &ª)
“H”
“L”
“L”
“H”
LOADING
EJECT
BRAKE
RUN IDLE
MDS-JB920
– 41 –
– 42 –
6-2.
BLOCK DIAGRAM – SERVO Section –
F
C
B
D
A
E
I
J
J
I
B
A
C
D
D
E
F
DETECTOR
1
2
J
I
4
5
6
7
A
B
C
D
D
8
9
E
F
LD
PD
LASER DIODE
ILCC
PD
OPTICAL PICK-UP
(KMS-260A/J1N)
AUTOMATIC
POWER
CONTROL
Q162, 163
LASER ON
SWITCH
Q101
OVER WRITE
HEAD DRIVE
IC181, Q181, 182
HF MODULE
SWITCH
IC103, Q102 – 104
11
10
APC
PD
LD/PD
AMP
APCREF
I-V
AMP
I-V
AMP
AT
AMP
B.P.F.
29
30
WBL
ADFM
ADIN
32
ADFG
ABCD
AMP
FOCUS
ERROR AMP
TRACKING
ERROR AMP
35
34
26
28
ABCD
FE
TE
SE
V-I
CONVERTER
20
F0CNT
WBL
3T
EQ
SERIAL/
PARALLEL
CONVERTER,
DECODER
COMMAND
17
16
18
SWDT
SCLK
XLAT
RF AMP
B.P.F.
46
RFO
40
RF AGC
& EQ
AGCI
EQ
38
RF
RF AMP,
FOCUS/TRACKING ERROR AMP
IC101
TEMP
48 47
MORFO
MORFI
3T
PEAK &
BOTTOM
WBL
33
AUX
63
37
PEAK
36
BOTM
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
IC152
6
8
OUT4F
OUT4R
M
M101
(SPINDLE)
27
25
OUT2F
OUT2R
M
M102
(SLED)
21
23
OUT1F
OUT1R
12
10
OUT3F
OUT3R
FCS+
FCS–
TRK+
TRK–
2-AXIS
DEVICE
(TRACKING)
(FOCUS)
3
4
IN4R
IN4F
29
30
IN2F
IN2R
19
18
IN1F
IN1R
14
15
IN3F
IN3R
MOD
SPFD
SPRD
92
91
88
89
86
85
APCREF
SFDR
SRDR
FFDR
FRDR
TFDR
TRDR
16
PSB
PWM GENERATOR
AUTOMATIC
POWER
CONTROL
DIGITAL
SERVO
SIGNAL
PROCESS
75
66
65
67
ANALOG MUX
A/D CONVERTER
AUTO
SEQUENCER
FROM CPU
INTERFACE
DIGITAL SERVO
SIGNAL PROCESSOR
IC121 (2/2)
RECP
AUX1
ABCD
FE
TE
SE
PEAK
BOTM
81
80
82
XLRF
CKRF
DTRF
XLAT
SCLK
SWDT
PLL
FILTER
60
59
62
61
FILI
PCO
CLTV
FILO
100
EFMO
25
ADDT
22
DATAI
512FS
OSC
IC123
IC121 (1/2)
15
TX
53
54
57
ASYO
ASYI
RFI
SCTX
HR901
OVER WRITE HEAD
ADIP
DEMODULATOR/
DECODER
78
ADFG
SPINDLE
SERVO
F0CNT
94 93
SPFD
SPRD
SUBCODE
PROCESSOR
SAMPLING
RATE
CONVERTER
DIGITAL
AUDIO
INTERFACE
DIN0
DOUT
DIGITAL SIGNAL PROCESSOR,
EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER
IC121 (1/2)
DADT
INTERNAL BUS
CLOCK
GENERATOR
XBCK
LRCK
FS256
OSCI
OSCO
CPU
INTERFACE
MONITOR
CONTROL
CONTROL
10
XRST
12
DQSY
11
SQSY
14
XINT
9 8
5 6 7
SENS
SRDT
SWDT
SCLK
XLAT
1
2
3
4
MNT0
MNT1
MNT2
MNT3
FOK
SHOCK
XBUSY
SLOCK
SWDT
SCLK
SWDT
SCLK
XLATCH
53
31 33 70
67 54 52 60
MNT0 (FOK)
MNT1 (SHOCK)
MNT2 (XBUSY)
MNT3 (SLOCK)
DIG-RST
SQSY
DQSY
LDON
WR-PWR
MOD
XINT
SENS
SRDT
78
79
LDIN
LDOUT
5
6
05
2
10
4
M
IN1
IN2
OUT1 OUT2
VZ
LOADING
MOTOR DRIVE
IC400
REFERENCE
VOLTAGE SWITCH
Q400, 401
M103
(LOADING)
49, 48, 50, 51
1, 2, 18, 19
DQ1 – DQ4
34 – 31, 36 – 40, 45
6 – 9, 11 – 15, 5
A0 – A9
D0 – D3
A00 – A09
43
16
47
3
46
4
44
17
XOE
XWE
XRAS
XCAS
XOE
XWE
XRAS
XCAS
D-RAM
IC124
DIN1
SYSTEM CONTROLLER
IC800 (1/2)
74
13
64
69
79
83
12
HF MODULE
16
17
ADDT
DADT, BCK, LRCK
A
(Page 43)
DIGITAL IN
B
(Page 44)
D
512FS
(Page 43)
(Page 43)
SWDT, SCLK
F
(Page 43)
DIGITAL OUT
C
(Page 44)
E
5 20 55 32
18
56
59
SCTX 65
REFLECT
CHACK IN
PROTECT
75
LD-LOW
B+
80
S102
(REFLECT/PROTECT DETECT)
68
77
LIMIT-IN
REC-P
S101
(LIMIT IN)
76
PACK-OUT
•
SIGNAL PATH
: PLAY (ANALOG OUT)
: PLAY (DIGITAL OUT)
: PLAY (DIGITAL OUT)
: REC (ANALOG IN)
: REC (DIGITAL IN)
COMPA-
RATOR
EFM/ACIRC
ENCODER/DECODER
SHOCK PROOF
MEMORY CONTROLLER
ATRAC
ENCODER/DECODER
26
S601
(REC POSITION)
S602
(PACK OUT)
S603
(CHUCKING IN)
PB-P 74
S604
(PLAY POSITION)
28
21
20
19
29
27
24
XBCKI
23
LRCKI
58
57
HIGH REFELECT RATE/
WRITE PROTECT
LOW REFELECT RATE/
UN-PROTECT
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