DOWNLOAD Sony MDS-DRE1 Service Manual ↓ Size: 6.56 MB | Pages: 79 in PDF or view online for FREE

– 80 –

Pin No.

Pin Name

I/O

Function

77

TE

I (A)

Tracking error signal input from the CXA1981AR (IC101)

78

AUX2

I (A)

Auxiliary signal input terminal    Not used (fixed at “L”)

79

DCHG

I (A)

Connected to the ground

80

APC

I (A)

Error signal input for the laser automatic power control    Not used (fixed at “L”)

81

TEST1

I

Input terminal for the test (fixed at “L”)

82

ADFG

I

ADIP duplex FM signal (22.05 kHz 

±

 1 kHz) input from the CXA1981AR (IC101)

(TTL schmidt input)

83

TS25

I

Input terminal for the test (fixed at “L”)

84

LDDR

O

Laser automatic power control signal output to the CXA1981AR (IC101)

85

TRDR

O

Tracking servo drive PWM signal (–) output to the MPC17A38VMEL (IC151)

86

TFDR

O

Tracking servo drive PWM signal (+) output to the MPC17A38VMEL (IC151)

87

FFDR

O

Focus servo drive PWM signal (+) output to the MPC17A38VMEL (IC151)

88

DVDD1

—

Power supply terminal (+5V) (digital system)

89

FRDR

O

Focus servo drive PWM signal (–) output to the MPC17A38VMEL (IC151)

90

FS4

O

Clock signal (176.4 kHz) output to the MPC17A38VMEL (IC151) (MCLK system)

91

SRDR

O

Sled servo drive PWM signal (–) output to the MPC17A38VMEL (IC151)

92

SFDR

O

Sled servo drive PWM signal (+) output to the MPC17A38VMEL (IC151)

93

SPRD

O

Spindle servo drive PWM signal (–) output to the MPC17A38VMEL (IC151)

94

SPFD

O

Spindle servo drive PWM signal (+) output to the MPC17A38VMEL (IC151)

95

DCLO

O

Not used (open)

96

DCLI

I

Not used (fixed at “H”)

97

XDCL

O

Not used (open)

98

OFTRK

O

Spindle motor FG detection signal output to the system controller (IC101)

99

COUT

O

Traverse count signal output terminal    Not used (open)

100

DVSS2

—

Ground terminal (digital system)

* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.

– 81 –

•

Pin No.

Pin Name

I/O

Function

1

FSW0

I

Foot switch (PLAY/PAUSE) input terminal

2

FSW1

I

Foot switch (REC/PAUSE) input terminal

3, 4

—

O

Not used (open)

5

—

I

Not used (fixed at “H”)

6

REM-CON

I

Not used (fixed at “H”)

7

—

I

Not used (fixed at “H”)

8

BYTE

I

External data bus line byte selection signal input    “L”: 16 bit, “H”: 8 bit (fixed at “L”)

9

CNVSS

—

Ground terminal

10

XCIN

I

Sub system clock input terminal (32.768 kHz)    Not used (fixed at “H”)

11

XCOUT

O

Sub system clock output terminal (32.768 kHz)    Not used (pull up)

12

RESET

I

System reset signal input terminal    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

13

XOUT

O

Main system clock output terminal (10 MHz)

14

VSS

—

Ground terminal

15

XIN

I

Main system clock input terminal (10 MHz)

16

VCC

—

Power supply terminal (+5V)

17

NMI

I

Non-maskable interrupt input terminal (fixed at “H” in this set)

18

—

O

Not used (open)

19

—

I

Not used (fixed at “H”)

20

DTCS

I

Chip select signal input from the system controller (IC101)

21

JOG3

I

Not used (fixed at “H”)

22

JOG2

I

Not used (fixed at “H”)

23

JOG1

I

Jog dial detect sensor (PH382 side) input terminal

24

JOG0

I

Jog dial detect sensor (PH381 side) input terminal

25

JOGA

I

Jog dial pulse input from the rotary encoder (S305  

≠ AMS ±) (A phase input)

26

JOGB

I

Jog dial pulse input from the rotary encoder (S305  

≠ AMS ±) (B phase input)

27

—

I

Not used (fixed at “H”)

28

LED-R.PAUSE

O

LED drive signal output of the REC PAUSE LED (D371)    “L”: LED on

29

LED-CUE

O

LED drive signal output of the CUE LED (D361 to 363)    “L”: LED on

30

LED-PP

O

LED drive signal output of the PLAY/PAUSE LED (D364 to 366)    “L”: LED on

31

SWDT

O

Serial data output to the fluorescent indicator tube driver (IC101)

32

SRDT

I

Not used (fixed at “H”)

33

SCLK

O

Serial data transfer clock signal output to the fluorescent indicator tube driver (IC101)

34

FLCS

O

Chip select signal output to the fluorescent indicator tube driver (IC101)

35

DTIN

O

Serial data output to the system controller (IC101)

36

DTOUT

I

Serial data input from the system controller (IC101)

37

DTCK

I

Serial data transfer clock signal input from the system controller (IC101)

38

RTS

O

RTS (request to send) output to the system controller (IC101)

39 to 45

—

I

Not used (fixed at “H”)

46

FL-RES

O

Reset signal output to the fluorescent indicator tube driver (IC101)    “L”: reset

47 to 61

—

I

Not used (fixed at “H”)

62

VCC

—

Power supply terminal (+5V)

63

—

I

Not used (fixed at “H”)

64

VSS

—

Ground terminal

65

LED1-G

O

66

LED1-O

O

LED drive signal output of the pad indicator    “L”: LED on

– 82 –

Pin No.

Pin Name

I/O

Function

67

LED2-G

O

68

LED2-O

O

69

LED3-G

O

70

LED3-O

O

71

LED4-G

O

72

LED4-O

O

73

LED5-G

O

74

LED5-O

O

75

LED6-G

O

76

LED6-O

O

77

LED7-G

O

78

LED7-O

O

79

LED8-G

O

80

LED8-O

O

81 to 86

—

I

Not used (fixed at “H”)

87

INPUT-SEL1

I

INPUT switch (S601) input terminal    “L”: optical input, “H”: analog/coaxial input

88

INPUT-SEL0

I

INPUT switch (S601) input terminal    “L”: analog input, “H”: optical/coaxial input

89

KEY0

I

Key input terminal (A/D input)    S301 to S306 (UNDO, BANK, ENTER/YES, EDIT/NO, PUSH
ENTER, PLAY MODE keys input)

90

KEY1

I

Key input terminal (A/D input)    S311 to S316 (REPEAT, SINGLE PLAY, DISPLAY,
RELOOP, LOOP IN, LOOP OUT keys input)

91

KEY2

I

Key input terminal (A/D input)    Key input from the pad unit (PAD1 to PAD4)

92

KEY3

I

Key input terminal (A/D input)    Key input from the pad unit (PAD5 to PAD8)

93

KEY6

I

Key input terminal (A/D input)
S361 to S365 (

0, ), CUE, PLAY/PAUSE, § EJECT keys input)

94

KEY7

I

Key input terminal (A/D input)
S371 to S376 (AUTO MODE CUE/PAUSE/OFF, 

r REC, REC PAUSE, STOP keys input)

95

SPEED-CONT

I

SPEED control volume input terminal (RV391)

96

AVSS

—

Ground terminal (for A/D converter)

97

KEY-CONT

I

PITCH control volume input terminal (RV392)

98

AVREF

I

Reference voltage (+5V) input terminal (for A/D converter)

99

AVCC

—

Power supply terminal (+5V) (for A/D converter)

100

—

I

Not used (fixed at “H”)

LED drive signal output of the pad indicator    “L”: LED on

– 83 –

•

Pin No.

Pin Name

I/O

Function

1, 2

TEST

O

Not used (pull up)

3, 4

TEST

I

Not used (fixed at “H”)

5

SQSY

I

Subcode Q sync (SCOR) input from the CXD2535CR (IC121)
“L” is input every 13.3 msec    Almost all, “H” is input

6

—

O

Not used (pull up)

7

PDOWN

I

Power down detection signal input terminal    “L”: power down, normally: “H”

8

BYTE

I

External data bus line byte selection signal input    “L”: 16 bit, “H”: 8 bit (fixed at “L”)

9

CNVSS

—

Ground terminal

10

XCIN

I

Sub system clock input terminal (32.768 kHz)    Not used (fixed at “H”)

11

XCOUT

O

Sub system clock output terminal (32.768 kHz)    Not used (pull up)

12

RESET

I

System reset signal input from the reset signal generator (IC451)    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

13

XOUT

O

Main system clock output terminal (10 MHz)

14

VSS

—

Ground terminal

15

XIN

I

Main system clock input terminal (10 MHz)

16

VCC

—

Power supply terminal (+5V)

17

NMI

I

Non-maskable interrupt input terminal (fixed at “H” in this set)

18

—

O

Not used (pull down)

19

DQSY

I

Digital In U-bit CD format subcode Q sync (SCOR) input from the digital audio interface receiver
(IC401)    “L” is input every 13.3 msec    Almost all, “H” is input

20

INT-CDSP

I

Not used (fixed at “L”)

21

F86-DEC

O

Not used (pull down)

22

—

O

Not used (pull down)

23

XINT-DEC

I

Interrupt status input from the ATRAC decoder (IC601)

24

XINT-ENC

I

Interrupt status input from the ATRAC encoder (IC501)

25

F86-ENC

O

Not used (pull down)

26 to 30

—

O

Not used (pull down)

31

SWDT

O

Writing data output to the CXA1981AR (IC101), CXD2535CR (IC121), digital audio interface
receiver (IC401), sampling rate converter (IC451, 751), ATRAC encoder (IC501), ATRAC
decoder (IC601) and CXD2720Q (IC801)

32

SRDT

I

Reading data input from the CXD2535CR (IC121), digital audio interface receiver (IC401),
ATRAC decoder (IC601) and CXD2720Q (IC801)

33

SCLK

O

Serial data transfer clock signal output to the CXA1981AR (IC101), CXD2535CR (IC121),
digital audio interface receiver (IC401), sampling rate converter (IC451, 751), ATRAC encoder
(IC501), ATRAC decoder (IC601) and CXD2720Q (IC801)

34

DTCS

O

Chip select signal output to the fluorescent indicator tube drive controller (IC201)

35

DTOUT

O

Serial data output to the fluorescent indicator tube drive controller (IC201)

36

DTIN

I

Serial data input from the fluorescent indicator tube drive controller (IC201)

37

DTCK

O

Serial data transfer clock signal output to the fluorescent indicator tube drive controller (IC201)

38

PMCU-RET

I

CTS (clear to send) input from the fluorescent indicator tube drive controller (IC201)

39

XLAT-DEC

O

Serial data latch pulse output to the CXA1981AR (IC101), CXD2535CR (IC121), digital audio
interface receiver (IC401), sampling rate converter (IC451, 751) and ATRAC decoder (IC601)

40

XLAT-ENC

O

Serial data latch pulse output to the ATRAC encoder (IC501)

41

RST-DSP

O

Reset signal output to the DSP (IC701)    “L”: reset

42

DEEMP-ADA

O

Emphasis control signal output to the A/D, D/A converter (IC301)

43

LAT-KEY

O

Serial data latch pulse output to the CXD2720Q (IC801)

44

XWO-KEY

O

XWO output to the CXD2720Q (IC801)