Sony MDS-B5 Service Manual ▷ View online
— 92 —
Test pin (Fixed at “L”)
Input of ADIP dual FM signal from CXA1981AR (IC101) (22.05 kHz ±1 kHz)
(TTL Schmidt input)
Test pin (Fixed at “L”)
Laser APC signal output
Tracking servo drive signal output (–)
Tracking servo drive signal output (+)
Focus servo drive signal output (+)
Power supply (+5V) (Digital)
Focus servo drive signal output (–)
176.4 kHz clock signal output (MCLK)
Sled servo drive signal output (–)
Sled servo drive signal output (+)
Spindle servo drive signal output (–)
Spindle servo drive signal output (+)
Not used
Not used (Fixed at “H”)
Not used
Off track signal output (Not used)
Traverse count signal output (Not used)
Ground (Digital)
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
TEST1
ADFG
TS25
LDDR
TRDR
TFDR
FFDR
DVDD
FRDR
FS4
SRDR
SFDR
SPRD
SPFD
DCLO
DCLI
XDCL
OFTRK
COUT
DVSS
I
I
I
O
O
O
O
–
O
O
O
O
O
O
O
I
O
O
O
–
Function
Pin No.
Pin Name
I/O
* (3) of I/O is 3-state output, (A) is analog output.
— 93 —
• IC301 System Control (M30600E8FP)
Function
Jog detection input from the CXD2535CR.
Focus OK input from the CXD2535CR.
C1 error test output
ADER, C2 error test output
SUBQ/ATIP sync input from the CXD2535CR.
Wired remote control input
Power down detection input
External data bus width switching input (Fixed to “L”.)
Processor mode switching input (Fixed to “L”.)
CXD2536CR recording data output timing and magnetic head control output
FG input from the spindle motor.
Reset input
Clock output (8.6 MHz)
Ground (0V)
Clock input (8.6 MHz)
Power supply (+5V)
NMI input (Fixed to “H”.)
IC for RS232C. Interrupt request input from the M66230FP.
Keyboard communication clock input
DIN SUBQ sync input from the digital-in receiver LC89051V (IC410).
Interrupt request input from the high-speed dubbing CXD2536CR (IC407).
Interrupt request input from the CXD2536CR (IC401).
Encode/decode mode switching output to the CXD2535CR.
Unlock detection input from the digital-in receiver LC89051V.
Not used.
Command latch output to the high-speed dubbing CXD2536CR (IC407).
Command latch output to CXD2536CR (IC401), CXD2535CR, LC89051V, CXD8517Q.
Command latch output to the audio D/A converter CXD8567AM.
Chip select output to the FL tube display driver.
Chip select output to the variable pitch controller LC72130M.
Serial bus write data output
Serial bus read data input
Serial bus clock output
RS232C DSR input
Write data output to the FL tube display driver and the variable pitch controller.
Read data input from the variable pitch controller.
Clock output to the FL tube display driver and the variable pitch controller.
Keyboard communication data input
External data bus ready input (Fixed to “H”.)
External data bus address latch enable output
SHCK
FOR
C1
ADER, C2
SQSY
SIRCS
PDOWN
BYTE
CNVSS
SCTX
FG
XREST
XOUT
GND
XIN
VCC
NMI
232XINT
KBCK
DQSY
XINT2
XINT1
REC
ERROR
––––
XLAT2
XLAT1
DALAT
FLCS
CE
SWDT
SRDT
SCLK
DSR
TXD
RXD
CLK
KBDATA
XRDY
ALE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
I
I
O
O
I
I
I
I
I
O
I
I
O
–
I
–
I
I
I
I
I
I
O
I
I
O
O
O
O
O
O
I
O
I
O
I
O
I
I
O
Function
Pin No.
Pin Name
I/O
— 94 —
I
O
O
O
O
O
O
O
O
O
O
–
O
–
O
I/O
I
I
I
O
I
I/O
I
I
O
External data bus hold input (Fixed to “H”.)
External data bus hold output
Internal clock output (4.3 MHz)
External data bus read request output
External data bus odd address write request output
External data bus even address write request output
Chip select output for the external data bus I/O expander M66500FP (IC304, 306)
Chip select output for the external data bus external SRAM (IC303, 312)
Chip select output for the external data bus flash memory AT29C1024 (IC302)
Chip select output for the external data bus RS232C M66230FP (IC313).
External data bus address output
Power supply (+5V)
External data bus address output
Ground (0V)
External data bus address output
External data bus address input/output
Key input
Jog input
SENS status input from the CXD2535CR.
Clock output for the non-volatile ROM.
Analog ground input for the A/D conversion circuit (0V).
Data input/output for the non-volatile ROM.
Reference voltage input for the A/D conversion circuit (+5V).
Analog power supply input for the A/D conversion circuit (+5V).
Laser light power request output for the CXD2535CR.
41
42
43
44
45
46
47
48
49
50
51 to 61
62
63
64
65 to 72
73 to 88
89 to 91
92, 93
94
95
96
97
98
99
100
XHOLD
XHLDA
BCLK
XRD
XWRH
XWRL
XCS3
XCS2
XCS1
XCS0
A19 to A9
VCC
A8
GND
A7 to A0
D15 to D0
KEY0 to KEEY2
JOG0, JOG1
SENS
SCL
AGND
SDA
VREF
AVCC
WRPWR
Pin No.
Pin Name
I/O
Function
— 95 —
• IC401 Shock-Proof Memory Controller, ATRAC Encoder/Decoder (CXD2536CR)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18 to 21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45 to 47
VDD
SWDT
SCK
XLAT
SRDT
SENSE
SCMD0
SCMD1
XINT
RCPB
WRMN
TX
VSS
SICK
IDSL
XILT
XRST
TS0 to TS3
EXIR
SASL
SNGLE
VSS
AIRCPB
XRQ
ADTO
ADTI
XALT
ACK
AC2
LCHST
EXE
MUTE
OSCO
OSCI
VSS
ATT
F86
DOUT
ADIN
ABCK
ALRCK
SA2 to SA0
Power supply (+5V)
Input of write data signal from system controller (IC301)
Input of serial clock signal from system controller (IC301)
Input of serial latch signal from system controller (IC301)
Output of read data signal to system controller (IC301)
Output of internal status (SENSE) to system controller (IC301)
Input of serial command control mode (Fixed at “H”)
Output of interrupt status to system controller (IC301)
Recording/playback switching input (Fixed at “L”)
Input of write/monitor mode switching signal (Fixed at “L”)
Input of write data transmission timing from system controller (IC301)
Also used as magnetic field head ON/OFF output
Ground
Chip reservation (Fixed at “L”)
Chip reservation (Fixed at “H”)
Input of reset signal from Q402. Reset: “L”
Test pin (Fixed at “L”)
Chip reservation (Fixed at “L”)
Block selection in single use. “L”: ATRAC. “H”: RAM controller (Fixed at “L”)
Normally fixed at “L. Fixed at “H” when used as ATRAC or RAM controller for single
(Fixed at “L”)
Ground
Output of ATRAC and external audio block recording/playback mode signal (Not used)
ATRAC I/F XRQ signal input/output (Not used)
ATRAC decode data signal input/output (Not used)
ATRAC encode data signal input/output (Not used)
ATRAC I/F XALT signal input/output (Not used)
ATRAC I/F ACK signal input/output (Not used)
ATRAC I/F error data signal input/output (Not used)
ATRAC I/F Lch start data signal input/output (Not used)
ATRAC I/F EXE signal input/output (Not used)
ATRAC I/F MUTE signal input/output (Not used)
Clock output (1024fs) (Not used)
Clock input from vari-pitch circuit (1024fs)
Ground
ATRAC I/F ATT signal input/output (Not used)
ATRAC block 11.6 msec timing signal output (Not used)
Output of monitor/decode audio data signal to D/A converter (IC503)
Input of recording signal from A/D converter (IC501)
Output of bit clock signal to A/D and D/A converters (IC501, 503)
Output of L/R clock to A/D and D/A converters (IC501, 503)
Address signal output (Not used)
Function
I/O
Pin No.
Pin Name
—
I
I
I
O/Z
O/Z
I
I
O
I
I
I
—
I
I
I
I
I
I
I
I
—
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
—
I/O
O
O
I
O
O
O
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