Sony ICF-CD555TV Service Manual ▷ View online
45
ICF-CD555TV
IC2
LC72137M-TLM-E
11
10
9
8
7
6
5
4
3
2
1
12
13
14
15
16
19
20
UNLOCK
DETECTOR
POWER ON
RESET
UNIVERSAL
COUNTER
CCB
I/F
CE
DI
CL
DO
XOUT
AOUT
XIN
AIN
PD
VSS
VDD
B04
FMIN
AMIN
B01
B02
B03
I01
I02
IFIN
PHASE
DETECTOR
CHARGE
PUMP
REFERENCE
DIVIDER
SWALLOW
COUNTER
1/16,1/17
4BITS
12BITS
PROGRAMMABLE
DIVIDER
DATA SHIFT REGISTER
LATCH
1/2
17
18
– MAIN Board –
IC302
BD3870FS-E2
46
ICF-CD555TV
IC304
BU4053BCF-E2
IC305
BA6208
1
2
3
4
5
6
7
8
9
NC
OUTPUT 2
Vcc
GND
NC
INPUT 2
INPUT 1
NC
MOTOR
DRIVE
MOTOR
DRIVE
REG
SWITCH
SWITCH
OUTPUT1
1
2
3
4
5
6
7
8
B1
B0
C.COM
CO
INH
VEE
VSS
VDD
B.COM
A.COM
A1
A0
A
B
C
C1
9
10
11
12
13
14
15
16
OPEN
OPEN
OPEN
– TV Board –
IC1501
AN2546FH-AV
LOGIC
VCOM
PWM
+
–
–
SCP OUT
33
VDB IN
35
HSS
34
LOGIC
PRGB
38
VSS
37
GND
41
EXT POL
36
LOGIC
LDET
39
VCO
L/N
HHKILL
HFO
43
REGULATOR
VDD
40
AFC DET
42
VCC1
44
SYNC
SEPARATOR
VERTICAL
COUNT
V SYNC
DROP
PHASE
COMP
HSS-IN
46
NAVI SYNC-IN
45
IIC BUS
SCLK
47
DAT
48
VXO3
1
R-Y IN
4
B-Y IN
5
R-Y OUT
2
B-Y OUT
3
VCC1
6
VREF
7
R-IN 1
8
G-IN 1
9
B-IN 1
10
ACC DET 56
C-IN 57
VXO1 63
VXO2 64
HD
32
VD
31
PWM
30
VCC3
29
COMMON OUT
28
R-CH AVE DET
27
R-OUT
26
VCC2
25
AVE
24
GND1
23
G-CH AVE DET
22
G-OUT
21
B-CH AVE DET
20
B-OUT
19
BLAK
18
YS
17
VXO
ACC
AMP
VXO
GENERATOR
G-Y
GENERATOR
R-Y, B-Y DEMODULATOR
APC
BPF
ACC DET
TINT
REGULATOR
KILLER
DELAY
+
–
+
–
–
+
–
+
–
+
–
–
SWITCH
DAC
DAC
GCA
SHARPNESS
SYNC
CUT
SCP-OUT 62
APC DET 61
YUV
SWITCH
GCA
MATRIX
INTERNAL/
EXTERNAL
SWITCH
CLAMP
CLAMP
OSD SWITCH
BRIGHT
CONTRAST
GAMMA
INVERT
LIMIT
Y DET 55
KILL DET 60
GND3 59
VCC1 58
R-CH DET
11
G-CH DET
12
B-CH DET
13
R-IN 2
14
G-IN 2
15
B-IN 2
16
COM DC 50
LOGIC
RST 49
DAC-OUT 51
Y-IN 52
TRAP-OUT 53
F DET
47
ICF-CD555TV
– AMP Board –
IC301
BA5417
STANDBY
T.S.D.
BS
FILTER
PRE GND2
PRE GND1
NF2
IN2
IN1
NF1
FIL
TER
STBY
POWER GND
BS1
OUT1
VCC
OUT2
10
3 4 5
6
BS
BS2
2
NC
1
8
9
7
11 12
13
14 15
+
–
–
+
–
–
IC1551
µPD6467GR-546-E1
6
11 BLK1
OUTPUT CONTROLLER
WRITE
ADDRESS
COUNTER
COUNTER
HORIZONTAL
ADDRESS
COUNTER
COUNTER
CHARACTER
SIZE
REGISTER
HORIZONTAL
SIZE
COUNTER
HORIZONTAL
POSITION
COUNTER
COUNTER
HORIZONTAL
ADDRESS
REGISTER
SYNC
GUARD
INSTRUCTION
DECODER
DATA INPUT
SHIFT
REGISTER
DISPLAY CONTROL
DATA REGISTER
BACK GROUND CONTROL
DATA REGISTER
CHARACTER GENERATOR ROM
12 x 18bit x 512 word
COLOR DATA
3bit x 336word
CHARACTER DATA
9bit x 336 word
VIDEO RAM
BLINK DATA
1bit x 336 word
REVERSE DATA
1bit x 336 word
OUTPUT INSTRUCTION
DATA
1bit x 336 word
DATA
SELECTOR
5
4
3
2
CS
1
CLK
DATA
PCL
VDD
CMDCT
CONTROL SIGNAL
OSCILLATOR
VERTICAL
ADDRESS
ADDRESS
REGISTER
VERTICAL
POSITION
COUNTER
POSITION
COUNTER
VERTICAL
ADDRESS
COUNTER
ADDRESS
COUNTER
VERTICAL
SIZE
COUNTER
10
9
TEST
GND
8
7
OSCOUT
OSCIN
12 VC1
13 BLK2
14 VC2
15 VBLK
16 VR
17 VG
18 VB
19 HSYNC
20 VSYNC
48
ICF-CD555TV
•
IC Pin Function Description
MAIN BOARD IC401
µ
PD789478GC-A31-8BT (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1, 2
NC
—
Not used
3 to 5
VLC2 to VLC0
—
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
6 to 9
COM0 to COM3
O
Common drive signal output to the liquid crystal display
10 to 31
SEG0 to SEG21
O
Segment drive signal output to the liquid crystal display
32
TV POWER ON
O
Power on/off control signal output for the TV section “H”: power on
33
TV DATA SO
O
Serial data output to the TV system controller
34
TV DATA SCK
O
Serial data transfer clock signal output to the TV system controller
35
TV DATA SI
I
Serial data input from the TV system controller
36
RESET
O
System reset signal output to the TV system controller “L”: reset
37
NC
—
Not used
38
AVDD
—
Power supply terminal (+3.3V) (for A/D converter)
39
FSEQ
I
Synchronizing signal detection signal input from the digital signal processor
40, 41
ENCODE+,
ENCODE–
I
Jog dial pulse input from the rotary encoder
42
CD CLOSE DET
I
CD tray close detect switch input terminal “L”: CD tray is closed
43 to 46
KEY3 to KEY0
I
Front and side panel key input terminal (A/D input)
47
AVSS
—
Ground terminal (for A/D converter)
48
RC
I
SIRCS signal input from the remote control receiver
49
AC IN
I
Power failure detection signal input terminal
50
WRQ
I
Interruption detection signal input from the digital signal processor “L” active
51
CD CLOSE
O
CD tray open/close motor drive signal (close direction) output terminal “H” active
52
BUZZER
I
Beep sound drive signal output terminal
53
CD DATA IN
I
Serial data input from the digital signal processor
54
CD DATA
O
Serial data output to the digital signal processor
55
CD CLK
O
Serial data transfer clock signal output to the digital signal processor
56
CD CE
O
Chip enable signal output to the digital signal processor
57
DRF
I
Focus on/off detection signal input from the digital signal processor
58
XRST
O
Reset signal output to the digital signal processor “L”: reset
59
POWER ON
O
Power amplifier on/off control signal output terminal “L”: power amplifier on, “H”: standby
60
CD OPEN
O
CD tray open/close motor drive signal (open direction) output terminal “H” active
61
CD OPEN DET
I
CD tray open detect switch input terminal “L”: CD tray is closed
62
MUTE
O
Muting on/off control signal output terminal Not used
63
COUNT
I
PLL serial count data input from the FM/AM PLL
64
RADIO CE
O
PLL chip enable signal output to the FM/AM PLL
65
RADIO DATA
O
PLL serial data output to the FM/AM PLL
66
RADIO CLK
O
PLL serial data transfer clock signal output to the FM/AM PLL
67
VOL CLK
O
Serial data transfer clock signal output to the electrical volume
68
VOL DAT
O
Serial data output to the electrical volume
69
IC0
—
Not used
70
XT1
I
Sub system clock input terminal (32.768 kHz)
71
XT2
O
Sub system clock output terminal (32.768 kHz)
72
VDD
—
Power supply terminal (+3.3V)
73
VSS
—
Ground terminal
74
X1
I
Main system clock input terminal (4.19 MHz)
75
X2
O
Main system clock output terminal (4.19 MHz)
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