Sony ICD-SX46 / ICD-SX56 / ICD-SX66 Service Manual ▷ View online
25
25
ICD-SX46/SX56/SX66
ICD-SX46/SX56/SX66
4-13. SCHEMATIC DIAGRAM – SW BOARD –
S906
VOICE UP
ON–OFF
S907
S908
R903
R902
R901
S904
REC/REC PAUSE
S903
STOP
S902
S901
VOL–
VOL+
R907
R908
R909
R905
R904
CN7006
S905
MENU
FOLDER
ET7001
C902
C901
4.7k
0.5%
3.3k
0.5%
2.2k
0.5%
1k 0.5%
22k
0.5%
33k
0.5%
22k
0.5%
33k
0.5%
11P
4700p
4700p
DIRECTNL
ON–OFF
ON–OFF
26
26
ICD-SX46/SX56/SX66
ICD-SX46/SX56/SX66
• IC Block Diagrams
– AUDIO Board –
IC3003 MM3111AWLE
1
BIAS
3
4
2
8
6
5
7
SHUTDOWN
BYPASS
+IN
-IN
VO2
GND
VDD
VO1
1/2
1/2
1/2
3-STATE
BUFFER
1
3
2
6
4
5
FOUT
VDD
XXT
VSS
XT
XCONT
RF
CG
CD
A
B
C
D
IC6003 NJU6366AF1 (TE1)
IC5003 XC9502B092AR
1
2
3
4
RAMP WAVE
GENERATOR1
RAMP WAVE
GENERATOR2
EXT1
VDD
FB1
PWM1
5
10
9
8
7
6
EN1
EXT2
GND
FB2
PWM2
EN2
EN1 TO
INTERNAL CIRCUIT
VREF1=0.9V
WITH SOFT START1,
EN1
VREF1=0.9V
WITH SOFT START2,
EN2
PWM/PFM
CONTROLLER1
PWM/PFM
CONTROLLER2
OSC
GENERATOR
EN2 TO
INTERNAL CIRCUIT
PWM
COMPARATOR1
PWM
COMPARATOR2
ERROR AMP1
ERROR AMP2
IC7001 BU2090FS-E2
1 2
3
5 6 7 8
10
16 15 14 13 12 11
CONTROL
CIRCUIT
12 BIT
SHIFT
REGISTER
12 BIT
STORAGE
REGISTER
VDD
HPMUTE
XLIGHT2
MONOMIC
XBATTEN
XDSPRST
XFLMPWR
9
XADAPDN
SPAMP
XSTMIC
XREDLED
XGRLED
4
XLIGHT1
CLK
DATA
VSS
OUTPUT
BUFFER
(OPEN DRAIN)
– MAIN Board –
IC7004 RX-4591CF
1
2
3
4
VDD
FOE
XIRQ
T1
5
10
9
8
7
6
FOUT
CE
CLK
DO
DI
CE
CLK
DO
DI
CE
CLK
DO
DI
GND
FOUT
CONTROLLER
DIVIDER
OSC
32.768kHz
INTERRUPTS
CONTROLLER
BUS
INTERFACE
CIRCUIT
CONTROL
REGISTER
AND
SYSTEM
CONTROLLER
TIMER
REGISTER
CLOCK
AND
CALENDAR
ARARM
REGISTER
CVDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
4
3
5
6
14
13
8-10
11
GND
D-
D+
VBUS
TRON
TEST
DACK1
DREQ1
TC1
INT1
IVDD
XOUT
XIN
CVDD
GND
A1
A2
A3
A4
A5
A6
D0
D1
D2
D3
D4
D5
D6
D7
D11
D10
D9
D8
IVDD
GND
D12
D13
D14
D15/A0
HWR/BYTE
INT0
RD
LWR
CS
RST
DREQ0
DACK0
I/O BLOCK
USB-IP
OSCILLATION
BUFFER
/48MHzPLL
VBUS
INPUT CIRCUIT
D+ PIN PULLUP
CIRCUIT
USB
TRANSCEIVER
TRANSFER
CONTROLLER
SERIAL
INTERFACE
ENGINE
(SIE)
INTERRUPT CONTROLLER
ENDPOINT
CONTROLLER
FIFO MEMORY CONTROLLER
FIFO MEMORY
BUS
INTERFACE
UNIT
(BIU)
IC8001 M66291GP-2
1
5
2
4
3
NC
VCC
IN
GND
OUT
IC6004 TC7S04FU(TE85R)
27
ICD-SX46/SX56/SX66
• IC Pin Function Description
AUDIO Board IC6001 uPD77213F1-101-DA2 (DSP)
Pin No.
Pin Name
I/O
Description
1 to 3
NC
—
Not used
4
EVDD
—
I/O power supply (3.1V)
5
XADACS
O
AD/DA chip select (Not used) (fixed at “L”)
6
ADACCLK
I/O
AD/DA clock (Not used) (fixed at “L”)
7
ADACDTI
I
AD/DA data input (Not used) (fixed at “L”)
8
ADACDTO
O
AD/DA data output (Not used) (fixed at “L”)
9
MICPWR
O
Microphone power supply control (Not used) (fixed at “L”)
10
GND
—
Ground terminal
11
XFMWP
O
Boot flash ROM write protect
12
XFMCS
O
Boot flash ROM chip select
13
MICSENSE
O
Micropone sensitivity select (Not used) (fixed at “L”)
14
GND
—
Ground terminal
15
NC
—
Not used
16
EVDD
—
I/O power supply (3.1 V)
17
HD1
I/O
Host data bus (Not used)
18
HD2
I/O
Host data bus (Not used)
19
HD0
I/O
Host data bus (Not used)
20
HD3
I/O
Host data bus (Not used)
21
HD5
I/O
Host data bus (Not used)
22
HD4
I/O
Host data bus (Not used)
23
GND
—
Ground terminal
24
IVDD
—
Core power supply (1.6 V)
25
HD7
I/O
Host data bus (Not used)
26
HD6
I/O
Host data bus (Not used)
27
GND
—
Ground terminal
28
EVDD
—
I/O power supply (3.1 V)
29
XHCS
I
Host chip select (Pull-up) (fixed at “H”)
30
HA1
I
Host data access 1 (Pull-down) (fixed at “L”)
31
XHWR
I
Host write (Pull-up) (fixed at “H”)
32
HA0
I
Host data access 0 (Pull-down) (fixed at “L”)
33
XHRD
I
Host read (Pull-up) (fixed at “H”)
34
TIMOUT
O
Not used
35
SO
O
Serial data output
36
XHWE
O
Host write enable (Not used)
37
XHRE
O
Host read enable (Not used)
38
GND
—
Ground terminal
39
EVDD
—
I/O power supply (3.1 V)
40
BCLK
I/O
Bit clock
41 to 44
NC
—
Not used
45
ADASI
I
ADA serial data input
46
MCLK
I
Master clock
47
LRCLK
I/O
Clock for L-ch and R-ch (H: L-ch, L: R-ch)
48
TSO
O
Time sharing serial data output
49
TSCK
I
Time sharing serial clock input
50
TSOEN
I
Time sharing serial output enable
51
GND
—
Ground terminal
52
TSI
I
Time sharing serial data input
28
ICD-SX46/SX56/SX66
Pin No.
Pin Name
I/O
Description
53
TSIAK
O
Time sharing serial input response (Not used)
54
TSORQ
O
Time sharing serial output request (Note used)
55
TSIEN
I
Time sharing serial input enable
56
EVDD
—
I/O power supply (3.1 V)
57
MA1
O
Memory address bus 1 (Not used)
58
MA0
O
Memory address bus 0 (Not used)
59
GND
—
Ground terminal
60
IVDD
—
Core power supply (1.6 V)
61
MA2
O
Memory address bus 2 (Not used)
62
MA4
O
Memory address bus 4 (Not used)
63
GND
—
Ground terminal
64
MA3
O
Memory address bus 3 (Not used)
65
MA7
O
Memory address bus 7 (Not used)
66
MA5
O
Memory address bus 5 (Not used)
67
MA8
O
Memory address bus 8 (Not used)
68
MA6
O
Memory address bus 6 (Not used)
69
MA9
O
Memory address bus 9 (Not used)
70
MA10
O
Memory address 10 (Not used)
71
GND
—
Ground terminal
72
EVDD
—
I/O power supply (3.1 V)
73
MA11
O
Memory address 11 (Not used)
74
MA12
O
Memory address 12 (Not used)
75
MA14
O
Memory address 14 (Not used)
76
MA13
O
Memory address 13 (Not used)
77
MA16
O
Memory address 16 (Not used)
78
MA15
O
Memory address 15 (Not used)
79
EVDD
—
I/O power supply (3.1 V)
80
MA17
O
Memory address 17 (Not used)
81 to 84
NC
—
Not used
85
EVDD
—
I/O power supply (3.1 V)
86
MA18
O
Memory address 18 (Not used)
87
MA19
O
Memory address 19 (Not used)
88
XMHOLDAK
O
Memory bus hold response (Not used)
89
XMRD
O
Memory read-out (Not used)
90
XMHOLDRQ
I
Memory bus hold request (Pull-up) (fixed at “H”)
91
GND
—
Ground terminal
92
EVDD
—
I/O power supply (3.1 V)
93
XMWAIT
I
Memory access weight (Pull-up)
94
XMWR
O
Memory write (Not used)
95
GND
—
Ground terminal
96
IVDD
—
Core power supply (1.6 V)
97
XMBSTB
O
Memory bus strobe (Not used)
98
MD0
I/O
Memory data bus (Not used)
99
GND
—
Ground terminal
100
MD3
I/O
Memory data bus (Not used)
101
MD1
I/O
Memory data bus (Not used)
102
MD4
I/O
Memory data bus (Not used)
103
MD5
I/O
Memory data bus (Not used)
104
MD6
I/O
Memory data bus (Not used)
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