Sony HT-SS600 (serv.man2) Service Manual ▷ View online
33
STR-KS600P
IC700
µ
PD16315GB-3BS
– Placa DISPLAY –
5
OSC
OSC
DATA
SELECTOR
6
DOUT
7
DIN
8
CLK
9
STB
10
KEY1
11
KEY2
SERIAL
INTERFACE
DISPLAY MEMORY
24 BITS x 12 WORDS
24-BIT OUTPUT
LATCH
12-BIT SHIFT
REGISTER
SEGMENT
DRIVER
TIMING GENERATOR
KEY SCAN
COMMAND
DECODER
DIMMING
CIRCUIT
KEY DATA MEMORY
(2 x 16 BITS)
4-BIT LATCH
1
LED1
2
LED2
3
LED3
4
LED4
24
16
16
12
4
8
8
4
8
27 SEG14/KS14
29 SEG16/KS16
30 VEE
28 SEG15/KS15
8
31 SEG17/GRID12
33 SEG19/GRID10
32 SEG18/GRID11
23 SEG10/KS10
24 SEG11/KS11
25 SEG12/KS12
26 SEG13/KS13
22
SEG9/KS9
21
SEG8/KS8
20
SEG7/KS7
19
SEG6/KS6
18
SEG5/KS5
17
SEG4/KS4
16
SEG3/KS3
15
SEG2/KS2
14
SEG1/KS1
MULTIPLEXED
DRIVER
34
SEG20/GRID9
35
SEG21/GRID8
36
SEG22/GRID7
37
SEG23/GRID6
39
GRID4
40
GRID3
41
GRID2
42
GRID1
43
VDD
44
VSS
13
VDD
12
VSS
38
SEG24/GRID5
GRID
DRIVER
IC820
SI-8033JF
– Placa SMPS –
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
ON/OFF
SOFT
START
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
VOS
5
ON/OFF
IC821
SI-8120S
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
VOS
5
S.S
IC822
SI-3025KS-TL
VC 1
VIN 2
THERMAL
SHUT DOWN
REGULATOR
BLOCK
GND
6
GND
5
GND
8
GND
7
VO 3
SENSE 4
34
STR-KS600P
IC910
STR-F6168-LF1352
OVER
CURRENT
PROTECT
2
LOGIC
OSC
INTERNAL BIAS
DELAY
DELAY
LATCH
CURRENT
MIRROR
OVER
CURRENT
PROTECT
2
OVER
CURRENT
PROTECT
1
FEED
BACK
INH
2
INH
1
BOTTOM
SKIP
LOGIC
OCP/INH
1
S/GND
2
DRAIN
3
VCC
4
FB/OCP
5
UNDER VOLTAGE
LOCK OUT
OVER LOAD
PROTECT
THERMAL
SHUT DOWN
OVER VOLTAGE
PROTECT
SWITCHING
REGULATOR
BLOCK
IC930
STR-A6159
BUFFER
OVER CURRENT
PROTECT
THERMAL
SHUT DOWN
BLANKING
OFF
TIMER
DISCHARGE
OVER VOLTAGE
PROTECT
OVER LOAD
PROTECT
UNDER
VOLTAGE
LOCK OUT
FEED BACK
BURST
BIAS
INTERNAL
BIAS
DRAIN
8
DRAIN
7
STARTUP
5
NC
6
DRIVE
SOURCE/OCP 1
VCC 2
GND 3
FB/OLP 4
DELAY
Q
S
R
LATCH
PWM LATCH
35
STR-KS600P
PLACA DIGITAL IC1301 LC89056W-E (DIGITAL AUDIO INTERFACE RECEIVER)
Pin No.
Pin Name
I/O
Description
1
DISEL
I
Selection signal input terminal of data input terminal Fixed at "L" in this set
2
DOUT
O
Digital data output to the external output terminal Not used
3 to 5
DIN0 to DIN2
I
Digital audio signal input terminal
6
D. GND
-
Ground terminal
7
DVDD
-
Power supply terminal (+3.3V)
8
R
I
Input terminal for VCO gain control Not used
9
VIN
I
VCO free-run frequency setting terminal
10
LPF
O
PLL loop filter setting terminal
11
AVDD
-
Power supply terminal (+3.3V)
12
AGND
-
Ground terminal
13
CKOUT
O
Audio clock signal output to the DSP
14
BCK
O
Bit clock signal output to the DSP
15
LRCK
O
L/R sampling clock signal output to the DSP
16
DATAO
O
Audio serial data output to the DSP and system controller
17
XSTATE
O
Source clock selection monitor output to the system controller
18
DGND
-
Ground terminal
19
DVDD
-
Power supply terminal (+3.3V)
20
XMCK
O
System clock signal (12.288 MHz) output to the A/D converter
21
XOUT
O
System clock output terminal (12.288 MHz)
22
XIN
I
System clock input terminal (12.288 MHz)
23
EMPHA
O
Channel status emphasis information output terminal Not used
24
AUDIO
O
Channel status bit 1 output to the DSP
25
CSFLAG
O
Channel status head 40 bit renewal flag output terminal Not used
26 to 29
F0/P0/C0 to
F3/P3/C3
O
Output terminal of input frequency calculation result Not used
30
DVDD
-
Power supply terminal (+3.3V)
31
DGND
-
Ground terminal
32
AUTO
O
Not used
33
BPSYNC
O
Non-PCM burst preamble sync signal output terminal Not used
34
ERROR
O
PLL lock error signal and data error flag output to the DSP and system controller
35
DO
O
Read data output to the system controller
36
DI
I
Write data input from the system controller
37
CE
I
Chip enable signal input from the system controller
38
CLK
I
Clock signal input from the system controller
39
XSEL
I
Selection signal input terminal of crystal oscillator frequency Fixed at "H" in this set
40, 41
MODE0, MODE1
I
Mode setting terminal Fixed at "L" in this set
42
DGND
-
Ground terminal
43
DVDD
-
Power supply terminal (+3.3V)
44, 45
DOSEL0, DOSEL1
I
Output data format selection signal input terminal Fixed at "L" in this set
46
CKSEL0
I
Output clock selection signal input terminal Fixed at "L" in this set
47
CKSEL1
I
Output clock selection signal input terminal Not used
48
XMODE
I
System reset signal input from the system controller "L": reset
•
DESCRIÇÕES DOS PINOS DE IC
36
STR-KS600P
PLACA DIGITAL IC1501 CXD9720BQ (DIGITAL AUDIO SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
VSS
-
Ground terminal
2
XRST
I
System reset signal input from the system controller "L": reset
3
EXTIN
I
Master clock signal input terminal Not used
4
LRCKI3
I
L/R sampling clock signal input terminal Not used
5
VDDI
-
Power supply terminal (+2.6V)
6
BCKI3
I
Bit clock signal input terminal Not used
7
PLOCK
O
Internal PLL lock signal output terminal Not used
8
VSS
-
Ground terminal
9
MCLK1
I
System clock input terminal (13.9 MHz)
10
VDDI
-
Power supply terminal (+2.6V)
11
VSS
-
Ground terminal
12
MCLK2
O
System clock output terminal (13.9 MHz)
13
MS
I
Master/slave setting terminal "L": internal clock, "H": external clock
Fixed at "L" in this set
Fixed at "L" in this set
14
SCKOUT
O
System clock output to the stream processor
15
LRCKI1
I
L/R sampling clock signal input from the digital audio interface receiver
16
VDDE
-
Power supply terminal (+3.3V)
17
BCKI1
I
Bit clock signal input from the digital audio interface receiver
18
SDI1
I
Audio serial data input from the A/D converter
19
LRCKO
O
L/R sampling clock signal output to the stream processor
20
BCKO
O
Bit clock signal output to the stream processor
21
VSS
-
Ground terminal
22
KFSIO
I
Audio clock signal input from the digital audio interface receiver
23 to 25
SDO1 to SDO3
O
Audio serial data output to the stream processor
26
SDO4
O
Audio serial data output terminal Not used
27
SPDIF
O
SPDIF audio signal output terminal Not used
28
LRCKI2
I
L/R sampling clock signal input from the digital audio interface receiver
29
BCKI2
I
Bit clock signal input from the digital audio interface receiver
30
SDI2
I
Audio serial data input from the digital audio interface receiver
31
VSS
-
Ground terminal
32
HACN
O
Acknowledge signal output to the system controller
33
HDIN
I
Serial data input from the system controller
34
HCLK
I
Serial data transfer clock signal input from the system controller
35
HDOUT
O
Serial data output to the system controller
36
HCS
I
Chip select signal input from the system controller
37
GP12
I
Write signal input from the system controller
38
GP13
O
SD-RAM chip enable output terminal Not used
39
GP14
O
Row address strobe signal output terminal Not used
40
VDDI
-
Power supply terminal (+2.6V)
41
VSS
-
Ground terminal
42
GP15
O
Column address strobe signal output terminal Not used
43
OE0
O
Output terminal of data input/output mask Not used
44
CS0
O
Chip select signal output to the S-RAM
45
WE0
O
Write enable signal output to the S-RAM
46
VDDE
-
Power supply terminal (+3.3V)
47
WMD1
I
External memory wait mode setting terminal Fixed at "H" in this set
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