DOWNLOAD Sony HT-FS1 / SA-FS1 / SS-FS1 Service Manual ↓ Size: 3.81 MB | Pages: 76 in PDF or view online for FREE

Model
HT-FS1 SA-FS1 SS-FS1
Pages
76
Size
3.81 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
ht-fs1-sa-fs1-ss-fs1.pdf
Date

Sony HT-FS1 / SA-FS1 / SS-FS1 Service Manual ▷ View online

SA-FS1/SS-FS1
49
IC941   SI-3120KM-TLS
IC942   SI-3050KM-TLS
IC943   SI-3033KM-TLS
IC921  STR-V153
5
8
4
1 2 3
GND
6
FB/OLP
7
N.C.
ST
AR
TUP
VCC
D
N.C.
SOURCE/OCP

+





Q S
R
DISCHARGE
BLANKING
BUFFER
TSD
DELAY
LATCH
INTERNAL
BIAS
OFF TIMER
PRC LATCH
BURST
FB
OCP
OLP
DRIVE
OVP
UVLO
POWER
MOS FET
1
VC
TSD
2
VIN
3
GND
4
VOUT
5
ADJ
+
REF
SA-FS1/SS-FS1
50
•  IC Pin Function Descriptions
MAIN BOARD  IC2  ADSST-AVR-1115 (DSP)
Pin No.
Pin Name
I/O
Description
1
VDDINT
-
Power supply terminal (+1.2V) (for core)
2
CLKCFG0
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at "L" in this set
3
CLKCFG1
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at "H" in this set
4, 5
BOOTCFG0,
BOOTCFG1
I
Boot mode selection signal input terminal    Fixed at "H" in this set
6
GND
-
Ground terminal
7
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
8
GND
-
Ground terminal
9
VDDINT
-
Power supply terminal (+1.2V) (for core)
10
GND
-
Ground terminal
11
VDDINT
-
Power supply terminal (+1.2V) (for core)
12
GND
-
Ground terminal
13
VDDINT
-
Power supply terminal (+1.2V) (for core)
14
GND
-
Ground terminal
15
INT_REQ
O
Interrupt request signal output to the system controller
16
DIR_ERR
I
PLL lock error signal and data error fl ag input from the digital audio interface receiver
17
AD7
I/O
Two-way address and data bus terminal    Not used
18
GND
-
Ground terminal
19
VDDINT
-
Power supply terminal (+1.2V) (for core)
20
GND
-
Ground terminal
21
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
22
GND
-
Ground terminal
23
VDDINT
-
Power supply terminal (+1.2V) (for core)
24 to 26
AD6 to AD4
I/O
Two-way address and data bus terminal    Not used
27
VDDINT
-
Power supply terminal (+1.2V) (for core)
28
GND
-
Ground terminal
29, 30
AD3, AD2
I/O
Two-way address and data bus terminal    Not used
31
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
32
GND
-
Ground terminal
33, 34
AD1, AD0
I/O
Two-way address and data bus terminal    Not used
35
WR*
O
Write enable signal output terminal    Not used
36, 37
VDDINT
-
Power supply terminal (+1.2V) (for core)
38
GND
-
Ground terminal
39
RD*
O
Read enable signal output terminal    Not used
40
ALE
O
Address latch enable signal output terminal    Not used
41 to 43
AD15 to AD13
I/O
Two-way address and data bus terminal    Not used
44
GND
-
Ground terminal
45
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
46
AD12
I/O
Two-way address and data bus terminal    Not used
47
VDDINT
-
Power supply terminal (+1.2V) (for core)
48
GND
-
Ground terminal
49 to 52
AD11 to AD8
I/O
Two-way address and data bus terminal    Not used
53
A16
-
Not used
54
VDDINT
-
Power supply terminal (+1.2V) (for core)
55
GND
-
Ground terminal
56, 57
A17, A18
-
Not used
58
GND
-
Ground terminal
59
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
60
VDDINT
-
Power supply terminal (+1.2V) (for core)
61
GND
-
Ground terminal
62
PF_CE
-
Not used
63
SPI_MAS
-
Not used
SA-FS1/SS-FS1
51
Pin No.
Pin Name
I/O
Description
64
DPSOA
O
Audio serial data output to the stream processor
65
DPSOB
O
Audio serial data output terminal    Not used
66
VDDINT
-
Power supply terminal (+1.2V) (for core)
67
GND
-
Ground terminal
68
VDDINT
-
Power supply terminal (+1.2V) (for core)
69
GND
-
Ground terminal
70
DPSOC
O
Audio serial data output to the stream processor
71
DPSOD
O
Audio serial data output terminal    Not used
72
VDDINT
-
Power supply terminal (+1.2V) (for core)
73
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
74
GND
-
Ground terminal
75
VDDINT
-
Power supply terminal (+1.2V) (for core)
76
GND
-
Ground terminal
77
DPSOE
O
Audio serial data output terminal    Not used
78
DPSIA
I
Audio serial data input from the digital audio interface receiver
79
DPSIB
I
Audio serial data input from the A/D converter and HDMI receiver
80 to 82
DPSIC to DPSIE
I
Audio serial data input from the HDMI receiver
83
VDDINT
-
Power supply terminal (+1.2V) (for core)
84, 85
GND
-
Ground terminal
86
DPDVLRCK
O
L/R sampling clock signal output to the stream processor
87
DPDVBCK
O
Bit clock signal output to the stream processor
88
DPLRCK
I
L/R sampling clock signal input from the digital audio interface receiver and HDMI receiver
89
DPBCK
I
Bit clock signal input from the digital audio interface receiver and HDMI receiver
90
VDDINT
-
Power supply terminal (+1.2V) (for core)
91, 92
GND
-
Ground terminal
93
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
94
DPFSCK
I
Audio clock signal input from the digital audio interface receiver and HDMI receiver
95
GND
-
Ground terminal
96
VDDINT
-
Power supply terminal (+1.2V) (for core)
97
NONAUDIO*
I
PCM audio data input from the digital audio interface receiver
98
SF_CE*
-
Not used
99
VDDINT
-
Power supply terminal (+1.2V) (for core)
100
GND
-
Ground terminal
101
VDDINT
-
Power supply terminal (+1.2V) (for core)
102
GND
-
Ground terminal
103
VDDINT
-
Power supply terminal (+1.2V) (for core)
104
GND
-
Ground terminal
105
VDDINT
-
Power supply terminal (+1.2V) (for core)
106
GND
-
Ground terminal
107, 108
VDDINT
-
Power supply terminal (+1.2V) (for core)
109
GND
-
Ground terminal
110
VDDINT
-
Power supply terminal (+1.2V) (for core)
111
GND
-
Ground terminal
112
VDDINT
-
Power supply terminal (+1.2V) (for core)
113
GND
-
Ground terminal
114
VDDINT
-
Power supply terminal (+1.2V) (for core)
115
GND
-
Ground terminal
116
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
117
GND
-
Ground terminal
118
VDDINT
-
Power supply terminal (+1.2V) (for core)
119
GND
-
Ground terminal
120
VDDINT
-
Power supply terminal (+1.2V) (for core)
121
RESET*
I
Reset signal input from the system controller    "L": reset
122
SPIDS*
I
Device selection signal input from the system controller    "L" active
123
GND
-
Ground terminal
124
VDDINT
-
Power supply terminal (+1.2V) (for core)
SA-FS1/SS-FS1
52
Pin No.
Pin Name
I/O
Description
125
SPICLK
I
Serial data transfer clock signal input from the system controller
126
MISO
O
Serial data output to the system controller
127
MOSI
I
Serial data input from the system controller
128
GND
-
Ground terminal
129
VDDINT
-
Power supply terminal (+1.2V) (for core)
130
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
131
AVDD
-
Power supply terminal (+1.2V) (analog system)
132
AVSS
-
Ground terminal (analog system)
133
GND
-
Ground terminal
134
CLKOUT
O
Local clock signal output terminal    Not used
135
EMU*
O
Emulation status signal output terminal    Not used
136
TDO
O
Test data output terminal (for JTAG)    Not used
137
TDI
I
Test data input terminal (for JTAG)    Not used
138
TRST*
I
Test reset signal input terminal (for JTAG)    Not used
139
TCK
I
Test clock signal input terminal (for JTAG)    Not used
140
TMS
I
Test mode select signal input terminal (for JTAG)    Not used
141
GND
-
Ground terminal
142
CLKIN
I
System clock input terminal (25 MHz)
143
XTAL
O
System clock output terminal (25 MHz)
144
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
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