DOWNLOAD Sony HT-FS1 / SA-FS1 / SS-FS1 Service Manual ↓ Size: 3.81 MB | Pages: 76 in PDF or view online for FREE

Model
HT-FS1 SA-FS1 SS-FS1
Pages
76
Size
3.81 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
ht-fs1-sa-fs1-ss-fs1.pdf
Date
PREV: Sony ZS-PS20CP Service Manual

Sony HT-FS1 / SA-FS1 / SS-FS1 Service Manual ▷ View online

SA-FS1/SS-FS1
41
IC1011  LC890561W
IC1014, 1015  TC74VHC157FT(EKJ)
IC1208  AK5358AET-E2
37
CE
38
CLK
39
XSEL
40
MODE0
41
MODE1
42
DGND
43
DVDD
44
DOSEL0
45
DOSEL1
46
CKSEL0
47
CKSEL1
48
XMODE
36
DI
MICRO
CONTROLLER
35
DO
34
ERROR
33
BPSYNC
32
VREF
31
DGND
30
DVDD
29
VF/DA
TAO2
28
F2/DLMP
27
F1/FSB1
26
F0/FSB0
25
CSFLAG
1
DISEL
2
DOUT
3
DIN0
4
DIN1
5
DIN2
6
DGND
7
DVDD
8
SDIN
9
AGND
10
LPF
11
AV
D
D
12
AGND
23 EMPHA
22 XIN
24 AUDIO
21 XOUT
20 XMCK
19 DVDD
18 DGND
17 XSTATE
16 DATAO
15 LRCK
14 BCK
13 CKOUT
PA,PB DETECT
REGULATOR
FS CALCULATION
AMP
CLOCK
SELECT
OR
DATA SELECTOR
DATA SELECTOR
BUFFER RAM
INPUT SELECTOR
PLL
DEMODULATION
&
LOCK DETECT
C-BIT DETECT
SELECT 11
1
1A 2
3
4
5
6
7
INPUT
INPUT
OUTPUT
OUTPUT
1A
1B
1Y
2A
2B
2Y
1B
1Y
2A
2B
2Y
GND 8
V
CC
STROBE
16
4A
15
14
13
11
12
11
10
INPUT
INPUT
OUTPUT
OUTPUT
G
4B
4Y
3A
4A
4B
4Y
3A
3B
9
3B
3Y
3Y
S
MODULATOR
DECIMATION
FILTER
1
AINR
AINL
CKS1
VCOM
AGND
VA
VD
DGND
CKSO
CKS2
DIF
PDN
SCLK
MCLK
LRCK
SDTO
MODULATOR
DECIMATION
FILTER
SERIAL I/O
INTERFACE
CLOCK
DIVIDER
2
VOLTAGE
REFERENCE
4
3
5
6
8
7
16
15
13
14
12
11
9
10
SA-FS1/SS-FS1
42
IC3010, 3030  CXD9843AR
12
11
10
9
8
7
6
5
4
3
VSUBC
XVSS
OUTR2
VSSR
OUTR1
VDDR
VSSL
VSSR
OUTL2
OUTL1
VSSL
VDDL
2
1
PWM
CLOCK
GENERATOR
(SECONDARY)
CLOCK
GENERATOR
(PRIMARY)
31
29
25 OVFFLAGL
26 SFLAG
27 INIT
30
S H P
GAIN
CONTROL
INIT/
MUTE
SAMPLING
RATE
CONVERTER
FILTER &
LOW CUT
FILTER
LINER
INTERPOLATOR
$
48
XFSOIN
47
XVDD
HPVDDL
46
45
HPOUTL1
HPVSSL
44
43
HPOUTL2
HPVDDR
42
41
HPOUTR1
HPVSSR
40
HPOUTR2
39
37
FSOCKO
38
FSOI
13
XOVSS
14
XFSOOUT
15
XOVDD
16
DVDD
17
DVSS
18
NSPMUTE
19
SOFTMUTE
20
PGMUTE
SERIAL
CONTROLLER
21
SCDT
22
SCSHIFT
23
SCLA
TCH
24
OVFFLAGR
28 MCKSEL
32 BFVDD
33 BFVSS
34 TEST
35 DVDD
36 XFSIIN
LRCK
BCK
DATA
SA-FS1/SS-FS1
43
IC3056  CXD9845AM
/OTW 2
GVDD_B 1
PROTECTION
LOGIC
GATE
DRIVE
GVDD_A
36
BST_A
35
PVDD_A
34
OUT_A
33
GND
32
GATE
DRIVE
OVER CURRENT
FAULT
OVER CURRENT
FAULT
/SD 3
PWM_A 4
PWM_B 6
/RESET_AB 5
/RESET_CD 15
PWM_C 14
M1 13
M2 12
GND 11
GND 8
GND 9
VREG 10
OC_ZDJ 7
PROTECTION
&
RESET LOGIC
OLP
OTP
CB3C
TIMING
CONTROL
STUCK
DETECT
STUCK
DETECT
STUCK
DETECT
REGULATOR
STUCK
DETECT
/HIZ_LS
/OCH
/OCL
/RESET
/HIZ_HS
/UVP
PROTECTION
LOGIC
GVDD_C
PWM_D 16
VDD 17
18
GATE
DRIVE
BST_C
27
PVDD_C
26
OUT_C
25
GND
24
GATE
DRIVE
OVER CURRENT
FAULT
OVER CURRENT
FAULT
TIMING
CONTROL
/HIZ_LS
/OCH
/OCL
/RESET
/HIZ_HS
/UVP
PROTECTION
LOGIC
GATE
DRIVE
BST_B
28
PVDD_B
29
OUT_B
30
GND
31
GATE
DRIVE
OVER CURRENT
FAULT
OVER CURRENT
FAULT
TIMING
CONTROL
TIMING
CONTROL
/HIZ_LS
/OCH
/OCL
/RESET
/HIZ_HS
/UVP
PROTECTION
LOGIC
GATE
DRIVE
BST_D
20
GVDD_D
19
PVDD_D
21
OUT_D
22
GND
23
GATE
DRIVE
OVER CURRENT
FAULT
OVER CURRENT
FAULT
TIMING
CONTROL
TIMING
CONTROL
/HIZ_LS
/OCH
/OCL
/RESET
/HIZ_HS
/UVP
PROGRAMMABLE
CURRENT SENSE
TEMPERATURE
WARNING/ERROR
2
4
/HIZ_HS
4
/HIZ_LS
4
/OCH
4
/OCL
GVDD_D
GVDD_C
GVDD_B
GVDD_A
VREG
4
/RESET
VREG
UNDER
VOLTAGE
PROTECTION
POWER-UP
RESET
/UVP
GVDD_A
GVDD_D
GVDD_B
GVDD_C
VREG
SA-FS1/SS-FS1
44
IC3500  CXD9883AM
– IO Board –
IC204  TC74VHC153FT(EL)
IC205  MC14052 BDR2
1
10
9
8
11
12
13
14
7
6
15
16
17
18
3
4
5
20
19
2
AGND
GND
GND
PGND
PGND
PGND
PGND
PGND
PGND
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
Stuck
Detect
Stuck
Detect
Timing
Control
Timing
Control
Protection
Logic
Protection
Logic
Gate
Drive
Gate
Drive
Gate
Drive
Gate
Drive
Over
Current
Fault
Over
Current
Fault
Over
Current
Fault
Over
Current
Fault
Programmable
Current sense
OUT_B
OUT_B
OUT_B
PVDD_B
PVDD_B
PVDD_B
OUT_A
OUT_A
OUT_A
PVDD_A
PVDD_A
PVDD_A
REG
BST_B
GVDD_B
VDD
PWM_B
M1
M2
M3
VREG
OC_ADJ
PWM_A
/RESET
/SD
/OTW
GVDD_A
BST_A
Protection
and
Reset
Logic
OLP
OTP
CB3C
Temperature
waming/error
Power-Up
Reset
Under
Voltage
Protection
/HIZ_HS_B
/HIZ_HS_A
/HIZ_LS_B
/HIZ_LS_A
/OCL_B
/OCL_A
/OCH_B
/OCH_A
/RESET_A
/RESET_B
VREG
/HIZ_HS_X
/HIZ_LS_X
/OCH_X
/OCL_X
/RESET_X
/PCR
/UVP
/UVP
/UVP_VREG
VREG
GVDD_A
GVDD_B
VREG
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
2G
2C3 2C2 2C1 2C0
2Y
VCC
2C3 2C2 2C1 2C0
STROBE
2G
OUTPUT
2Y
A
SELECT
DATA INPUTS
B
B
A
A
B
B
A
A
1G
1C3 1C2 1C1 1C0
1Y
STROBE
1G
B
SELECT
1C3 1C2 1C1 1C0 OUTPUT
1Y
GND
DATA INPUTS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2Y0
1Y2
VCC
1Y1
1-COM
1Y0
1Y3
A
B
GND
GND
INH
2Y1
2Y3
2-COM
2Y2
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