Sony HCD-ZX50MD Service Manual ▷ View online
101
53
—
Not used.
54
—
Not used.
55
O
Not used.
56
MNT2 (XBUSY)
I
In the state of executive command from the CXD2662R
57
VSS2
—
Ground.
58
MNT1 (SHCK)
I
Track jump signal input from the CXD2662R
59
VCC2
—
Power supply. (+3.3V)
60
EEP-WP
O
EEP-ROM write protect signal output. L: write possibility
61
SDA (EEP)
I/O
Data signal input/output pin with the EEP-ROM.
62
BCLK/ALE/CLKO
—
Not used.
63
RD/DW
O
Read signal output.
64
BHE/CASH
—
Not used.
65
WR/CASL
O
Write signal output.
66
SCL
O
Clock signal output to the EEP-ROM.
67
REFLECT
I
Disk reflection rate detection input from the reflect detection switch. H: Disk with low reflection rate
68
PROTECT
I
Recording-protection claw detection input from the protection detection switch. H: Protect
69
CS0
O
Chip select signal output to the Flash ROM.
70
CS1
O
Not used.
71
O
Not used.
72
A20
O
Address bus signal output to Flash ROM.
73
A19
O
Address bus signal output to Flash ROM.
74
VCC3
—
Power supply. (+3.3V)
75
A18
O
Address bus signal output to Flash ROM.
76
VSS3
—
Ground
77 to 85
A17 to A9
O
Address bus signal output to Flash ROM.
86 to 89
SEL 3 to 0
O
Not used.
90
WP
O
Write protect signal to the Flash ROM.
91
VCC4
—
Power supply. (+3.3V)
92
A8
O
Address bus signal output to Flash ROM.
93
VSS4
—
Ground.
94 to 100
A7 to A1
O
Address bus signal output to Flash ROM.
101
LB
—
Not used.
102 to 113
D15 to D4
I/O
Data bus signal input/output to the Flash ROM.
114
CLIP-SEL
O
Not used.
115
IIC BUSY
O
IIC cable connect check. L: Active
116
DALOCK
O
LOCK signal input from D/A converter.
117
LINE-MUTE
O
Not used.
118
ADP DOWN
O
Reset signal output to the A/D converter.
119 to 122
D3 to D0
I/O
Data bus signal input/output to the Flash ROM.
123
SPDIF-CUT
—
Jog dial pulse input from the rotary encoder.
124
OPT SEL
O
Optical select signal output.
125 to 129
—
Not used.
130
VSS5
—
Ground.
131
O
Not used.
132
VCC5
—
Power supply. (+3.3V)
133
OP-LEVEL
I
Optical Pick-up voltage (current) detect signal input.
134 to 139
—
Not used.
140
AVSS
—
Ground. (Analog)
141
—
Not used.
142
VREF
—
Power supply. (+3.3V)
143
AVCC
—
Power supply. (+3.3V)
144
NC
I
Not used.
Function
Pin Name
Pin No.
I/O
102
1
BD-DATA
O
CD data output.
2
BD-CLK
O
CD clock output.
3
BD-LAT
O
CD latch signal output.
4
AC-CUT
I
AC cut input. L= ON,H=OFF
5
N.C
—
Not used.
6
SQ-DATA-IN
I
Subcode Q data input.
7
SQ-CLK
I
Subcode Q data input.
8
GND
—
Connected to ground.
9
GND
—
Connected to ground.
10
XC IN
I
SUB CLOCK input. (32.768kHz)
11
XC OUT
O
SUB CLOCK output. (32.768kHz)
12
RESET
I
System reset input.
13
X-OUT
O
MAIN SYSTEM CLOCK output. (16MHz)
14
VSS
—
Vss
15
X-IN
I
MAIN SYSTEM CLOCK input. (16MHz)
16
VCC
—
Power supply. (+5V)
17
NMI
I
PULL UP (EVER +5V)
18
WAKE_UP
I
WAKE UP signal input. (L)
19
SCOR
I
CD Q-data request signal input.
20
RDS-INT
I
RDS interrupt signal input.
21
RDS-DATA
I
RDS data signal input.
22
CD-POWER
O
CD-POWER ON/OFF signal output. H=ON, L=OFF
23
STBY-RELAY
O
STANDBY relay control signal output.
24
PROTECT
I
Speaker protect signal input. L=ON, H=OFF
25
STK-MUTE
O
Power amplifier mute ON/OFF signal output. H=ON, L=OFF
26
RWLAY-H
O
Speaker terminal relay control signal output. H=ON, L=OFF
27
N.C
I
Not used.
28
REAR-RELAY
O
Rear speaker relay control signal output.(Not used.)
29
IIC_CLK
O
IIC SCL output.
30
IIC_DATA
O
IIC SDA output.
31
TXD1 (LD ON)
O
Write data output for FLASH connector/LD ON signal output.
32
SQ-DATA (X1-X2)
O
Read data output for FLASH connector/X’tal select signal output.
33
SQ-CLK (DA-MUTE)
O
Clock data output for FLASH connector/D/A converter mute signal output.
34
RST1 (OPT SEL)
O
Reset output for FLASH connector/Optical select signal output.
35
HEAD PHONE
I
Head phone signal detect. H=ON,L=OFF
36
LINE-MUTE
O
Line mute signal output. L=ON, H=OFF
37
MD/P-DOWN
O
MDM power down
38
TEST
I
Test terminal
39
CLOCK-OUT
I
Clock check signal input. (Not used.)
40
PL-LAT
O
Latch output to PRO-LOGIC IC
41
PL-CLK/SUR1
O
Clock output to PRO-LOGIC IC/Surround control signal output
42
PL-DATA/SUR2
O
Data output to PRO-LOGIC IC/Surround control signal output
43
502-LAT
O
Latch output to sound processor
Pin No.
Pin Name
I/O
Descriptions
• IC401 M30620MCA-A54FP MASTER CONTROL (MAIN BOARD)
103
44
502-DATA
O
Data output to sound processor
45
502-CLK
O
Clock output to sound processor
46
ST-CLK
O
TUNER clock signal output.
47
ST-DIN
I
TUNER data input.
48
ST-DOUT
O
TUNER data output.
49
ST-CE
O
TUNER chip eneble output.
50
TUNED
I
TUNED detect signal input. L=ON, H=OFF
51
STEREO
I
STEREO detect signal input. L=ON, H=OF
52
ST-MUTE
O
Tuner mute signal output.
53
AMS-IN
I
AMS signal input. L=ON,H=OFF”
54
TC-MUTE
O
Tape deck line mute ON/OFF signal output. H=ON, L=OFF
55
R/PB/PAS
I
REC/PB/PASS select signal input.
56
NR-ON/OFF
O
DOLBY NR ON/OFF signal output. H=ON, L=OFF
57
REC-MUTE
O
REC mute ON/OFF signal output. L=ON, H=OFF
58
BAIS
O
BIAS ON/OFF signal output.H=ON, L=OFF
59
EQ-H/N
O
EQ High/Normal select signal output. H=High, L=Normal
60
PB-A/B
O
Playback deckA/B select signal output. H=deckB, L=deckA
61
ALC
O
ALC ON/OFF signal output. L=ON, H=OFF
62
VCC
—
Power Supply (+5V)
63
TC-RELAY
O
Tape deck relay ON/OFF signal output. H=ON, L=OFF
64
VSS
—
Ground.
65
A TRIG
O
A deck trigger control signal output.H=ON, L-OFF
66
B TRIG
O
B deck trigger control signal output.H=ON, L-OFF
67
CAPM-H/L
O
Capstan motor High/Low speed control signal output.
68
CAPM-CONT
O
Capstan motor REV/FWD/STOP control signal output.H=REV, L=FWD/STOP
69
A HALF
I
A deck half detect signal input.
70
A PLAY
I
A deck play detect signal input.
71
B PLAY
I
B deck play detect signal input.
72
IIC-BUSY
I
IIC_BUSY(Not used.)
73
LOD-POS
O
CD loading motor control signal output
74
LOD-NEG
O
CD loading motor control signal output
75
OUT SW
I
Detection input from the tray open/close detect switch (S708) on the CD mechanism block
76
MIDOUT SW
I
Detection input from the mid out detect switch (S701) on the CD mechanism block
77
IN SW
I
Detection input from the tray open/close detect switch (S704) on the CD mechanism block
78
MIDIN SW
I
Detection input from the mid in detect switch (S703) on the CD mechanism block
79
CLP-POS
O
CD elevator up/down motor (M701) control signal output to the motor driver IC (IC701)
80
CLP-NEG
O
CD elevator up/down motor (M701) control signal output to the motor driver IC (IC701)
81
INIT SW
I
Detection input from the INIT detection switch (S705) on the CD mechanism block
82
CNT-SW
I
Detection input from the count detect switch (S706) on the CD mechanism block
83 to 85
ENC2, ENC1, ENC0
I
Detection input from the disc tray address detect rotary encoder (S707) on the CD
mechanism block
86
DISC-SENS
I
Detection input from the disc in detect sensor (D704 and Q703) on the CD mechanism
block
87
PRTC SW
I
Detection input from the CD tray door open/close detect switch (S702)
88
SOFT-TEST
—
Not used.
Pin No.
Pin Name
I/O
Descriptions
104
89
A SHUT
O
A deck reel pulse detect signal output.
90
B SHUT
O
B deck reel pulse detect signal output.
91
B HALF/REC A/REC B
I
B deck half detect signal input./A deck or B deck record detect signal input.
92
MODEL-IN
I
MODEL input.
93
SPEC-IN
I
Version select signal input.
94
POWER
O
POWER ON/OFF signal output. H=ON, L=OFF
95
SENS
I
BD condition signal input.
96
AVSS
—
Analog ground.
97
HOLD
O
MODE signal input.
98
VREF
—
Analog Reference Voltage
99
AVCC
—
Analog Power Supply
100
XRST
O
CD reset signal output.
Pin No.
Pin Name
I/O
Descriptions
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