Sony HCD-M700 Service Manual ▷ View online
85
85
HCD-M700
6-28. IC Block Diagrams
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
VG
IN4R
IN4F
VM4
OUT4F
PGND4
OUT4R
VM34
OUT3R
PGND3
OUT3F
VM3
IN3F
IN3R
PSB
CAPA–
CAPA+
IN2R
IN2F
VM2
OUT2F
PGND2
OUT2R
VM12
OUT1R
PGND1
OUT1F
VM1
IN1F
IN1R
V
DD
CHARGE
PUMP.
OSC
INTERFACE
AMP
INTERFACE
AMP
AMP
INTERFACE
PREDRIVE
PREDRIVE
PREDRIVE
PREDRIVE
AMP
INTERFACE
AMP
AMP
AMP
V
DD
PSB
AMP
–1
–2
+
–
–
IVR
BB
+
–
–
IVR
AA
+
–
–
IVR
CC
+
–
–
IVR
DD
+
–
–
IVR
+
–
–
EE
EE'
EFB
TESW
PTGR
48
MORFO
47
MORFI
46
RFO
45
OPN
44
OPO
43
ADDC
42
COMPP
41
COMPO
40
AGCI
39
RF AGC
38
RF
37
PEAK
36 BOTM
35 ABCD
34 FE
33 AUX
34 FE
33 AUX
32 ADFG
31 ADAGC
30 ADIN
29 ADFM
28 SE
27 CSLED
26 TE
25 WBLADJ
24
VCC
23
3TADJ
22
EQADJ
21
VREF
20
F0CNT
19
XSTBY
18
XLAT
17
SCLK
16
SWDT
15
TEMPR
14
TEMPI
13
GND
12
APCREF
11
APC
10
PD
9
F
8
E
7
D
6
C
5
B
4
A
3
VC
VI CONV
BGR
VREF
SCRI - PARA
DECODE
+ –
–
+
AUXSW
COMMAND
+
–
–
IVR
GSW
+
–
–
FF
FBAL
FF'
TG
SEA
–
+
–
+
–1
–2
TG
TEA
WBL
3T
EQ
–
–
+
+
+
+
–
–
–
–
–
–
DET
ADIP
AGC
WBL
BPF22
BPFC
ABCDA
FEA
WBL
ATA
–
+
CVB
+
–
RFA1
–
–
–
–
1
2
2
–
–
–
–
1
2
2
GRVA
OFST
RFA2
GRV
HLPT
PTGR
–2
–1
–1
–2
BOTTOM
PEAK
RF AGC
EQ
EQ
DET
P-P
WBL
3T
WBL TEMP
PBH
–
+
+
USROP
+
–
–
USRC
3T
BPF3T
PEAK3T
1
I
2
J
RFA3
PBSW
AUX
SW
IV
ESW
EBAL
100 99 98 97 96 95
94 93
EFMO
DVSS
TEST3
TEST2
TEST1
FGIN
SPFD
SPRD
92
SFDR
91
SRDR
90
FS4
89
FRDR
88
FFDR
87
DVDD
86
TFDR
85
TRDR
84
TEST0
83
APCREF
82
DTRF
81
CKRF
80
XLRF
79
F0CNT
78
ADFG
77
TEST4
76
DCHG
75 TE
74 SE
73 AVSS
72 ADRB
71 ADRT
70 AVDD
69 ADIO
62 CLTV
61 FILO
60 FILI
59 PCO
57 RFI
58 AVSS
56 BIAS
55 AVDD
54 ASYI
53 ASYO
52 MVCI
51 D3
68 VC
67 AUX1
66 FE
65 ABCD
64 BOTM
63 PEAK
50
D2
49
D0
48
D1
47
XWE
46
XRAS
45
A09
44
XCAS
43
XOE
42
DVSS
41
A11
40
A08
39
A07
38
A06
37
A05
36
A04
35
A10
34
A00
33
A01
32
A02
31
A03
30
DVDD
28
XBCK
29
FS256
26
DADT
27
LRCK
24
XBCKI
25
ADDT
23
LRCKI
22
DATAI
21
DOUT
20
DIN1
19
DIN0
18
XTSL
17
OSCO
16
OSCI
15
TX
14
XINT
13
RECP
12
DQSY
11
SQSY
10
XRST
9
SENS
8
SRDT
7
XLAT
6
SCLK
5
SWDT
4
MNT3
3
MNT2
2
MNT1
1
MNT0
PWM
GENERATOR
AUTO
SEQUENCER
SERVO
DSP
CPU I/F
MONITOR
CONTROL
CONTROL
SPINDLE
SERVO
EACH
BLOCK
BLOCK
EACH
BLOCK
BLOCK
DIGITAL
AUDIO
I/F
SAMPLING
RATE
CONVERTER
CLOCK
GENERATOR
SUBCODE
PROCESSOR
EACH
BLOCK
BLOCK
A/D
CONVERTER
ANALOG
MUX
EFM/ACIRC
ENCODER/
DECODER
PLL
SHOCK RESISTANT
MEMORY CONTROLLER
ATRAC
ENCODER/DECODER
ADIP
DECODER
COMP
ADDRESS/DATA BUS A00 - A11, D0 - D3
– BD Board –
IC101 CXA2523AR
IC151 CXD2662R
IC141 BH6519FS-E2
86
86
HCD-M700
– DVD Board –
IC302 CXD9635R
VSS
D0
D1
D2
D3
D4
D5
D6
D7
VDD_3.3V
A0
A1
A2
A3
A4
VAA
A5
A6
A7
VDD_1.8V
XINT
HINT
XCS
HCS
XWAT
VSS
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA7
MA8
MA9
VDD_3.3V
XMWR
XCAS
VSS
XRAS
XOE
VDD_1.8V
MD0
MD1
MD2
MD3
MD4
MD4
MD5
MD6
MD7
VSS
XDSRRST
TESTK2
TESTK1
TESTK0
VSS
VRTA
VDDA0_3.3V
VDDA0_3.3V
TESTAA
VSSA0
VRBA
VSSD0
VDD0_3.3V
ADC7
ADC7
ADC6
ADC5
VSSA0
ADC4
ADC4
ADC3
VDDA0_3.3V
VDDA0_3.3V
ADC2
ADC1
ADC0
VDDD1_3.3V
VSSD1
VRB
RFIN1
VSSA1
AIN
RFIN2
VDDA1_3.3V
VRT
VDD2_3.3V
VSSD2
VSSD2
IREF
AOUT
AOUT
VSSA2
VDDA2_3.3V
BIAS
VREF
VDDA3_3.3V
Y
Y
FR1
FR2
FR3
INM
INP
VSSA4
VDDA4_3.3V
VDDA4_3.3V
R2
R1
VCD
VSSA4
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
VDD_3.3V
DATA
BCLK
VSS
LRCK
DOUT
VDD_1.8V
SDCK
XSHD
XSRQ
XSAK
SDEF
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
VDD_3.3V
MNT0
VSS
MNT1
MNT2
MNT3
MNT4
MNT5
MNT6
MNT7
ESTB
RFD
VDD_1.8V
VSS
PLCKO
AD00
AD01
AD02
AD03
AD04
AD05
AD06
AD07
VSS
XRO
XWR
VSS
D+3.3V
D+3.3V
D+3.3V
D+3.3V
A+3.3V
A+3.3V
A+3.3V
A+3.3V
D+3.3V
A+3.3V
A+3.3V
A+3.3V
D+3.3V
VREF
VRT
VRTA
VRBA
VRB
IREF
D+1.8V
D+1.8V
D+1.8V
D+1.8V
D+1.8V
D+1.8V
D+1.8V
D+1.8V
D+3.3V
PDM2
PDM1
PDM0
VCD_3.3V
PWM2
DATA
PWM0
MIRR
TZC
TDO
TCK
TDI
TMS
TRST
VSS
SCKI
VDD_1.8V
MCKI
VSS
DFCTI
VSSA5
CLKIN
VSS
GIO13
GIO12
GIO11/TMC2
VDDA5_1.8V
GIO10/FGIN
GIO9/FGREF
GIO8/SCK
GIO7/SDO
GIO6/SDI
GIO5/PGIN
GIO4/PGREF
VD0_3.3V
GIO2/INT4
GIO3/INT5
GIO1/INT3
GIO0/INT2
VD0_1.8V
LOCK
JITPWM
DFCT
MDPO
MON
MDSO
VSS
XARPRST
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
25
26
27
28
29
30
31
32
33
34
35
36
37
39
40
41
43
44
45
46
47
48
49
50
51
52
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91
93 94 95 96 97 98 99 100 101 102 103 104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
147
148
149
154
155
156
157
158
159
160
161
162
163
164
165
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
BOUNDARY
SCAN
PWM
PWC
PROGRAM
RAM 10K
DATA RAM
256
GIO
DSP
TIMER
TMC2
PGIN,PGREF,FGIN,FGREF
SD1
SD0
SCK
SD0
SCK
SERVO DSP
SERIAL
ADC
AD I/F
ADC
DA I/F PDM
145
146
150
151
152
153
TEST
REG
CPU I/F
CPU I/F
MEMORY
MANAGER
RF DATA
ECC
RAM
DAC
ADC
VCO
OP-AMP
CD-DEC
DRAN I/F
SD BUS I/F
FWON,MD2
MUTE,PLDIR
EXCK,SQCK,SCMD,
ETST,TEST,TEST0,
SCEN,VCK,PLCK1,
TESTA
ARP
166
167
168
169
24
38
42
92
VDD
Vdd
Vdd
Vdd
VSS
27-1OUT
27-2OUT
VDD
VSS
XTI
XTO
TEST
33-1OUT
FSEL
33-2OUT
VDD
VSS
512-1OUT
512-2OUT
1
2
3
4
5
6
7
8
PLL1
PLL2
OSC
16
15
14
13
12
11
10
9
MUTE
INA
GND
INB
GND
NC
INC
GND
1
2
3
4
5
6
7
8
VCC
OUT A1
OUT A2
OUT B1
OUT B2
NC
OUT C1
OUT C2
16
15
14
13
12
11
10
9
BIAS
BIAS
BIAS
6dB
6dB
6dB
75Ω
75Ω
75Ω
IC801 CXD9626Q
37
38
39
40
41
42
43
44
45
46
47
48
24
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
23
22
21
20
19
18
17
16
15
14
13
B10
B11
B12
B13
MCLK/B14 1/2
VSS
B15
SO
VSS
VDD
SCK
SI
SDO0
BS
VDD
VSS
BCKO
SDO1
VSS
LRCKO
VSS
MODE
DSTP
XRST
N.C.
VDD
MCLK
VSS
LRCKI
SDI0
SDI1
SDI2
BCKI
VSS
XCS
N.C.
B00
B01
B02
B03
B04
B05
B06
B07
VSS
VDD
B08
B09
DSPCSR
DSP-PC
IRAM
(256W)
DECODE
INSTRUCTIONS
YRAM
(192W)
ALU
YRAM
(192W)
DSO-OT
3
‘
0
DSP-LY
MPX
MPX
AUDOUT
AUDLY
AUDIN
LY-DLY
TESIF
HSIF
BCKI, LRCKI
UDSP
AUDIF
IC102 IMIC6001BTD
IC701 BA7666FS-E2
– DIGITAL Board –
IC1701 uDA1350AH
3
2
1
32
33
VSSD
4
VSSD (C)
5
L3DATA
6
L3CLOCK
7
DATAI
8
BCKI
9
WSI
10
L3MODE
11
NC
VDDD (C)
RESET
VDDA (PLL)
31 VSSA (PLL)
27 VDDA
26 VSSA
25 VSSA (DAC)
24 VREF
23
12
TC
BCKO
29
30
CLKOUT
28 NC
PREEM1
MUTE
44
RTCB
43
VDDD
42
PREEM0
41
NC
40
NC
37
WSO
36
DATAO
39
TEST2
38
NC
35
SELSTATIC
34
TEST1
13
SELCHAN
14
NC
15
SPDIF0
16
SPDIF1
17
VDDA (DAC)
18
VOUT L
19
SELCLK
20
SELSPDIF
21
LOCK
22
VOUT R
L3
INTERFACE
IEC 958
DECODER
DATA
OUTPUT
INTERFACE
CLOCK
AND
TIMING
CIRCUIT
DATA
INPUT
INTERFACE
AUDIO FEATURE PROCESSOR
INTERPOLATOR
NOISE SHAPER
DAC
DAC
87
87
HCD-M700
THERMAL
SHUTDOWN
BIPOLAR
TRANSCONDACTANCE
INPUT STAGE
STANDBY/
MUTE
BOOST-
STRAP
MOS GAIN &
LEVEL SHIFTING
STAGE
STBY
-GND
IN–
IN+
IN+ MUTE
NC
BOOSTSTRAP
+VS
–VS
STBY
MUTE
NC
NC
+PWVS
OUT
–PWVS
14 15
12
13
10
11
8 9
6
7
5
3
4
1 2
+
–
MOS
OUTPUT
STAGE
SHORT
CIRCUIT
PROTECTION
CONTROL
CIRCUIT
LOGIC
CIRCUIT
CONTROL
CIRCUIT
CCB
INTERF
ACE
1
2
3
4
5
6
7
8
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
15
14
13
12
11
10
9
DI
CE
VSS
TEST
LOUT
LBASS2
LBASS1
LTRE
LIN
LSELO
L4
L3
L2
L1
NC
CL
VDD
VREF
RVREF
LVREF
NC
ROUT
RBASS2
RBASS1
RTRE
RIN
RSELO
R4
R3
R2
R1
NC
RF IF
RF IN
CP
WIN
WPP
CN
A2
B2
C2
D2
D
C
B
A
E
F
G
H
VC
VPB
DVDPD
CDPD
VNB
LDSELO
DVDLD
CDLD
MEVO
PI
RENW
MIN
MP
MB
MLPF
MIRR
BYP2
PII
PI
TZC
DET
VCI
TZIN
TE
FE
TPH
MON
SRD
SWD
SCLK
SDEN
V33
RX
TPA
MEV
VNA
FNN
FNP
DIP
DIN
BYP
SIGO
VAP
AIP
AIN
ATON
ATOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18
19
20
21 22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
LDON
TEMW
INPUT
BUS
ATT
VDD
FULL WAVE
AGC
CHARG
PUMP
PROGRAMBLE
EQ.FILTER
VGC
INPUT
BUS
CLAMP
HOLD
+
–
+
+
– –
+
++
++
++
+
–
–
–
+
++
++
+
+
–
–
+
+
–
+–
++
––
+
+
–
+
–
–
–
EQ
PHASE
DET.
PHASE
DET.
ADD
EQ
EQ
EQ
GCA
CLAMP
ADD
A+C
B+D
G+H
E+F
ADD
VDD
VSS
SEL
LD SEL
APC GAIN
LDON
LD SEL.
MPX
BIAS
BOTTOM
HOLD
CLAMP
CLAMP
CLAMP
DEL
HOLD
RF HOLD EN
TPA
VPC
CONTROL SIG
RF AGC HOLD
VSS
DEW
BUTTOM
ERR
LEVEL
ADC
SELIAL
PORT
DECODER
MON
SEL
TE
FWT
GCA
LPF
MPX
TOCA
2
TOCA
AMP
AMP
AMP
MPCPI
DF
VC
COMP
DEFECT
VC
SEL
LEVEL
GAC
GCA
GCA
AGC
AGC
LPF
70kHz
70kHz
LPF
GCA
OFFSET
TOP
HOLD
CLAMP
CLAMP
CLAMP
CLAMP
VC
REG.
GCA
GCA
APC
LD DRV
CHAGE
PUMP
LEVEL
COMP
COMP
IC323 LC75342
– RF-240 Board –
IC001 SP3728AC
– MAIN Board –
IC201, IC101 TDA7296
RF IF
RF IN
CP
WIN
WPP
CN
A2
B2
C2
D2
D
C
B
A
E
F
G
H
VC
VPB
DVDPD
CDPD
VNB
LDSELO
DVDLD
CDLD
MEVO
PI
DENV
MIN
MP
MB
MLPF
MIRR
BYP2
PII
PI
TZC
DET
VCI
TZIN
TE
FE
TPH
MON
SRD
SWD
SCLK
SDEN
V33
RX
TPA
MEV
VNA
FNN
FNP
DIP
DIN
BYP
SIGO
VAP
AIP
AIN
ATON
ATOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18
19
20
21 22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
LDON
TENV
BIAS
ATT
FULL WAVE
AGC
CHARG
PUMP
PROGRAMBLE
EQ.FILTER
AGC
INPUT
BUS
CLAMP
HOLD
+
–
+
–
++
++
++
++
++
+
+
–
–
+
+ +
+ +
+
+–
+
+
–
–
+
+
–
+
–
–
EQ
PHASE
DET.
PHASE
DET.
EQ
EQ
EQ
GCA
GCA
DM
CM
BM
AM
EM
FM
GM
HM
GCA
OFFSET
A+C
B+D
A+D
B+C
G+H
E+F
G+H
E+F
VC
MUX
PD SEL
APC GAIN
LDEN
LD SEL.
MUX
BIAS
BIAS
BOTTOM
HOLD
OFFSET
OFFSET
OFFSET
SEL
HOLD
COMP
INV
RF HOLD EN
TPA
VC
VCI
2/3 VCI
VPC
CONTROL SIG
RF AGC HOLD
DENV
V33
BUTTOM
ERR
LEVEL
ADC
SELIAL
PORT
DECODER
MON
SEL
TE
RST
GCA
LPF
MUX
TOCR
2
TOCR
AMP
AMP
COMP
AMP
AMP
MRCR1
DF
VC
COMP
DEFECT
COMP
COMP
PI
FE&TE
SEL
LEVEL
GAC
2/3 VCI
TOCR
GCA
GCA
AGC
AGC
LPF
70kHz
70kHz
LPF
GCA
OFFSET
TOP
HOLD
OFFSET
OFFSET
OFFSET
OFFSET
VC
GCA
GCA
CBR
APC
LD DRV
CHAGE
PUMP
LEVEL
COMP
COMP
BIAS
BIAS
–
++
++
+
–
+
+
++
––
PI
OFFSET
OFFSET
TENV
IC001 SP3728ACB
Ver. 1.5
88
88
HCD-M700
6-29. Schematic Diagram – CONTROL Board (1/2) –
(Page 82)
(Page 83)
(Page 92)
(Page 94)
AEP,UK
HK
R606
R497
R495
R494
R493
R492
R491
R490
R489
R488
R487
R486
R481
R607
X402
X401
C404
C402
C403
C401 15p
20p
R498
R421
R425
R423
R422
R420
R419
R418
R417
IC306
R409
R407
R406
R405
R404
R403
R402
R412
R410
C601
R408
R401
R499
C430
R427
R429
R430
R432
R433
R435
R436
R437
R438
R440
R441
R442
R444
R445
R446
R447
R448
R449
CN605
IC302
C628
R600
R605
R454
R456
R457
R458
R459
R460
R465
R474
R475
R478
R479
C314
D333
D334
FB604
R319
FB623
Q637
Q635
R670
R672
R671
C673
C690
CN606
D601
FB634
CN602
FB606
FB607
CN604
• See page 59 for Waveforms.
Click on the first or last page to see other HCD-M700 service manuals if exist.