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Model
HCD-LX20I
Pages
48
Size
2.48 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
hcd-lx20i.pdf
Date

Sony HCD-LX20I Service Manual ▷ View online

HCD-LX20i
29
•  IC Pin Function Description
CD BOARD  IC101  TC94A70FG-006 (D, HZ (CD-MP3 PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
AVSS3
-
Ground terminal
2
RFZI
I
RF ripple zero crossing signal input terminal
3
RFRP
O
RF ripple signal output terminal
4
SBAD
O
Sub beam addition signal output terminal    Not used
5
FEO
O
Focus error signal output terminal    Not used
6
TEO
O
Tracking error signal output terminal
7
TEZI
I
Tracking error zero crossing signal input terminal
8
AVDD3
-
Power supply terminal (+3.3V)
9
FOO
O
Focus coil drive signal output terminal
10
TRO
O
Tracking coil drive signal output terminal
11
VREF
I
Reference voltage (+1.65V) input terminal
12
FMO
O
Sled motor drive signal output terminal
13
DMO
O
Spindle motor drive signal output terminal
14
VSSP3
-
Ground terminal
15
VCOI
I
VCO control voltage input terminal
16
VDDP3
-
Power supply terminal (+3.3V)
17
VDD1
-
Power supply terminal (+1.5V)
18
VSS1
-
Ground terminal
19
FGIN
I
FG signal input terminal    Not used
20
IN_SW
I
Disc inner position detection signal input terminal
21
/DFCT
O
Not used
22
XVSS3
-
Ground terminal
23
XI
I
System clock input terminal (16.934 MHz)
24
XO
O
System clock output terminal (16.934 MHz)
25
XVDD3
-
Power supply terminal (+3.3V)
26
DVSS3
-
Ground terminal
27
ROUT
O
Audio data (R-ch) output to the input selector
28
DVDD3
-
Power supply terminal (+3.3V)
29
DVR
O
Reference voltage (+1.65V) output terminal
30
LOUT
O
Audio data (L-ch) output to the input selector
31
DVSS3
-
Ground terminal
32
VDDT3
-
Power supply terminal (+3.3V)
33
VSS1
-
Ground terminal
34
VDD1
-
Power supply terminal (+1.5V)
35
VDDM1
-
Power supply terminal (+1.5V)
36
SRAMSTB
I
S-RAM standby mode control signal input terminal    Fixed at "L" in this set
37
XRST
I
Reset signal  input from the system controller    "L": reset
38 to 41
BUS0 to BUS3
I
Serial data input from the system controller
42
BUCK
I
Serial data transfer clock signal input from the system controller
43
XCCE
I
Chip enable signal input from the system controller
44
TEST
I
Setting terminal for test mode    Normally fi xed at "L"
45
IRQ
I
Interrupt request signal input terminal    Not used
46
ST_REQ/CKO 
O
Request signal output terminal    Not used
47
AOUT2
O
Audio data output terminal    Not used
48
REQ
O
Request signal output to the system controller
49
PIO1/ST_REQ
O
Not used
50
PIO2
O
Not used
51
GATE
I
Gate signal input terminal    Not used
52
VSS1
-
Ground terminal
53
VDDT3
-
Power supply terminal (+3.3V)
54
SBSY
O
Subcode block sync signal output to the system controller
55
FOK
O
Not used
56
IPF
O
Not used
HCD-LX20i
30
Pin No.
Pin Name
I/O
Description
57
/LOCK
O
Not used
58
ZDET
O
Zero detection signal output terminal    Not used
59
GPIN
I
Not used
60
MS
I
Micro controller interface mode selection signal input terminal    Fixed at "H" in this set
61
DOUT
O
Digital audio data output terminal    Not used
62
AOUT1
O
Audio data output terminal    Not used
63
BCKO
O
Bit clock signal output terminal    Not used
64
LRCKO
O
L/R sampling clock signal output terminal    Not used
65
AIN
I
Digital audio data input terminal    Not used
66
BCKI
I
Bit clock signal input terminal    Not used
67
LRCKI
I
L/R sampling clock signal input terminal    Not used
68
VDD1
-
Power supply terminal (+1.5V)
69
VSS1
-
Ground terminal
70
AWRC
-
Not used
71
PVDD3
-
Power supply terminal (+3.3V)
72
PDO
O
Phase error margin signal between EFM signal and PLCK signal output terminal
73
TMAXS
O
TMAX detection signal output terminal    Not used
74
TMAX
O
TMAX detection signal output terminal
75
LPFN
I
Inverted signal input from the operation amplifi er for PLL loop fi lter
76
LPFO
O
Signal output from the operation amplifi er for PLL loop fi lter
77
PVREF
I
Reference voltage (+1.65V) input terminal
78
VCOF
O
VCO fi lter output terminal
79
PVSS3
-
Ground terminal
80
SLCO
O
EFM slice level output terminal
81
RFI
I
RF signal input terminal
82
RFRPI
I
RF ripple signal input terminal
83
RFEQO
O
EFM slice level output terminal
84
VRO
O
Reference voltage (+1.65V) output terminal
85
RESIN
O
External resistor connection terminal
86
VMDIR
O
Reference voltage (+1.65V) output terminal for automatic power control circuit
87
TESTR
O
Low-pass fi lter terminal for RFEQO offset correction
88
AGCI
I
RF signal amplitude adjustment amplifi cation input terminal
89
RFO
O
RF signal generation amplifi cation output terminal
90
RVDD3
-
Power supply terminal (+3.3V)
91
LDO
O
Laser diode on/off control signal output to the automatic power control circuit    
"H": laser diode on
92
MDI
I
Light amount monitor input from the laser diode of optical pick-up block
93
RVSS3
-
Ground terminal
94
C
I
Main beam (C) input from the optical pick-up block
95
A
I
Main beam (A) input from the optical pick-up block
96
D
I
Main beam (D) input from the optical pick-up block
97
B
I
Main beam (B) input from the optical pick-up block
98
F
I
Sub beam (F) input from the optical pick-up block
99
TNPC
O
External capacitor connection terminal
100
E
I
Sub beam (E) input from the optical pick-up block
HCD-LX20i
31
PANEL BOARD  IC501  MB90F830PF-GE1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
O-USBRESET/
DAB1.2V
O
DAB +1.2V power supply on/off control signal output terminal    Not used
2
O-POWER
O
Main power on/off control signal output terminal     "H":  main power on
3
O-AMP-ON
O
Output muting on/off signal output to the power amplifi er
4
O-CD/USM 3.3V ON
O
CD power on/off control signal output terminal     "H":  CD power on
5
O-LED
O
LED drive signal output terminal for the LCD back light
6
I-RDS DS
I
RDS data input terminal    Not used
7
I-TU-DO
I
Serial data input from the AM/FM DET
8
O-CD-LOAD OUT
O
Motor drive signal output terminal for the loading section
9
I-RMC
I
Remote control signal input from the remote control receiver 
10
O-CD-LOAD IN
O
Motor drive signal output terminal for the loading section
11
O-FUNC SC
O
Serial data transfer clock signal output to the electrical volume
12
O-FUNC SD
O
Serial data output to the electrical volume
13
X0A
I
Sub system clock input terminal (32.768 kHz)
14
X1A
O
Sub system clock output terminal (32.768 kHz)
15
VCC
-
Power supply terminal (+3.1V)
16
VSS
-
Ground terminal
17 to 20
BUS0 to BUS3
O
Serial data output to the CD-MP3 processor
21
O-IPOD POWER
O
VBUS power supply on/off control signal output terminal
22
O-LED-STBY
O
LED drive signal output terminal for STANDBY indicator
23
O-CD-DR MUTE
O
Motor drive on/off control signal output to the motor/coil driver
24
I-CD REQ
I
Request signal input from the CD-MP3 processor
25
O-CD BUCK
O
Serial data transfer clock signal output to the CD-MP3 processor
26
O-CD CCE
O
Chip enable signal output to the CD-MP3 processor
27
O-CD RESET
O
System reset signal output to the CD-MP3 processor   "L": reset
28
O-USB SEL/
DAB 3.3VSEL
O
DAB +3.3V power supply on/off control signal output terminal    Not used
29
I-UXB TXD/DAB DO
I
Serial data input terminal    Not used
30
I-USB DO
I
Serial data input terminal    Not used
31
O-USB RXD/DAB DI
O
Serial data output terminal    Not used
32
AVCC
-
Power supply terminal (+3.2V)
33
I-IPOD TXD
I
Serial data input from the iPod connector
34
O-USB DI
O
Serial data output terminal    Not used
35
AVSS
-
Ground terminal
36
I-P-MONI
I
Power monitor signal input terminal
37, 38
I-KEY_1, I-KEY_2
I
Front panel key input terminal (A/D input)
39
I-KEY_3
I
Destination setting terminal 
40
I-SW CD CHECK/OUT
I
Switch detection signal input terminal for loading section
41
I-KEY WAKE UP
I
Front panel key input terminal (A/D input) for the power key
42
I-HOLD
I
Hold signal input terminal
43
I-CD SBSY
I
Subcode block sync signal input from the CD-MP3 processor
44
VSS
-
Ground terminal
45
I-RDS SC
I
Serial data transfer clock signal input from the RDS decoder
46
I-TU ANSD
I
Auto gain control signal input terminal
47
O-IPOD-RXD
O
Serial data output to the iPod connector
48
I-IPOD DETECT
I
iPod detection signal input terminal
49
SEL USB-IPOD
O
Function selection signal output terminal    Not used
50
SEL USB-WM/I-MODEL
O
Function selection signal output terminal    Not used
51 to 53
MD2 to MD0
-
Not used
54
RSTX
I
Reset signal input from the reset switch    "L": reset
55
O-TU-CE
O
Chip enable signal output to the AM/FM DET
56
O-TU-CLK
O
Serial data transfer clock signal output to the AM/FM DET
57
O-TU-DI
O
Serial data output to the AM/FM DET
58
VLCD
-
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive 
voltage
59 to 62
COM0 - COM3
O
Common drive signal output to the liquid crystal display
HCD-LX20i
32
Pin No.
Pin Name
I/O
Description
63, 64
SEG0, SEG1
O
Segment drive signal output to the liquid crystal display
65
VCC
-
Power supply terminal (+3.1V)
66
VSS
-
Ground terminal
67 to 89
SEG2 to SEG24
O
Segment drive signal output to the liquid crystal display
90
VCC
-
Power supply terminal (+3.1V)
91
VSS
-
Ground terminal
92
X1
I
Main system clock output terminal (6 MHz)
93
X0
O
Main system clock input terminal (6 MHz)
94 to 100
SEG25 to SEG31
O
Segment drive signal output to the liquid crystal display
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