Sony HCD-FR1K / HCD-FR8 / HCD-FR9 (serv.man2) Service Manual ▷ View online
37
HCD-FR1/FR8/FR9
DMB08 BOARD IC301 CXP973064-245R (MECHANISH CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
EEP SO
O
Not used
2
SDEN
O
Serial data enable signal output to DVD/CD RF amplifier
3
DOCTRL/ISBTEST
O
Digital out on/off control signal output to the digital signal processor
“L”: digital out off, “H”: digital out on
4
XRST DSD
O
Reset signal output to the DSD decoder “L”: reset
5
EEP SI
I/O
Two-way data bus with the EEPROM
6
EEP RDY
I
EEPROM ready signal input from the DVD decoder
7
FCS JMP 1
O
Focus jump 1 signal output to the motor/coil driver
8
FCS JMP 2
O
Focus jump 2 signal output to the motor/coil driver
9
SENS CD
I
Internal status (SENSE) signal input from the digital signal processor
10
CDSP2
O
Clock selection signal output to the digital signal processor
11
CDSP4
—
Not used
12
XCS DVD
O
Chip select signal output to the DVD decoder
13
VSS
—
Ground terminal (digital system)
14 to 21
D0 to D7
I/O
Two-way data bus with the DVD decoder
22
INIT0 DVD
I
Interrupt signal input from the DVD decoder
23
INIT1 DVD
I
Interrupt signal input from the DVD decoder
24
SCK DSD
O
Serial data transfer clock signal output to the DSD decoder
25
XRST DVD
O
Reset signal output to the DVD decoder “L”: reset
26
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
27
LAT CD
O
Serial data latch pulse signal output to the digital signal processor
28
LD ON
O
Laser diode on/off control signal output to the DVD/CD RF amplifier
“L”: laser diode off, “H”: laser diode on
29
MIRR
I
Mirror signal input from the digital signal processor
30
COUT CD
I
Numbers of track counted signal input from the digital signal processor
31
INLIM
I
Detection signal input from limit in switch The optical pick-up is inner position
when “H”
32
CS ZIVA
O
Chip select signal output to the DVD system processor
33
SI ZIVA
I
Serial data input from the DVD system processor
34
SO ZIVA
O
Serial data output to the DVD system processor
35
SCK ZIVA
O
Serial data transfer clock signal output to the DVD system processor
36
DRVIRQ
O
Interrupt request signal output to the DVD system processor
37
DRVRDY
O
Ready signal output to the DVD system processor
38
RST
I
System reset signal input from the DVD system processor “L”: reset
39
VSS
—
Ground terminal (digital system)
40
XTAL
I
System clock input terminal (20 MHz)
41
EXTAL
O
System clock output terminal (20 MHz)
42
VDD
—
Power supply terminal (+3.3V) (digital system)
43, 44
SLED A, SLED B
O
Sled motor drive signal output
45
JIT OFFSET
O
Output terminal for offset adjustment of APEO (
<z/.
pin of DVD decoder)
46
SDOUT DSD
O
Serial data output to the DSD decoder
47
SDIN DSD
I
Serial data input from the DSD decoder
48
READY DSD
I
Ready signal input from the DSD decoder “L”: ready
49
DATA CD
O
Serial data output to the digital signal processor
50
CLOK CD
O
Serial data transfer clock signal output to the digital signal processor
51
XMSLAT
O
Serial data latch pulse signal output to the DSD decoder
52
SQSO
I
Subcode Q data input from the digital signal processor
38
HCD-FR1/FR8/FR9
Pin No.
Pin Name
I/O
Description
53
MUTE DSD
O
Muting on/off control signal output to the DSD decoder “H”: muting on
54
SQCK
O
Subcode Q data reading clock signal output to the digital signal processor
55
VSS
—
Ground terminal (digital system)
56
TRAY IN
I
Disc tray in detection signal input terminal Not used
57
TRAY OUT
I
Disc tray out detection signal input terminal Not used
58
GFS DVD
I
Guard frame sync signal input from the DVD decoder
59
MUTE CD
O
Muting on/off control signal output to the digital signal processor “H”: muting on
60
MUTE 2D
O
Muting on/off control signal output to the motor/coil driver “H”: muting on
61
SLED
I
Sled motor servo drive PWM signal input terminal
62
FG
I
Spindle motor control signal input
63
SP ON
O
Muting on/off control signal output to the motor/coil driver “H”: muting on
64
JIT
I
Jitter signal input
65
TE
I
Tracking error signal input from the DVD/CD RF amplifier
66
PI
I
Pull in signal input from the DVD/CD RF amplifier
67
FE
I
Focus error signal input from the DVD/CD RF amplifier
68
AVSS
—
Ground terminal (for A/D converter)
69
AVREF
I
Reference voltage input terminal (for A/D converter)
70
AVDD
—
Power supply terminal (+3.3V) (for A/D converter)
71
GFS CD
I
Guard frame sync signal input from the digital signal processor
72
SCLK CD
O
SENSE serial data reading clock signal output to the digital signal processor
73
TSD-M
O
Thermal shut down signal output to the motor/coil driver
74
FOK CD
I
Focus OK signal input from the digital signal processor
75
LOCK CD
I
GFS is sampled by 460 Hz “H” input when GFS is “H”
76
LDSEL
O
Laser diode selection signal output
77
SACD/DVD
O
SACD/DVD selection signal output “L”: DVD, “H”: SACD
78
I2C SIO
I/O
Communication data bus with the DVD system processor and system controller
79
IIC-CLK
I/O
Communication data reading clock signal input or transfer clock signal output
with the DVD system processor and system controller
80
RXD
I
Serial data input from the RS-232C (for check)
81
TXD
O
Serial data output to the RS-232C (for check)
82
SDCLK RF
O
Serial data transfer clock signal output to the DVD/CD RF amplifier
83
SDATA RF
I/O
Two-way data bus with the DVD/CD RF amplifier
84
XWR
O
Write strobe signal output to the DVD decoder
85
XRD
O
Read strobe signal output to the DVD decoder
86
(PWE)
—
Not used
87
VDD
—
Power supply terminal (+3.3V) (digital system)
88
VSS
—
Ground terminal (digital system)
89 to 96
A0 to A7
O
Address signal output to the DVD decoder
97
A8
O
Motor/coil driver power save control signal output terminal Not used
98
XDRST
O
Reset signal output to the digital signal processor “L”: reset
99
EEP WP
O
Write protect signal output to the EEPROM
100
EEP CLK
I
Clock signal output to the EEPROM
39
HCD-FR1/FR8/FR9
DMB08 BOARD IC401 CXD3068Q (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
DVDD0
—
Power supply terminal (+3.3V) (digital system)
2
XRST
I
Reset signal input from the mechanism controller “L”: reset
3
MUTE
I
Muting on/off control signal input from the mechanism controller “H”: muting on
4
DATA
I
Serial data input from the mechanism controller
5
XLAT
I
Serial data latch pulse signal input from the mechanism controller
6
CLOK
I
Serial data transfer clock signal input from the mechanism controller
7
SENS
O
Internal status (SENSE) signal output to the mechanism controller
8
SCLK
I
SENSE serial data reading clock signal input from the mechanism controller
9
ATSK
I/O
Input/output terminal for anti-shock Not used
10
WFCK
O
Write frame clock signal output to the DVD decoder
11
RFCK
O
RFCK signal output terminal Not used
12
XPCK
O
XPCK signal output terminal Not used
13
GFS
O
Guard frame sync signal output to the mechanism controller
14
C2PO
O
C2 pointer signal output to the DVD decoder
15
SCOR
O
Subcode sync (S0+S1) detection signal output to the DVD decoder and
mechanism controller
16
C4M
O
4.2336 MHz clock signal output terminal Not used
17
WDCK
O
Guard subcode sync (S0+S1) detection signal output to the DVD decoder
18
DVSS0
—
Ground terminal (digital system)
19
COUT
O
Numbers of track counted signal output to the mechanism controller
20
MIRR
O
Mirror signal output to the mechanism controller
21
DFCT
I/O
Defect signal input/output terminal Not used
22
FOK
O
Focus OK signal output to the mechanism controller
23
PWMI
I
Spindle motor external control signal input terminal Not used
24
LOCK
O
GFS is sampled by 460 Hz “H” output when GFS is “H”
25
MDP
O
Spindle motor servo drive signal output to the DVD decoder
26
SSTP
I
Detection signal input from limit in switch The optical pick-up is inner position
when “H”
27
FSTO
O
2/3 divider output terminal Not used
28
DVDD1
—
Power supply terminal (+3.3V) (digital system)
29
SFDR
O
Sled servo drive PWM signal (+) output
30
SRDR
O
Sled servo drive PWM signal (–) output
31
TFDR
O
Tracking servo drive PWM signal (+) output
32
TRDR
O
Tracking servo drive PWM signal (–) output
33
FFDR
O
Focus servo drive PWM signal (+) output
34
FRDR
O
Focus servo drive PWM signal (–) output
35
DVSS1
—
Ground terminal (digital system)
36
TEST
I
Input terminal for the test
37
TES1
I
Input terminal for the test
38
VC
I
Middle point voltage (+1.65V) input terminal
39
FE
I
Focus error signal input from the DVD/CD RF amplifier
40
SE
I
Sled error signal input from the DVD/CD RF amplifier
41
TE
I
Tracking error signal input from the DVD/CD RF amplifier
42
CE
I
Middle point servo analog signal input
43
RFDC
I
RF signal input from the DVD/CD RF amplifier
44
ADIO
O
Output terminal for the test Not used
45
AVSS0
—
Ground terminal (analog system)
40
HCD-FR1/FR8/FR9
Pin No.
Pin Name
I/O
Description
46
IGEN
I
Stabilized current input for operational amplifiers
47
AVDD0
—
Power supply terminal (+3.3V) (analog system)
48
ASYO
O
EFM full-swing output terminal
49
ASYI
I
Asymmetry comparator voltage input terminal
50
RFAC
I
EFM signal input from the DVD/CD RF amplifier
51
AVSS1
—
Ground terminal (analog system)
52
CLTV
I
Internal VCO control voltage input terminal
53
FILO
O
Filter output for master PLL
54
FILI
I
Filter input for master PLL
55
PCO
O
Charge pump output for master PLL
56
AVDD1
—
Power supply terminal (+3.3V) (analog system)
57
BIAS
I
Asymmetry circuit constant current input terminal
58
VCTL
I
VCO control voltage input terminal for the wideband EFM PLL Not used
59
V16M
O
VCO oscillation output terminal for the wideband EFM PLL Not used
60
VPCO
O
Charge pump output terminal for the wideband EFM PLL Not used
61
DVDD2
—
Power supply terminal (+3.3V) (digital system)
62
ASYE
I
Asymmetry circuit on/off control signal input terminal “L”: off, “H”: on Not used
63
MD2
I
Digital out on/off control signal input from the mechanism controller
“L”: digital out off, “H”: digital out on
64
DOUT
O
Digital audio signal output to the digital audio interface IC
65
LRCK
O
L/R sampling clock signal (44.1 kHz) output to the DVD decoder
66
PCMD
O
Serial data output to the DVD decoder
67
BCLK
O
Bit clock signal (2.8224 MHz) output to the DVD decoder
68
EMPH
O
“L” is output when playback disc is emphasis off
“H” is output when playback disc is emphasis on Not used
69
XTSL
I
Input terminal for the system clock frequency setting
“L”: 16.9344 MHz, “H”: 33.8688MHz
70
DVSS2
—
Ground terminal (digital system)
71
XTAI
I
System clock input terminal (33.8688 MHz)
72
XTAO
O
System clock output terminal (33.8688 MHz) Not used
73
SOUT
O
Serial data output terminal Not used
74
SOCK
O
Serial data reading clock signal output terminal Not used
75
XOLT
O
Serial data latch pulse signal output terminal Not used
76
SQSO
O
Subcode Q data output to the mechanism controller
77
SQCK
I
Subcode Q data reading clock signal input from the mechanism controller
78
SCSY
I
Input terminal for resynchronism of guard subcode sync (S0+S1) Not used
79
SBSO
O
Subcode serial data output to the DVD decoder
80
EXCK
I
Subcode serial data reading clock signal input to the DVD decoder
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