Sony HCD-DZ7T Service Manual ▷ View online
65
HCD-DZ7T
IC901 STR-F6168-LF1352 (EXCEPT MX)
OCP/INH
1
S/GND
2
Drain
3
Vcc
4
FB/OLP
5
+
–
–
+
–
–
+
–
+
–
+
–
–
Delay
OVP
TSD
Delay
Reg2
Reg1
Reg3
Current mirror
POWER
MOS FET
MOS FET
Latch
OSC
Boottom Skip
Logic
OCP2
Logic
Logic
Internal
Bias
OCP1
Vocp
Rg3
Rg2
Rg1
OCP2
+
–
UVL0
ON=16V
OFF=10.5V
INH1
INH2
FB
Vth1
+
–
–
IOLP
Volp
Vth2
Vocp(BSIN,OUT)
IC901 STR-F6138-LF1352 (MX)
– POWER Board –
OVER
CURRENT
PROTECT
2
LOGIC
OSC
INTERNAL BIAS
DELAY
DELAY
LATCH
CURRENT
MIRROR
OVER
CURRENT
PROTECT
2
OVER
CURRENT
PROTECT
1
FEED
BACK
BACK
INH
2
INH
1
BOTTOM
SKIP
LOGIC
OCP/INH
1
S/GND
2
DRAIN
3
VCC
4
FB/OCP
5
UNDER VOLTAGE
LOCK OUT
OVER LOAD
PROTECT
THERMAL
SHUT DOWN
OVER VOLTAGE
PROTECT
SWITCHING
REGULATOR
BLOCK
Ver. 1.1
66
HCD-DZ7T
• IC Pin Function Description
MAIN BOARD IC1101 CXD9889R
(CD/DVD RF AMP, FOCUS/TRACKING ERROR AMP, DVD SYSTEM PROCESSOR, DIGTAL SERVO PROCESSOR)
MAIN BOARD IC1101 CXD9889R
(CD/DVD RF AMP, FOCUS/TRACKING ERROR AMP, DVD SYSTEM PROCESSOR, DIGTAL SERVO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
AGND
—
Ground terminal
2
DVDA
I
AC coupled input path A
3
DVDB
I
AC coupled input path B
4
DVDC
I
AC coupled input path C
5
DVDD
I
AC coupled input path D
6
DVDRFIP
I
AC coupled DVD RF signal input RFIP
7
DVDRFIN
I
Not used (Open)
8
NA
I
DC coupled main-beam RF signal input A
9
NB
I
DC coupled main-beam RF signal input B
10
MC
I
DC coupled main-beam RF signal input C
11
MD
I
DC coupled main-beam RF signal input D
12
SA
I
Not used (Open)
13
SB
I
Not used (Open)
14
SC
I
Not used (Open)
15
SD
I
Not used (Open)
16
CDFON
I
Not used (Open)
17
CDFOP
I
Not used (Open)
18
TNI
I
3 beam satellite PD signal negative input
19
TPI
I
3 beam satellite PD signal positive input
20
MDI1
I
Laser power monitor input
21
MDI2
I
Laser power monitor input
22
LDO2
O
Laser driver output
23
LDO1
O
Laser driver output
24
SVDD3
—
Power supply (RF+3.3V)
25
CSO
O
Not used (Open)
26
RFLVL
O
RFRP low pass output for jig
27
SGND
—
Ground terminal
28
V2REFO
O
Reference voltage 2.8V
29
V20
O
Reference voltage 2.0V
30
VREFO
O
Reference voltage 1.4V
31
FEO
O
Focus error monitor output for jig
32
TEO
O
Tracking error monitor output for jig
33
TEZISLV
O
TE Slicing Level
34
OP_OUT
O
Not used (Open)
35
OP_INN
I
Not used (Open)
36
OP_INP
I
Not used (Open)
37
DMO
O
Disc motor control output. PWM output
38
FMO
O
Feed motor control. PWM output
39
TROPENPWM
O
Tray PWM output / Tray open output
40
IOPMON
I
Iop Monitor
41
TRO
O
Tracking servo output
42
FOO
O
Focus servo output
43
VPLLVSS
—
Ground terminal
44
VPLLCAP
—
PLL External Capacitor
45
VPLLVDD3
—
Power supply (+3.3V from IC1105)
46
USB_VSS
—
Ground terminal
47
RESERVED
—
Not used (Open)
67
HCD-DZ7T
Pin No.
Pin Name
I/O
Description
48
RESERVED
—
Not used (Open)
49
USB_VDD3
—
Power supply (SW+3.3V)
50
SPFG
I
Spindle FG input
51
MSW
O
DVD/CD switch (H:DVD / L:CD)
52
CKSW
I
CKSW input
53
OCSW
I
OCSW input
54
EEWP
O
EEPROM Write Protect control (L:Write allowed)
55
DVDD18
—
Power supply (+1.8V from IC1110)
56 to 64
HA2 to 8, 18, 19
O
Host address bus 2 to 8, 18, 19 output to Flash ROM (IC1102)
65
DVDD3
—
Power supply (SW+3.3V)
66
XWR
O
Write enable output to Flash ROM (IC1102) (active Low)
67 to 75
HA16 to 9, 20
O
Host address bus 16 to 9, 20 output to Flash ROM (IC1102)
76
XROMCS
O
Chip select output to Flash ROM (IC1102) (active Low)
77
HA1
O
Host address bus 1 output to Flash ROM (IC1102)
78
XRD
O
Read enable output to Flash ROM (IC1102) (active Low)
79, 80
HD0,1
I/O
Host data bus 0,1 input/output for Flash ROM (IC1102)
81
DVSS
—
Ground terminal
82 to 86
HD2 to 6
I/O
Host data bus 2 to 6 input/output for Flash ROM (IC1102)
87
HA21
O
Host address bus 21 output to Flash ROM (IC1102)
88
RESERVED
—
Not used (Open)
89
HD7
I/O
Host data bus 7 input/output for Flash ROM (IC1102)
90
DVSS
—
Ground terminal
91, 92
HA17, 0
O
Host address bus 17, 0 output to Flash ROM (IC1102)
93
DVDD18
—
Power supply (+1.8V from IC1110)
94
RESERVED
—
Not used (Open)
95
RESERVED
—
Not used (Open)
96
DVDD3
—
Power supply (SW+3.3V)
97
IFSDO
O
Ext. CPU Serial data output (H/W method)
98
IFCK
O
Ext. CPU Serial clock (H/W method)
99
xIFCS
O
Chip select for Ext.CPU (Low Active, H/W method)
100
IFSDI
I
Ext. CPU Serial data input (H/W method)
101
SCL
O
IIC clock output to EEPROM
102
SDA
I/O
IIC data input/output for EEPROM
103
HDMI_SCL
O
HDMI DDC line SCL
104
HDMI_SDA
I/O
HDMI DDC line SDA
105
RXD
I
RS232C RXD signal input from Jig
106
TXD
O
RS232C TXD signal output to Jig
107
ICE
O
Not used (Open)
108
xSYSRST
I
Reset input from system controller (IC501) (active Low)
109
RESERVED
I
Not used (Open)
110
xTXINT
I
Not used (Fixed to “H” (SW+3.3V))
111
DQM0
O
Lower byte mask output to SDRAM (IC1104) (H:Mask / L:Enable)
112
IFBSY
I
Ready/Busy interrupt signal input from system controller (IC501) (H:Busy / L:Ready)
113 to 117
RD7 to 3
I/O
Data bus 7 to 3 input/output for SDRAM (IC1104)
118
DVDD3
—
Power supply (SW+3.3V)
119 to 129
RD2 to 0, 15 to 8
I/O
Data bus 2 to 0, 15 to 8 input/output for SDRAM (IC1104)
130
LIMITSW
I
LIMITSW signal input
131
DVDD3
—
Power supply (SW+3.3V)
132
DQM1
O
Upper byte mask output to SDRAM (IC1104) (H:Mask / L:Enable)
68
HCD-DZ7T
Pin No.
Pin Name
I/O
Description
133
RWE
O
Write enable output to SDRAM (IC1104)
134
CAS
O
Column address strobe output to SDRAM (IC1104)
135
RAS
O
Row address strobe output to SDRAM (IC1104)
136
RCS
O
Chip select output to SDRAM (IC1104)
137, 138
BA0, 1
O
Bank address 0, 1 output to SDRAM (IC1104)
139 to 141
RA10, 0, 1
O
Address bus 10, 0, 1 output to SDRAM (IC1104)
142
DVDD18
—
Power supply (+1.8V from IC1110)
143, 144
RA2, 3
O
Address bus 2, 3 output to SDRAM (IC1104)
145
DVDD3
—
Power supply (SW+3.3V)
146
DRCLK
O
Clock output to SDRAM (IC1104)
147
CKE
O
Clock enable output to SDRAM (IC1104)
148
DVSS
—
Ground terminal
149 to 155
RA11, 9 to 4
O
Address bus 11,9 to 4 output to SDRAM (IC1104)
156
DVDD3
—
Power supply (SW+3.3V)
157 to 159
SMPTE_Y[7] to [5]
O
Video data output bit7 to 5
160
DVDD18
—
Power supply (+1.8V from IC1110)
161 to 165
SMPTE_Y[4] to [0]
O
Video data output bit4 to 0
166
VCLK
O
27MHz synchronous clock output for Video data
167
MIC
I
Karaoke microphone detect signal (H:MIC exist / L:MIC removed)
168
TSD_M
I
TSD signal input
169
MUTE
O
Mute output for Spindle motor
170
DVDD3
—
Power supply (SW+3.3V)
171
MUTE123
O
Mute output for Focus/Tracking/Sleding
172, 173
REV, FWD
O
Direction control signal output for Loading motor
174
DVDD18
—
Power supply (+1.8V from IC1110)
175
RGB_SEL
O
RGB/YCbCr select output signal (H:RGB disable / L:RGB enable)
176
Fixed_low
O
Not used (Open)
177
WIDE
O
WIDE select output for Multi connector (H:16:9 / L:4:3)
178
DVSS
—
Ground terminal
179
VBUS_OE
O
Not used (Open)
180
xMAMUTE
O
Not used (Open)
181
VBUS_OC
I
Fixed to “H” (SW+3.3V)
182
R/Cr/Pr
O
CR/PR signal output
183
B/Cb/Pb
O
CB/PB signal output
184
DACVSSA
—
Ground terminal
185
Y/G
O
Y signal output
186
DACVDDA
—
Power supply (+3.3V from IC1105)
187
CVBS
O
Composite video signal output
188
DACVSSB
—
Ground terminal
189
C
O
Chroma signal output for S-Video
190
DACVDDB
—
Power supply (+3.3V from IC1105)
191
Y
O
Y signal output for S-Video
192
DACVSSC
—
Ground terminal
193
CIN
O
Not used (Open)
194
FS
I
Full Scale Adjustment
195
VREF
I
Bandgap Ref Voltage
196
DACVDDC
—
Power supply (+3.3V from IC1105)
197
ASDATA0
O
Audio serial data 4: Down-mixed L/R
198
TRG_SW
I
Not used (Fixed to “H” (SW+3.3V))
Click on the first or last page to see other HCD-DZ7T service manuals if exist.