Sony HCD-DZ7T Service Manual ▷ View online
73
HCD-DZ7T
Pin No.
Pin Name
I/O
Description
97
KEY0
I
Key input 0 input
98
Vref
—
Reference voltage (BUP+3.3V)
99
AVCC
—
Power supply (BUP+3.3V)
100
DIR_HDOUT
I
DIR data input
74
HCD-DZ7T
MAIN BOARD IC1701 CXD9873Q (HDMI DRIVE)
Pin No.
Pin Name
I/O
Description
1
DVSS
—
Ground terminal (digital system)
2 to 9
C0 to C7
I
Not used (Fixed to “L”)
10
DVDD33
—
Power supply terminal (+3.3V) (digital system)
11
VCK
I
System clock (27 MHz) signal input from the servo DSP
12
DVSS
—
Ground terminal (digital system)
13 to 20
Y0 to Y7
I
Video signal input from the servo DSP
21
SSCK
I
Serial data transfer clock signal input from the servo DSP
22
SSO
I/O
Two-way data bus with the servo DSP
23
DVDD18
—
Power supply terminal (+1.8V) (for digital core)
24
PWDN
I
Power down signal input from the servo DSP “L”: power down
25
RST
I
Reset signal input from the servo DSP “L”: reset
26
CLK
I
System clock (27 MHz) signal input terminal
27
INT
O
Not used (Open)
28
DVSS
—
Ground terminal (digital system)
29, 30
A7, A6
—
Not used (Open)
31 to 33
TRAP2 to TRAP0
—
Not used (Fixed to “L”)
34
MSCK
I
Not used (Open)
35
MSD
I/O
Not used (Open)
36
TYPE
—
Not used (Open)
37
ASDATA4
—
Not used (Open)
38
VSYNC
I
Not used (Fixed to “L”)
39
HSYNC
I
Not used (Fixed to “L”)
40
HTPLG
I
HDMI hot-plug detection signal input terminal
41
AVSS
—
Ground terminal (analog system)
42
PLLC0
—
Not used (Open)
43
PLLC1
—
External capacitor connection terminal (for PLL)
44, 45
PLL_AVDD3
—
Power supply terminal (+3.3V) (analog system) (for PLL)
46, 47
AVSS
—
Ground terminal (analog system)
48
TCKN
O
TMDS clock signal (negative) output to the HDMI OUT connector
49
TCKP
O
TMDS clock signal (positive) output to the HDMI OUT connector
50
AVDD3
—
Power supply terminal (+3.3V) (analog system)
51
TX0N
O
TMDS data (negative) output to the HDMI OUT connector
52
TX0P
O
TMDS data (positive) output to the HDMI OUT connector
53
AVSS
—
Ground terminal (analog system)
54
TX1N
O
TMDS data (negative) output to the HDMI OUT connector
55
TX1P
O
TMDS data (positive) output to the HDMI OUT connector
56
AVDD3
—
Power supply terminal (+3.3V) (analog system)
57
TX2N
O
TMDS data (negative) output to the HDMI OUT connector
58
TX2P
O
TMDS data (positive) output to the HDMI OUT connector
59
AVSS
—
Ground terminal (analog system)
60
SWING
I
Not used (Fixed to “H” (+3.3V LINE))
61
DAC_AVDD3
—
Power supply terminal (+3.3V) (analog system) (for D/A converter)
62
VREF
—
Reference voltage terminal (for D/A converter)
63
FS
—
Full scale adjustment terminal (for D/A converter)
64
AVSS
—
Ground terminal (analog system) (for D/A converter)
65
DAC_AVDD3
—
Power supply terminal (+3.3V) (analog system) (for D/A converter)
66
AVSS
—
Ground terminal (analog system) (for D/A converter)
67
DAC_AVDD3
—
Power supply terminal (+3.3V) (analog system) (for D/A converter)
75
HCD-DZ7T
Pin No.
Pin Name
I/O
Description
68
G
O
Not used (Open)
69
AVSS
—
Ground terminal (analog system) (for D/A converter)
70
B
O
Not used (Open)
71
R
O
Not used (Open)
72
SPDIF
I
SPDIF digital audio signal input from the servo DSP
73
AD3
I
Audio serial data input from the servo DSP
74 to 76
AD2 to AD0
I
Not used (Fixed to “L”)
77
ACK
I
Master clock signal input from the servo DSP
78
ABCK
I
Bit clock signal input from the servo DSP
79
ALRCK
I
L/R sampling clock signal input from the servo DSP
80
DVDD18
—
Power supply terminal (+1.8V) (for digital core)
76
HCD-DZ7T
DSP BOARD IC002 ADSST-AVR-1115 (DIGITAL AUDIO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
VDDINT
—
Power supply terminal (+1.2V) (for core)
2
CLKCFG0
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at “L” in this set
3
CLKCFG1
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at “H” (+3.3V LINE) in this set
4, 5
BOOTCFG0,BOOTCFG1
I
Boot mode selection signal input terminal Fixed at “H” (+3.3V LINE) in this set
6
GND
—
Ground terminal
7
VDDEXT
—
Power supply terminal (+3.3V) (for I/O)
8
GND
—
Ground terminal
9
VDDINT
—
Power supply terminal (+1.2V) (for core)
10
GND
—
Ground terminal
11
VDDINT
—
Power supply terminal (+1.2V) (for core)
12
GND
—
Ground terminal
13
VDDINT
—
Power supply terminal (+1.2V) (for core)
14
GND
—
Ground terminal
15
INT_REQ
O
Interrupt signal output to the system controller
16
DIR_ERR
I
PLL lock error signal and data error flag input from the digital audio interface
17
AD7
I/O
Not used (Open)
18
GND
—
Ground terminal
19
VDDINT
—
Power supply terminal (+1.2V) (for core)
20
GND
—
Ground terminal
21
VDDEXT
—
Power supply terminal (+3.3V) (for I/O)
22
GND
—
Ground terminal
23
VDDINT
—
Power supply terminal (+1.2V) (for core)
24 to 26
AD6 to AD4
I/O
Not used (Open)
27
VDDINT
—
Power supply terminal (+1.2V) (for core)
28
GND
—
Ground terminal
29, 30
AD3, AD2
I/O
Two-way address and data bus terminal Not used
31
VDDEXT
—
Power supply terminal (+3.3V) (for I/O)
32
GND
—
Ground terminal
33, 34
AD1, AD0
I/O
Not used (Open)
35
WR
O
Not used (Open)
36, 37
VDDINT
—
Power supply terminal (+1.2V) (for core)
38
GND
—
Ground terminal
39
RD
O
Not used (Open)
40
ALE
O
Not used (Open)
41 to 43
AD15 to AD13
I/O
Not used (Open)
44
GND
—
Ground terminal
45
VDDEXT
—
Power supply terminal (+3.3V) (for I/O)
46
AD12
I/O
Not used (Open)
47
VDDINT
—
Power supply terminal (+1.2V) (for core)
48
GND
—
Ground terminal
49 to 52
AD11 to AD8
I/O
Not used (Open)
53
A16
—
Not used (Open)
54
VDDINT
—
Power supply terminal (+1.2V) (for core)
55
GND
—
Ground terminal
56, 57
A17, A18
—
Not used (Open)
58
GND
—
Ground terminal
Click on the first or last page to see other HCD-DZ7T service manuals if exist.