Sony HBD-EF1100 Service Manual ▷ View online
HBD-EF1100
61
IC1001 H27U2G8F2CTR-BCR (MB1002 BOARD (1/6))
48 NC
47 NC
46 NC
45 NC
44 IO8
43 IO7
42 IO6
41 IO5
40 NC
39 NC
38 NC
37 VCC
36 VSS
35 NC
34 NC
33 NC
32 IO4
31 IO3
30 IO2
29 IO1
28 NC
27 NC
26 NC
25 NC
47 NC
46 NC
45 NC
44 IO8
43 IO7
42 IO6
41 IO5
40 NC
39 NC
38 NC
37 VCC
36 VSS
35 NC
34 NC
33 NC
32 IO4
31 IO3
30 IO2
29 IO1
28 NC
27 NC
26 NC
25 NC
1
NC
2
NC
3
NC
4
NC
5
NC
6
NC
10
NC
11
NC
12
VCC
13
VSS
14
NC
15
NC
16
CLE
17
ALE
20
NC
21
NC
22
NC
23
NC
24
NC
7
RY / BY
8
RE
9
CE
18
WE
19
WP
I/O
Control circuit
Status register
Address register
Command register
Logic control
Control circuit
Memory cell array
Sense amp
Data register
Column decoder
Column buffer
Row address buffer decoder
Row address decoder
HV generator
RY/BY
HBD-EF1100
62
• IC Pin Function Descriptions
MB1002 BOARD (1/6), (3/6), (4/6) IC101 CXD90019R-BA (BD DECODER)
MB1002 BOARD (1/6), (3/6), (4/6) IC101 CXD90019R-BA (BD DECODER)
Pin No.
Pin Name
I/O
Description
P1
TRINB
I
Input of Tracking Signal (B)
P2
TRINA
I
Input of Tracking Signal (A)
P3
HAVC
O
Decoupling Pin for Reference Voltage of Main and Sub Beams
P4
AVDD33_1
-
3.3 V Power Pin
P5
INB
I
Input of Main Beam Signal (B)
P6
INA
I
Input of Main Beam Signal (A)
P7
IND
I
Input of Main Beam Signal (D)
P8
INC
I
Input of Main Beam Signal (C)
P9
ING
I
Input of Main Beam Signal (G)
P10
INH
I
Input of Main Beam Signal (H)
P11
INF
I
Input of Main Beam Signal (F)
P12
INE
I
Input of Main Beam Signal (E)
P13
V14
O
Output of Voltage Reference (1.4 V)
P14
AUX1
I/O
Auxiliary Input
Alternative function: Signal Monitoring
Alternative function: Signal Monitoring
P15
MPXOUT1
O
Multiplexer Output 1 for Signal Monitoring. The pin is not allowed to pull-up in circuit layout.
Alternative function: Internal monitored signal output / General output.
Alternative function: Internal monitored signal output / General output.
P16
MPXOUT2
O
Multiplexer Output 2 for Signal Monitoring. The pin is not allowed to pull-up in circuit layout.
Alternative function: Internal monitored signal output / General output.
Alternative function: Internal monitored signal output / General output.
P17
MPXOUT3
O
Multiplexer Output 3 for Signal Monitoring. The pin is not allowed to pull-up in circuit layout.
Alternative function: Internal monitored signal output / General output.
Alternative function: Internal monitored signal output / General output.
P18
RFIP
I
Differential Input of AC Coupling RF SUM Signal (Positive)
P19
RFIN
I
Differential Input of AC Coupling RF SUM Signal (Negative)
P20
RFIP2
I
Differential Input of AC Coupling RF SUM Signal (Positive)
P21
RFIN2
I
Differential Input of AC Coupling RF SUM Signal (Negative)
P22
AVDD12_2
-
1.2 V Power Pin
P23
AVDD33_3
-
3.3 V Power Pin
P24
FOO
O
Focus servo output. PDM output of focus servo compensator.
P25
TRO
O
Tracking servo output. PDM output of tracking servo compensator.
P26
TLO
O
Tilt servo output
P27
DVCC12_K_1
-
1.2V Digital Power
P28
FEOSCEN
I/O
High frequency modulation enable signal output, or LDD serial interface CLK or I2C SCL.
The pin is spike-free at power-on stage.
The pin is spike-free at power-on stage.
P29
FEGAINSW3
O
Read gain switch 3.
P30
FECFREQ
I/O
Frequency selection signal output, or LDD serial interface data or I2C SDA.
The pin is spike-free at power-on stage.
The pin is spike-free at power-on stage.
P31
FECMOD
I/O
High frequency modulation mode selection signal output, or LDD serial interface command
enable.
The pin is spike-free at power-on stage.
enable.
The pin is spike-free at power-on stage.
P32
FEGAINSW1
O
Read gain switch 1.
P33
FEGAINSW2
O
Read gain switch 2.
P34
FEFMO
I/O
Feed motor 4 control. DAC output.
Alternative function: Auxiliary servo input
Alternative function: Auxiliary servo input
P35
FEFMO2
O
Feed motor 2 control. DAC output.
P36
DVCC33_IO_1
-
3.3V Digital IO Power
P37
FEFMO3
I/O
Feed motor 3 control. DAC output.
Alternative function: Auxiliary servo input
Alternative function: Auxiliary servo input
P38
FEFMO4
I/O
Feed motor 4 control. DAC output.
Alternative function: Auxiliary servo input
Alternative function: Auxiliary servo input
P39
FETRAYPWM
O
Tray DAC / PWM control input. Controlled by uP.
P40
FEDMO
O
Disk motor control output. DAC output.
P41
FEFG
I
Motor Hall sensor input.
P42
DVCC12_K_2
-
1.2V Digital Power
HBD-EF1100
63
Pin No.
Pin Name
I/O
Description
P43
FEGIO0
I/O
LDD serial interface data. The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
General IO
The pin is not allowed to pull-up in circuit layout.
General IO
P44
FEGIO1
I/O
PC RS232 serial receive data. The pin is spike-free at power-on stage.
P45
FEGIO5
O
General IO
P46
DVCC33_IO_2
-
3.3V Digital IO Power
P47
FEGIO7
I/O
General IO. The pin is spike-free at power-on stage. The pin is not allowed to pull-up in
circuit layout.
circuit layout.
P48
FEGIO6
O
Read gain switch 6. The pin is not allowed to pull-up in circuit layout.
General IO
General IO
P49
FEGIO4
O
Read gain switch 4
General IO
General IO
P50
FEGIO9
I/O
General IO. The pin is spike-free at power-on stage.
General IO
General IO
P51
FEGIO10
I/O
PC RS232 serial receive data. The pin is spike-free at power-on stage.
P52
FEGIO11
I/O
PC RS232 serial transmit data. The pin is spike-free at power-on stage.
P53
FETRAYIN_
I
A logical Low indicates the Tray is IN
P54
FEGIO3
I/O
LED Control Output. Initial 0 Output. The pin is spike-free at power-on stage.
General IO
General IO
P55
USB_DM_P1
I/O
USB port1 differential serial data bus (minus)
P56
USB_DP_P1
I/O
USB port1 differential serial data bus (plus)
P57
USB_VRT_P1
-
USB port1 reference resistor
P58
AVDD33_USB_P1
-
3.3V Analog power for USB port1
P59
EFPWRQ
-
2.5 V power for E-fuse programming
P60
DVCC12_K_3
-
1.2V Digital Power
P61
DVCC33_IO_3
-
3.3V Digital IO Power
P62
SCL
I
USB over current Protection indication
P63
SDA
I
USB PCONT
P64
SPDIF_IN1
I
HDMI ARC SPDIF input
P65
NFD0
I/O
NAND Flash Data input/output bit0
P66
NFD1
I/O
NAND Flash Data input/output bit1
P67
NFD2
I/O
NAND Flash Data input/output bit2
P68
NFD3
I/O
NAND Flash Data input/output bit3
P69
NFD4
I/O
NAND Flash Data input/output bit4
P70
NFD5
I/O
NAND Flash Data input/output bit5
P71
NFD6
I/O
NAND Flash Data input/output bit6
P72
DVCC33_IO_4
-
3.3V Digital IO Power
P73
NFD7
I/O
NAND Flash Data input/output bit7
P74
NFRBN
I/O
NAND Flash ready / busy
P75
NFREN
I/O
NAND Flash read enable
P76
NFCEN
I/O
NAND Flash chip enable
P77
NFCLE
I/O
NAND Flash command latch enable
P78
NFALE
I/O
NAND Flash address latch enable
P79
NFWEN
I/O
NAND Flash write enable
P80
DVCC12_K_4
-
1.2V Digital Power
P81
DDRVCCK_1
-
1.2V Digital Power
P82
RDQ4
I/O
Memory data bit 4
P83
RDQ6
I/O
Memory data bit 6
P84
RDQ2
I/O
Memory data bit 2
P85
DDRVCCIO_1
-
1.5V Digital IO Power
P86
RDQ0
I/O
Memory data bit 0
P87
RDQ11
I/O
Memory data bit 11
P88
RDQ9
I/O
Memory data bit 9
P89
RDQ13
I/O
Memory data bit 13
P90
RDQ15
I/O
Memory data bit 15
HBD-EF1100
64
Pin No.
Pin Name
I/O
Description
P91
RDQM1
O
Memory data mask bit 1
P92
DDRVCCK_2
-
1.2V Digital Power
P93
DDRVREF
I
Memory VREF
P94
RDQS0
I/O
Memory positive data strobe bit 0
P95
RDQS0_
I/O
Memory negative data strobe bit 0
P96
DDRVCCIO_2
-
1.5V Digital IO power
P97
RCLK0_
O
Memory clock 0 negative
P98
RCLK0
O
Memory clock 0 positive
P99
RDQM0
O
Memory data mask bit 0
P100
RDQS1
I/O
Memory positive data strobe bit 1
P101
RDQS1_
I/O
Memory negative data strobe bit 1
P102
DDRVCCIO_3
-
1.5V Digital IO power
P103
RDQ12
I/O
Memory data bit 12
P104
RDQ14
I/O
Memory data bit 14
P105
RDQ10
I/O
Memory data bit 10
P106
RDQ8
I/O
Memory data bit 8
P107
RDQ1
I/O
Memory data bit 1
P108
DDRVCCIO_4
-
1.5V Digital IO Power
P109
RDQ3
I/O
Memory data bit 3
P110
RDQ7
I/O
Memory data bit 7
P111
RDQ5
I/O
Memory data bit 5
P112
DDRVCCK_3
-
1.2V Digital Power
P113
AVDD33_MEMPLL
-
3.3 V Analog Power for MEMPLL
P114
TP_MEMPLL
-
Test Pin
P115
TN_MEMPLL
-
Test Pin
P116
RCKE
O
Memory clock enable
P117
RA10
O
Memory address bit 10
P118
RBA1
O
Memory bank address bit 1
P119
RA4
O
Memory address bit 4
P120
RA1
O
Memory address bit 1
P121
RA6
O
Memory address bit 6
P122
RA8
O
Memory address bit 8
P123
DDRVCCIO_5
-
1.5V Digital IO Power
P124
RA11
O
Memory address bit 11
P125
RA12
O
Memory address bit 12
P126
RRAS_
O
Memory row address strobe
P127
RCAS_
O
Memory column address strobe
P128
RCS_
O
Memory chip select
P129
DDRVCCIO_6
-
1.5V Digital IO Power
P130
RWE_
O
Memory write enable
P131
RA0
O
Memory address bit 0
P132
RA13
O
Memory address bit 13
P133
RA9
O
Memory address bit 9
P134
RRESET
O
Memory reset
P135
RA7
O
Memory address bit 7
P136
RA2
O
Memory address bit 2
P137
RA5
O
Memory address bit 5
P138
RA3
O
Memory address bit 3
P139
RBA2
O
Memory bank address bit 2
P140
RBA0
O
RBA0
P141
RODT
O
Memory on die termination enable
P142
RCSX_
O
Memory chip select
P143
DDRVCCIO_7
-
1.5V Digital IO Power
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