Sony DHC-FLX9W / HCD-FLX9W Service Manual ▷ View online
97
HCD-FLX9W
IC612
PCM1609KPTR
SYSTEM
CLOCK
MANAGER
FUNCTION
CONTROL
INTERFACE
SERIAL
INPUT
INTERFACE
4X/8X
OVER SAMPLING
DIGITAL
FILTER
WITH
FUNCTION
CONTROLLER
ENHANCED
MULTI-
LEVEL
DELTA-
SIGMA
MOJULE
ZERO DETECT
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
DAC
LPF
RST
SCKI
SCKO
BCK
TEST
VDD
DGND
DATA1
DATA2
DATA3
ZEROA
LRCK
37
38
39
40
42
43
44
45
46
47
48
41
ZERO1/GPO1
ZERO2/GPO2
ZERO3/GPO3
ZERO4/GPO4
ZERO5/GPO5
ZERO6/GPO6
NC
NC
VOUT6
VOUT5
VOUT4
VOUT3
1
2
3
4
5
6
7
8
9
10
11
12
VOUT2
VOUT1
VCOM
VOUT7
AGND5
VCC5
AGND6
VOUT8
AGND4
VCC4
AGND3
VCC3
13
14
15
16
17
18
19
20
21
22
23
24
ML
MC
MDI
MDO
ZERO8
DATA4
ZERO7
NC
VCC1
AGND1
VCC2
AGND2
36 35 34 33
31
32
30
29
28
27
26
25
– TX Board –
IC7001
TK11225CMCL-G
1
2
3
6
4
CONT
GND
NP
VIN
5
GND
VOUT
CONTROL
CIRCUIT
BANDGAP
REFERENCE
CONSTANT
CURRENT
SOURCE
OVER HEAT &
OVER CURRENT
PROTECT
98
HCD-FLX9W
IC7002
CXD4016R
LRCK 49
BCK 50
BCKOUT 51
LRCKOUT 52
CK12 53
CSST 54
VSS 55
VSS 58
XTCK4 60
XSM 61
MST 62
XTST 63
XRST 64
VDD
OSCI 57
56
OSCO 59
AUDIO
INTERFACE
READ-
SOLOMON
PARITY
GENERATOR
PLL
CLOCK
GENERATOR
DTIN
48
DT2 INF
47
APS
41
VSS
40
VDD
APX
39
APVGS
42
APCPO
43
38
PLVAR
37
PLREF
36
TEST5
33
TEST6
34
TEST7
35
VCOT
46
APAVS
45
APAVD
44
MODULATOR
D/A
CONVERTER
BUFFER
RAM
DAVRO
25
VDD
26
VSS
20
VDD
19
VSS
27
TEST0
28
DACK
18
DAPD
17
TEST1
29
TEST2
30
TEST3
31
TEST4
32
DAVREF
24
DAAVS
23
DAAVD
22
DAAOUT
21
CLOCK
SELECTOR
TESTMD
1
SMCK
2
IFEXMD
3
IIFSEL1
4
IIFSEL0
5
EXCKSEL
6
CHNM BL
7
DIVCODE
8
PCMID
9
EMPIN
10
VDD
11
VSS
12
SCLK
13
XSCEN
14
SWDT
15
CSOD
16
CONTROLLER
– SP RELAY Board –
IC840
SI-8033JF
OVER
CURRENT
PROTECTOR
LATCH
&
DRIVER
OVER HEAT
PROTECTOR
REGULATOR
ON/OFF
SOFT
START
+
–
–
+
–
–
RESET
VREF
COMPARATOR
ERROR AMP
OSC
1
VIN
2
SW OUT
3
GND
4
VOS
5
ON/OFF
– CLAMP MOTOR Board –
IC701
BA6956AN
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
– LOADING MOTOR Board –
IC702
BA6956AN
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
– CD MOTOR Board –
IC302
BA6956AN
1
2
3
4
5
6
7
8
9
CONTROL LOGIC
TSD
VREF
OUT2
OUT1
RNF
VM
VCC
FIN
GND
RIN
99
HCD-FLX9W
– MIC Board –
IC351
NJM4580E-D
1
2
3
4
5
6
7
8
A OUT
A –IN
A +IN
V–
V+
B OUT
B –IN
B +IN
A
B
IC352
M65850FP-E1
OSCILLATOR
1/2 VCC
AUTO
RESET
LPF1
MAIN
CONTROL
A/D
20KBIT
SRAM
LPF2
D/A
1
2
3
4
5
6
7
8
9
10
14
13
12
11
CLOCK
RESET
MO
MI
D1
DO0
DO1
VCC
CLOCK
REF
OP2IN
OP2OUT
LPF2IN
LPF2OUT
LPF1IN
LPF1OUT
OP1OUT
OP1IN
CC1
CC2
GND
– VIDEO Board –
IC701
MM1568
4dB
4dB
VCC2
75
Ω
DRIVER
LPF
LPF
LPF
75
Ω
DRIVER
2dB
4dB
2dB
75
Ω
DRIVER
2dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
4dB
2dB
CIN
2
VIN
4
MUTE1
3
YC MIX
5
YIN
6
BIAS
7
GND1
8
NC
9
GND1 10
NC 11
CYIN 12
CLP 13
CbIN 14
CrIN 16
GND2 17
MUTE2 15
VCC1
1
34
CrSAG
18
CrOUT
19
CbSAG
21
GND2
20
CbOUT
22
CYSAG
24
GND2
23
GND2
26
CYOUT
25
YSAG
27
YOUT
28
VSAG
30
GND2
29
GND2
32
VOUT
31
COUT
33
+
BIAS
BIAS
BIAS
BIAS
BIAS
CLAMP
CLAMP
CLAMP
LPF
LPF
LPF
100
HCD-FLX9W
•
IC Pin Function Description
MB BOARD IC206 ZIVA5X-C1F (DVD SYSTEM PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
VDDP
—
Power supply terminal (+3.3V)
2
HA1
O
Address signal output to the program ROM and bus interface
3 to 11
HAD15 to HAD7
I/O
Two-way data bus with the program ROM and bus interface
12
VDDP
—
Power supply terminal (+3.3V)
13
GNDP
—
Ground terminal
14 to 19
HAD6 to HAD1
I/O
Two-way data bus with the program ROM and bus interface
20
VDDP
—
Power supply terminal (+3.3V)
21
GNDP
—
Ground terminal
22
HAD0
I/O
Two-way data bus with the program ROM and bus interface
23
HDTACK
I
Acknowledge signal input terminal for host data transfer Not used
24
HIRQ0
I
Interrupt signal input terminal Not used
25
WEH.UDS
O
Write enable host upper data strobe signal output to the program ROM
26
WEL.LDS
O
Write enable host lower data strobe signal output terminal Not used
27
HREAD
O
Output enable signal output to the program ROM
28
GPIO0 (1)
I
Check jig detection signal input terminal
29
GND
—
Ground terminal
30
VDD
—
Power supply terminal (+1.8V)
31
GND25
—
Ground terminal
32
VDD25
—
Power supply terminal (+3.3V)
33 to 42
MA9 to MA0
O
Address signal output to the SD-RAM
43
GND25
—
Ground terminal
44
VDD25
—
Power supply terminal (+3.3V)
45, 46
MA10, MA11
O
Address signal output to the SD-RAM
47, 48
BA1, BA0
O
Bank select signal output to the SD-RAM
49
MCS0
O
Chip select signal output to the SD-RAM
50
MCS1
O
Chip select signal output terminal Not used
51
MRAS
O
Row address strobe signal output to the SD-RAM
52
MCAS
O
Column address strobe signal output to the SD-RAM
53
MWE
O
Write enable signal output to the SD-RAM
54
GND25
—
Ground terminal
55
VDD25
—
Power supply terminal (+3.3V)
56
MCLK
O
Clock signal output to the SD-RAM
57 to 60
MD0 to MD3
I/O
Two-way data bus with the SD-RAM
61
GND25
—
Ground terminal
62
MDQM0
O
Write mask signal output to the SD-RAM
63
VDD25
—
Power supply terminal (+3.3V)
64 to 71
MD4 to MD11
I/O
Two-way data bus with the SD-RAM
72
GND25
—
Ground terminal
73
MDQM1
O
Write mask signal output to the SD-RAM
74
VDD25
—
Power supply terminal (+3.3V)
75 to 78
MD12 to MD15
I/O
Two-way data bus with the SD-RAM
79
GND
—
Ground terminal
80
VDD
—
Power supply terminal (+1.8V)
81 to 84
MD16 to MD19
I/O
Two-way data bus with the SD-RAM
85
GND25
—
Ground terminal
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