Sony DHC-EX77MD / DHC-MD77 / MDS-EX77 / MDS-EX770 Service Manual ▷ View online
– 61 –
Pin No. Pin Name
I / O
Function
40
DVSS
—
Ground terminal (digital system)
41
XOE
O
Output enable signal output to the external D-RAM Not used (open)
42
XCAS
O
Column address strobe signal output to the external D-RAM Not used (open)
43
A09
O
Address signal output to the external D-RAM Not used (open)
44
XRAS
O
Row address strobe signal output to the external D-RAM Not used (open)
45
XWE
O
Write enable signal output to the external D-RAM Not used (open)
46
D1
I/O
47
D0
I/O
48
D2
I/O
49
D3
I/O
50
MVCI
I
Digital in PLL oscillation input from the external VCO Not used (fixed at “L”)
51
ASYO
O
Playback EFM full-swing output
52
ASYI
I (A)
Playback EFM asymmetry comparator voltage input
53
AVDD
—
Power supply terminal (+3.3V) (analog system)
54
BIAS
I (A)
Playback EFM asymmetry circuit constant current input
55
RFI
I (A)
Playback EFM RF signal input from the CXA2523R (IC101)
56
AVSS
—
Ground terminal (analog system)
57
PDO
O (3)
Phase comparison output for clock playback analog PLL of the playback EFM Not used (open)
58
PCO
O (3)
Phase comparison output for master clock of the recording/playback EFM master PLL
59
FILI
I (A)
Filter input for master clock of the recording/playback master PLL
60
FILO
O (A)
Filter output for master clock of the recording/playback master PLL
61
CLTV
I (A)
Internal VCO control voltage input of the recording/playback master PLL
62
PEAK
I (A)
Light amount signal (RF/ABCD) peak hold input from the CXA2523R (IC101)
63
BOTM
I (A)
Light amount signal (RF/ABCD) bottom hold input from the CXA2523R (IC101)
64
ABCD
I (A)
Light amount signal (ABCD) input from the CXA2523R (IC101)
65
FE
I (A)
Focus error signal input from the CXA2523R (IC101)
66
AUX1
I (A)
Auxiliary signal (I
3
signal/temperature signal) input from the CXA2523R (IC101)
67
VC
I (A)
Middle point voltage (+1.65V) input from the CXA2523R (IC101)
68
ADIO
O (A)
Monitor output of the A/D converter input signal Not used (open)
69
AVDD
—
Power supply terminal (+3.3V) (analog system)
70
ADRT
I (A)
A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)
71
ADRB
I (A)
A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)
72
AVSS
—
Ground terminal (analog system)
73
SE
I (A)
Sled error signal input from the CXA2523R (IC101)
74
TE
I (A)
Tracking error signal input from the CXA2523R (IC101)
75
AUX2
I (A)
Auxiliary signal input terminal Not used (fixed at “L”)
76
DCHG
I (A)
Connected to the +3.3V power supply
77
APC
I (A)
Error signal input for the laser automatic power control Not used (fixed at “L”)
78
ADFG
I
ADIP duplex FM signal (22.05 kHz
±
1 kHz) input from the CXA2523R (IC101)
79
F0CNT
O
Filter f0 control signal output to the CXA2523R (IC101)
80
XLRF
O
Serial latch signal output to the CXA2523R (IC101)
81
CKRF
O
Serial clock signal output to the CXA2523R (IC101)
82
DTRF
O
Writing data output to the CXA2523R (IC101)
83
APCREF
O
Control signal output to the reference voltage generator circuit for the laser automatic power
control
control
84
LDDR
O
PWM signal output for the laser automatic power control Not used (open)
Two-way data bus for the external D-RAM Not used (open)
– 62 –
Pin No. Pin Name
I / O
Function
85
TRDR
O
Tracking servo drive PWM signal (–) output to the BH6511FS (IC152)
86
TFDR
O
Tracking servo drive PWM signal (+) output to the BH6511FS (IC152)
87
DVDD
—
Power supply terminal (+3.3V) (digital system)
88
FFDR
O
Focus servo drive PWM signal (+) output to the BH6511FS (IC152)
89
FRDR
O
Focus servo drive PWM signal (–) output to the BH6511FS (IC152)
90
FS4
O
Clock signal (176.4 kHz) output terminal (X’tal system) Not used (open)
91
SRDR
O
Sled servo drive PWM signal (–) output to the BH6511FS (IC152)
92
SFDR
O
Sled servo drive PWM signal (+) output to the BH6511FS (IC152)
93
SPRD
O
Spindle servo drive PWM signal (–) output to the BH6511FS (IC152)
94
SPFD
O
Spindle servo drive PWM signal (+) output to the BH6511FS (IC152)
95
TEST0
I
96
TEST1
I
97
TEST2
I
98
TEST3
I
99
DVSS
—
Ground terminal (digital system)
100
EFMO
O
EFM signal output terminal when recording mode
* I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O.
Input terminal for the test (fixed at “L”)
– 63 –
MAIN BOARD IC201 CXD8607N (A/D, D/A CONVERTER)
Pin No. Pin Name
I / O
Function
1
INRP
I
R-ch analog signal (+) input terminal
2
INRM
I
R-ch analog signal (–) input terminal
3
REFI
I
Reference voltage (+3.3V) input terminal (for A/D converter section)
4
AVDD
—
Power supply terminal (+5V) (for A/D converter section, analog system)
5
AVSS
—
Ground terminal (for A/D converter section, analog system)
6
APD
I
Power down detection input of the A/D converter section (for analog section) “L”: power down
7
NU
—
Not used (open)
8
NU
—
Not used (open)
9
TEST1
I
Input terminal for the test (fixed at “L”)
10
LRCK1
I
L/R sampling clock signal (44.1 kHz) input from the CXD2650R (IC121) (for A/D converter
section)
section)
11
BCK1
I
Bit clock signal (2.8224 MHz) input from the CXD2650R (IC121) (for A/D converter section)
12
ADDT
O
Recording data output terminal
13
V35A
—
Power supply terminal (+3.3V) (for analog system)
14
VSS1
—
Ground terminal (for A/D converter section, digital system)
15
MCKI
I
Master clock (256Fs=11.2896 MHz) input of the A/D converter section
16
DPD
I
Reset signal input from the system controller (IC401) Reset signal is used as a detection signal of
power down to A/D converter section (digital section) “L”: reset (power down)
power down to A/D converter section (digital section) “L”: reset (power down)
17
VSS2
—
Ground terminal (for D/A converter section, digital system)
18
RES
I
Reset signal input from the system controller (IC401)
Reset signal is used as a initialize signal to D/A converter section “L”: reset (initialize)
Reset signal is used as a initialize signal to D/A converter section “L”: reset (initialize)
19
MODE
I
Writing data input from the system controller (IC401)
20
SHIFT
I
Serial clock signal input from the system controller (IC401)
21
XLATCH
I
Serial latch signal input from the system controller (IC401)
22
256CK
O
256Fs (11.2896 MHz) clock signal output terminal
23
V35D
—
Power supply terminal (+3.3V) (for digital system)
24
VSS2
—
Ground terminal (for D/A converter section, digital system)
25
512FS
O
512Fs (22.5792 MHz) clock signal output to the CXD2650R (IC121)
26
BCK2
I
Bit clock signal (2.8224 MHz) input from the CXD2650R (IC121) (for D/A converter section)
27
DADT
I
Playback data input terminal
28
LRCK2
I
L/R sampling clock signal (44.1 kHz) input from the CXD2650R (IC121) (for D/A converter
section)
section)
29
VDD2
—
Power supply terminal (+5V) (for D/A converter section, digital system)
30
R1
O
R-ch PLM signal 1 output terminal
31
AVDDR
—
Power supply terminal (+5V) (for R-ch side D/A converter section, analog system)
32
R2
O
R-ch PLM signal 2 output terminal
33
AVSSR
—
Ground terminal (for R-ch side D/A converter section, analog system)
34
XVDD
—
Power supply terminal (+5V) (for X’tal system)
35
XOUT
O
System clock output terminal (22 MHz)
36
XIN
I
System clock input terminal (22 MHz)
37
XVSS
—
Ground terminal (for X’tal system)
38
AVSSL
—
Ground terminal (for L-ch side D/A converter section, analog system)
39
L2
O
L-ch PLM signal 2 output terminal
40
AVDDL
—
Power supply terminal (+5V) (for L-ch side D/A converter section, analog system)
41
L1
O
L-ch PLM signal 1 output terminal
42
VDD2
—
Power supply terminal (+5V) (for L-ch side D/A converter section, digital system)
– 64 –
Pin No. Pin Name
I / O
Function
42
VDD2
—
Power supply terminal (+5V) (for L-ch side D/A converter section, digital system)
43
VDD1
—
Power supply terminal (+5V) (for A/D converter section, digital system)
44
VDD1
—
Power supply terminal (+5V) (for A/D converter section, digital system)
45
VSS1
—
Ground terminal (for A/D converter section, digital system)
46
TEST2
I
Input terminal for the test (fixed at “L”)
47
TEST3
I
Input terminal for the test (fixed at “L”)
48
VSS1
—
Ground terminal (for A/D converter section, digital system)
49
NU
—
Not used (open)
50
NU
—
Not used (open)
51
AVSS
—
Ground terminal (for A/D converter section, analog system)
52
LVDD
—
Power supply terminal (+5V) (for A/D converter section, buffer system)
53
LVSS
—
Ground terminal (for A/D converter section, buffer system)
54
REFO
O
Reference voltage (+3.3V) output terminal (for A/D converter section)
55
INLM
I
L-ch analog signal (–) input terminal
56
INLP
I
L-ch analog signal (+) input terminal
Click on the first or last page to see other DHC-EX77MD / DHC-MD77 / MDS-EX77 / MDS-EX770 service manuals if exist.