Sony DAV-HDX900W / HCD-HDX900W Service Manual ▷ View online
101
HCD-HDX900W
MAIN BOARD IC1701 CXD9873Q (HDMI TRANSMITTER)
Pin No.
Pin Name
I/O
Description
1
DVSS
-
Ground terminal (digital system)
2 to 9
C0 to C7
I
Digital chroma signal input terminal Not used
10
DVDD33
-
Power supply terminal (+3.3V) (digital system)
11
VCK
I
System clock (27 MHz) signal input from the servo DSP
12
DVSS
-
Ground terminal (digital system)
13 to 20
Y0 to Y7
I
Video signal input from the servo DSP
21
SSCK
I
Serial data transfer clock signal input from the servo DSP
22
SSO
I/O
Two-way data bus with the servo DSP
23
DVDD18
-
Power supply terminal (+1.8V) (for digital core)
24
#PWON
I
Power down signal input from the servo DSP "L": power down
25
#RST
I
Reset signal input from the servo DSP "L": reset
26
CLK
I
System clock (27 MHz) signal input terminal
27
INT
O
Interrupt signal output terminal Not used
28
DVSS
-
Ground terminal (digital system)
29, 30
A7, A6
-
Not used
31 to 33
TRAP2 to
TRAP0
-
Not used
34
MSCK
I
Serial data transfer clock signal input terminal Not used
35
MSD
I/O
Two-way data bus terminal Not used
36
TYPE
-
Not used
37
ASDATA4
-
Not used
38
VSYNC
I
Vertical sync signal input terminal Not used
39
HSYNC
I
Horizontal sync signal input terminal Not used
40
HTPLG
I
HDMI hot-plug detection signal input terminal
41
AVSS
-
Ground terminal (analog system)
42
PLLC0
-
External capacitor ground terminal Not used
43
PLLC1
-
External capacitor connection terminal (for PLL)
44, 45
PLL_AVDD3
-
Power supply terminal (+3.3V) (analog system) (for PLL)
46, 47
AVSS
-
Ground terminal (analog system)
48
TCKN
O
TMDS clock signal (negative) output to the HDMI OUT connector
49
TCKP
O
TMDS clock signal (positive) output to the HDMI OUT connector
50
AVDD3
-
Power supply terminal (+3.3V) (analog system)
51
TX0N
O
TMDS data (negative) output to the HDMI OUT connector
52
TX0P
O
TMDS data (positive) output to the HDMI OUT connector
53
AVSS
-
Ground terminal (analog system)
54
TX1N
O
TMDS data (negative) output to the HDMI OUT connector
55
TX1P
O
TMDS data (positive) output to the HDMI OUT connector
56
AVDD3
-
Power supply terminal (+3.3V) (analog system)
57
TX2N
O
TMDS data (negative) output to the HDMI OUT connector
58
TX2P
O
TMDS data (positive) output to the HDMI OUT connector
59
AVSS
-
Ground terminal (analog system)
60
SWING
I
HDMI output swing adjustment signal input terminal Not used
61
DAC_AVDD3
-
Power supply terminal (+3.3V) (analog system) (for D/A converter)
62
VREF
-
Reference voltage terminal (for D/A converter)
63
FS
-
Full scale adjustment terminal (for D/A converter)
64
AVSS
-
Ground terminal (analog system) (for D/A converter)
102
HCD-HDX900W
Pin No.
Pin Name
I/O
Description
65
DAC_AVDD3
-
Power supply terminal (+3.3V) (analog system) (for D/A converter)
66
AVSS
-
Ground terminal (analog system) (for D/A converter)
67
DAC_AVDD3
-
Power supply terminal (+3.3V) (analog system) (for D/A converter)
68
G
O
Component analog video signal (Y or green) output terminal Not used
69
AVSS
-
Ground terminal (analog system) (for D/A converter)
70
B
O
Component analog video signal (Cb or blue) output terminal Not used
71
R
O
Component analog video signal (Cr or red) output terminal Not used
72
SPDIF
I
SPDIF digital audio signal input from the servo DSP
73
AD3
I
Audio serial data input from the servo DSP
74 to 76
AD2 to AD0
I
Audio serial data input terminal Not used
77
ACK
I
Master clock signal input from the servo DSP
78
ABCK
I
Bit clock signal input from the servo DSP
79
ALRCK
I
L/R sampling clock signal input from the servo DSP
80
DVDD18
-
Power supply terminal (+1.8V) (for digital core)
103
HCD-HDX900W
CCX BOARD IC300 F2602E-01-TR (XM RECEIVER)
Pin No.
Pin Name
I/O
Description
1
LSOPTXRX
-
Not used
2
VSS
-
Ground terminal
3
SCTXOUT
O
Serial data output to the system controller
4
VDD
-
Power supply terminal (+3.3V)
5
SCRXIN
I
Serial data input from the system controller
6
VSS
-
Ground terminal
7
COMMSEL
I
Command mode select signal input from the system controller
8
VDD
-
Power supply terminal (+3.3V)
9
IRQ
O
Interrupt request signal output terminal
10
VSS
-
Ground terminal
11
RESET
I
Reset signal input from the system controller
12
SLAVESL
I
Master/slave mode setting terminal "L": Master mode, "H": Slave mode Fixed at "L" in this set
13
COMRXDIG
-
Not used
14
COMTXDIG
-
Not used
15
COMTXEN
-
Not used
16
VSS
-
Ground terminal
17
VDD
-
Power supply terminal (+3.3V)
18
COMRXP
I
XM receiver differential signal (positive) input terminal
19
COMRXM
I
XM receiver differential signal (negative) input terminal
20
VDD
-
Power supply terminal (+3.3V)
21
VSS
-
Ground terminal
22
COMTXM
O
XM transmitter differential signal (negative) output terminal
23
COMTXP
O
XM transmitter differential signal (positive) output terminal
24, 25
VSS
-
Ground terminal
26
OSCOUT
O
System clock output terminal (45.1584 MHz)
27
VDD
-
Power supply terminal (+3.3V)
28
OSCIN
I
System clock input terminal (45.1584 MHz)
29
VSS
-
Ground terminal
30
TEST
-
Not used
31
VSS
-
Ground terminal
32
HSDPDATA
-
Not used
33
VDD
-
Power supply terminal (+3.3V)
34
HSDPCLK
-
Not used
35
VSS
-
Ground terminal
36
HSDPEN
-
Not used
37
I2SDATA
O
I2S digital audio data output terminal
38
VSS
-
Ground terminal
39
I2SSCLK
O
I2S bit clock signal output terminal
40
VDD
-
Power supply terminal (+3.3V)
41
I2SLRCK
O
I2S L/R sampling clock signal output terminal
42
VSS
-
Ground terminal
43
I2SOCLK
O
I2S over sample clock signal output terminal
44
VSS
-
Ground terminal
45
SAIICLK
-
Not used
46
VDD
-
Power supply terminal (+3.3V)
47
SAIIDATA
-
Not used
48
SAIIEN
-
Not used
104
HCD-HDX900W
DSP BOARD IC002 ADSST-AVR-1115 (DSP)
Pin No.
Pin Name
I/O
Description
1
VDDINT
-
Power supply terminal (+1.2V) (for core)
2
CLKCFG0
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at "L" in this set
Fixed at "L" in this set
3
CLKCFG1
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at "H" in this set
Fixed at "H" in this set
4, 5
BOOTCFG0,
BOOTCFG1
I
Boot mode selection signal input terminal Fixed at "H" in this set
6
GND
-
Ground terminal
7
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
8
GND
-
Ground terminal
9
VDDINT
-
Power supply terminal (+1.2V) (for core)
10
GND
-
Ground terminal
11
VDDINT
-
Power supply terminal (+1.2V) (for core)
12
GND
-
Ground terminal
13
VDDINT
-
Power supply terminal (+1.2V) (for core)
14
GND
-
Ground terminal
15
INT_REQ
O
Interrupt signal output to the system controller
16
DIR_ERR
I
PLL lock error signal and data error flag input from the digital audio interface receiver
17
AD7
I/O
Two-way address and data bus terminal Not used
18
GND
-
Ground terminal
19
VDDINT
-
Power supply terminal (+1.2V) (for core)
20
GND
-
Ground terminal
21
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
22
GND
-
Ground terminal
23
VDDINT
-
Power supply terminal (+1.2V) (for core)
24 to 26
AD6 to AD4
I/O
Two-way address and data bus terminal Not used
27
VDDINT
-
Power supply terminal (+1.2V) (for core)
28
GND
-
Ground terminal
29, 30
AD3, AD2
I/O
Two-way address and data bus terminal Not used
31
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
32
GND
-
Ground terminal
33, 34
AD1, AD0
I/O
Two-way address and data bus terminal Not used
35
WR*
O
Write enable signal output terminal Not used
36, 37
VDDINT
-
Power supply terminal (+1.2V) (for core)
38
GND
-
Ground terminal
39
RD*
O
Read enable signal output terminal Not used
40
ALE
O
Address latch enable signal output terminal Not used
41 to 43
AD15 to AD13
I/O
Two-way address and data bus terminal Not used
44
GND
-
Ground terminal
45
VDDEXT
-
Power supply terminal (+3.3V) (for I/O)
46
AD12
I/O
Two-way address and data bus terminal Not used
47
VDDINT
-
Power supply terminal (+1.2V) (for core)
48
GND
-
Ground terminal
49 to 52
AD11 to AD8
I/O
Two-way address and data bus terminal Not used
53
A16
-
Not used
54
VDDINT
-
Power supply terminal (+1.2V) (for core)
55
GND
-
Ground terminal
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