Sony DAV-HDX900W / HCD-HDX900W Service Manual ▷ View online
97
HCD-HDX900W
Pin No.
Pin Name
I/O
Description
49
USB_VDD3
-
Power supply terminal (+3.3V)
50
SPFG
I
Spindle motor hall sensor input from the motor driver
51
MSW
O
CD/DVD selection signal output terminal "L": CD, "H": DVD
52
CKSW
I
Chucking detection switch input terminal Not used
53
OCSW
I
Disc table open/close detection switch input terminal Not used
54
EEWP
O
Write protect signal output to the EEPROM
55
DVDD18
-
Power supply terminal (+1.8V)
56 to 64
HA2 to HA8,
HA18, HA19
HA18, HA19
O
Address signal output to the flash ROM
65
DVDD3
-
Power supply terminal (+3.3V)
66
XWR
O
Write enable signal output to the flash ROM
67 to 75
HA16 to HA9,
HA20
O
Address signal output to the flash ROM
76
XROMCS
O
Chip select signal output to the flash ROM
77
HA1
O
Address signal output to the flash ROM
78
XRD
O
Read enable signal output to the flash ROM
79, 80
HD0, HD1
I/O
Two-way data bus terminal with the flash ROM
81
DVSS
-
Ground terminal
82 to 86
HD2 to HD6
I/O
Two-way data bus terminal with the flash ROM
87
HA21
O
Address signal output to the flash ROM
88
RESERVED
-
Not used
89
HD7
I/O
Two-way data bus terminal with the flash ROM
90
DVSS
-
Ground terminal
91, 92
HA17, HA0
O
Address signal output to the flash ROM
93
DVDD18
-
Power supply terminal (+1.8V)
94, 95
RESERVED
-
Not used
96
DVDD3
-
Power supply terminal (+3.3V)
97
IFSDO
O
Serial data output to the system controller
98
IFCK
O
Serial data transfer clock signal output to the system controller
99
xIFCS
O
Chip select signal output to the system controller
100
IFSDI
I
Serial data input from the system controller
101
SCL
O
Serial data transfer clock signal output to the EEPROM and HDMI transmitter
102
SDA
I/O
Two-way data bus with the EEPROM and HDMI transmitter
103
HDMI_SCL
O
Serial data transfer clock signal output to the HDMI OUT connector
104
HDMI_SDA
I/O
Two-way data bus with the HDMI OUT connector
105
RXD
I
Receive data input terminal for UART communication when data writing to flash memory
106
TXD
O
Transmit data output terminal for UART communication when data writing to flash memory
107
ICE
I
ICE mode enable signal input terminal Not used
108
xSYSRST
I
Reset signal input from the system controller "L": reset
109
RESERVED
-
Not used
110
xTXINT
O
Interrupt request signal output terminal Not used
111
DQM0
O
Data mask signal output to the SD-RAM
112
IFBSY
I
Busy signal input from the system controller
113 to 117
RD7 to RD3
I/O
Two-way data bus with the SD-RAM
118
DVDD3
-
Power supply terminal (+3.3V)
119 to 129
RD2 to RD0,
RD15 to RD8
I/O
Two-way data bus with the SD-RAM
130
LIMITSW
I
Limit detection switch input terminal
98
HCD-HDX900W
Pin No.
Pin Name
I/O
Description
131
DVDD3
-
Power supply terminal (+3.3V)
132
DQM1
O
Data mask signal output to the SD-RAM
133
RWE
O
Write enable signal output to the SD-RAM
134
CAS
O
Column address strobe signal output to the SD-RAM
135
RAS
O
Row address strobe signal output to the SD-RAM
136
RCS
O
Chip select signal output to the SD-RAM
137, 138
BA0, BA1
O
Bank address signal output to the SD-RAM
139 to 141 RA10, RA0, RA1
O
Address signal output to the SD-RAM
142
DVDD18
-
Power supply terminal (+1.8V)
143, 144
RA2, RA3
O
Address signal output to the SD-RAM
145
DVDD3
-
Power supply terminal (+3.3V)
146
DRCLK
O
Serial data transfer clock signal output to the SD-RAM
147
CKE
O
Clock enable signal output to the SD-RAM
148
DVSS
-
Ground terminal
149 to 155
RA11, RA9
to RA4
O
Address signal output to the SD-RAM
156
DVDD3
-
Power supply terminal (+3.3V)
157 to 159
SMPTE_Y (7) to
SMPTE_Y (5)
O
Video signal output to the HDMI transmitter
160
DVDD18
-
Power supply terminal (+1.8V)
161 to 165
SMPTE_Y (4) to
SMPTE_Y (0)
O
Video signal output to the HDMI transmitter
166
VCLK
O
System clock (27 MHz) signal output to the HDMI transmitter
167
MIC
-
Not used
168
TSD_M
O
Thermal shut down signal output to the motor/coil driver
169
MUTE
O
Muting signal output to the motor/coil driver
170
DVDD3
-
Power supply terminal (+3.3V)
171
MUTE123
O
Muting signal output to the motor/coil driver
172
REV
O
Loading motor drive signal output terminal (reverse direction) Not used
173
FWD
O
Loading motor drive signal output terminal (forward direction) Not used
174
DVDD18
-
Power supply terminal (+1.8V)
175
RGB_SEL
-
Not used
176
Fixed_Low
-
Not used
177
WIDE
O
Normal/squeeze selection signal output to the video amplifier
"L": normal, "H": squeeze
"L": normal, "H": squeeze
178
DVSS
-
Ground terminal
179
VBUS_OE
-
Not used
180
xMAMUTE
-
Not used
181
VBUS_OC
-
Not used
182, 183
R/Cr/Pr,
B/Cb/Pb
O
Component video signal output to the video amplifier
184
DACVSSA
-
Ground terminal
185
Y/G
O
Component video signal output to the video amplifier
186
DACVDDA
-
Power supply terminal (+3.3V)
187
CVBS
O
Video signal output to the video amplifier
188
DACVSSB
-
Ground terminal
189
C
O
Chroma signal output to the video amplifier
190
DACVDDB
-
Power supply terminal (+3.3V)
99
HCD-HDX900W
Pin No.
Pin Name
I/O
Description
191
Y
O
Y signal output to the video amplifier
192
DACVSSC
-
Ground terminal
193
CIN
-
Not used
194
FS
-
Full scale adjustment terminal
195
VREF
-
For reference voltage terminal
196
DACVDDC
-
Power supply terminal (+3.3V)
197
ASDATA0
O
Audio serial data output to the HDMI transmitter
198
TRG_SW
I
Trigger detection switch input terminal Not used
199
SCORE
-
Not used
200
XVOICE
-
Not used
201
Fixed_Low
-
Not used
202, 203
ASDATA1,
ASDATA2
O
Audio serial data output terminal Not used
204 to 207
Fixed_Low
-
Not used
208
DVDD3
-
Power supply terminal (+3.3V)
209
ALRCK
O
L/R sampling clock signal output to the HDMI transmitter
210
ABCK
O
Bit clock signal output to the HDMI transmitter
211
ACLK
O
Master clock signal output to the HDMI transmitter
212
ADIN
I
Audio serial data input terminal Not used
213
DVDD18
-
Power supply terminal (+1.8V)
214
ASDATA4
O
Audio serial data output terminal Not used
215
MC_DATA
-
Not used
216
SPDIF
O
SPDIF digital audio signal output to the HDMI transmitter and digital audio interface receiver
217
APLLVDD3
-
Power supply terminal (+3.3V)
218
APLLCAP
-
Connection terminal for an external capacitor
219
APLLVSS
-
Ground terminal
220, 221
ADACVSS2,
ADACVSS1
-
Ground terminal
222
KMOD
-
Not used
223
PWON
O
Power down signal output to the HDMI controller "L": power down
224
RcH
-
Not used
225
AVCM
-
Not used
226
Lch
-
Not used
227
DSEL
-
Not used
228
xRST
-
Not used
229, 230
ADACVDD1,
ADACVDD2
-
Power supply terminal (+3.3V)
231
RFGND18
-
Ground terminal
232
RFVDD18
-
Power supply terminal (+1.8V)
233
XTALO
O
System clock output terminal Not used
234
XTALI
I
System clock (27 MHz) signal input terminal
235
JITFO
O
Output terminal of the RF jitter meter
236
JITFN
I
Input terminal of the RF jitter meter
237
PLLVSS
-
Ground terminal
238
IDACEXLP
-
Not used
239
PLLVDD3
-
Power supply terminal (+3.3V)
240
LPFON
O
Data PLL loop filter output terminal
241
LPFIP
I
Data PLL loop filter input terminal
100
HCD-HDX900W
Pin No.
Pin Name
I/O
Description
242
LPFIN
I
Data PLL loop filter input terminal
243
LPFOP
O
Data PLL loop filter output terminal
244
ADCVDD3
-
Power supply terminal (+3.3V)
245
ADCVSS
-
Ground terminal
246
RFVDD3
-
Power supply terminal (+3.3V)
247
RFRPDC
O
RF ripple detect output terminal
248
RFRPAC
I
RF ripple detect input terminal
249
HRFZC
I
High frequency RF ripple zero crossing terminal
250
CRTPLP
O
Defect level filter capacitor connecting terminal
251
RFGND
-
Ground terminal
252
OSP
O
RF offset cancellation capacitor connecting terminal
253
OSN
O
RF offset cancellation capacitor connecting terminal
254
RFGC
O
RF AGC loop capacitor connecting for DVD-ROM
255
IREF
I
Reference current input terminal
256
AVDD3
-
Power supply terminal (+3.3V)
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