Sony CFD-S27 (serv.man2) Service Manual ▷ View online
– 29 –
– 30 –
– 27 –
– 28 –
CFD-S27
1
IC701
#¡
(RFO)
r
Waveforms
1.0 – 1.4
Vp-p
Vp-p
VOLT/DIV : 200 mV AC
TIME/DIV : 0.5
TIME/DIV : 0.5
µ
sec
4
IC702
#¡
(MNT3)
VOLT/DIV : 1 V AC
TIME/DIV : 50
TIME/DIV : 50
µ
sec
2
IC702
@∞
(XPCK)
VOLT/DIV : 1 V AC
TIME/DIV : 0.1 msec
TIME/DIV : 0.1 msec
5
IC702
#™
(MNT1)
VOLT/DIV : 1 V AC
TIME/DIV : 50
TIME/DIV : 50
µ
sec
3
IC702
@•
(RFCK)
VOLT/DIV : 1 V AC
TIME/DIV : 50
TIME/DIV : 50
µ
sec
6
IC702
#∞
(XTAO)
VOLT/DIV : 0.2 V AC
TIME/DIV : 50 nsec
TIME/DIV : 50 nsec
4.8 Vp-p
242.0
µ
sec
5.3 Vp-p
140.5
µ
sec
5.3 Vp-p
140.5
µ
sec
5.3 Vp-p
140.5
µ
sec
1.1 Vp-p
16.9344 MHz
(PLAY MODE)
r
Refer to page 32 for IC Block Diagrams.
5-5. SCHEMATIC DIAGRAM – MAIN SECTION (2/2) – (FORMER TYPE)
Note:
• All capacitors are in
• All capacitors are in
µ
F unless otherwise noted. pF:
µµ
F
50 WV or less are not indicated except for electrolytics
and tantalums.
and tantalums.
• All resistors are in
Ω
and
1
/
4
W or less unless otherwise
specified.
Note: The components identified by mark
!
or dotted
line with mark
!
are critical for safety.
Replace only with part number specified.
•
U
: B+ Line.
•
H
: adjustment for repair.
• Power voltage is dc 9V and fed with regulated dc power
supply from battery terminal.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : CD STOP
no mark : CD STOP
• Voltages are taken with a VOM (Input impedance 10 M
Ω
).
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
• Signal path.
J
: CD
– 31 –
r
IC Block Diagrams – MAIN SECTION (1/2) –
IC1 TA2008AN
IC3 BU2614
21
22
23
24
2
3
5
4
6
7
8
9
10
1
11
12
13
14
15
16
17
18
19
20
AM
RF
FM
RF
BUFF
BUFF
IF
BUFF
AF
BUFF
FM MPX
FM
MIX
FM
IF
AM
IF
AM
MIX
AM
DET
1/8DIV
MUTE
AGC
FM RF IN
GND1
MIX OUT
AGC
VCC2
FM IF IN
AM IF IN
GND2
QUAD
ST IND
L OUT
R OUT
AM RF IN
FM RF OUT
AM OSC
FM OSC
VCC1
OSC OUT
IF OUT
DET OUT
MPX IN
LPF1/BAND
LPF2/MO-ST
VCO
FM
DET
ST
DET
LEVEL
DET
AM
OSC
FM
OSC
AM/FM
ST/MONO
SW
2
3
5
4
6
7
8
9
10
1
11
12
13
14
15
16
I / O CTL
REFERENCE
DIVIDER
MAIN COUNT
SHIFT
REGISTER
LATCH
20BIT
COUNT
PRESCALER
PHASE
DET
ULLOCK
IF COUNT
CTL
XOUT
XIN
CE
CK
DA
CD
P0
P1
VSS
PD1
VDD1
VDD2
FM IN
AM IN
P2
IF IN
– 32 –
IC701 CXA1782CQ
2
3
4
5
6
7
8
9
10
11
12
48
47
46
45
44
42
41
40
39
38
37
36
35
34
33
32
31
29
28
27
26
25
13
14
15
16
17
18
19
20
21
22
23
24
43
1
30
PD2
PD1
PD
LD
RF –
RFI
CP
CB
CC1
CC2CC2
FOK
RFO
LEVELS
MIRR
FOK
RPC
DFCT
IIL DATA RESISTOR INPUT SHIFT RESISTOR
ADDRESS DECODER
OUTPUT DECODER
HPF COMP
LPF COMP
TOG1-3
BAL1-3
FS1-4
TG1-2
TM1-6
PS1-4
FE AMP
F IY AMP
E IY AMP
TE AMP
BAL1
BAL2
BAL3
T
OG1
T
OG2
T
OG3
WINDOW COMP
ATSC
TZC COMP
FZC COMP
DFCT
TM1
FS4
DFCT
FOCUS PHASE COMPENSATION
FS1
FS2
TC1
TC2
TM3
TM4
TM6
TM6
TM2
I. SET
TRACKING
PHASE COMPENSATION
F .SET
SENS
C. OUT
XRST
DATA
XLT
CLK
VCC
ISET
SLO
SL –
SL +
TEO
FO
FI
FDFCT
FGD
FLB
FEO
FE –
SRCH
TGU
TG2
FSET
TE –
IIL
TTL
IIL
TTL
IIL
TTL
F. BIAS
F
E
EI
GND
TO
LPFI
TI
ATSC
TZC
TDFCT
VC
RF IY AMP1
RF IY AMP2
r
IC Block Diagrams – MAIN SECTION (2/2) –
– 33 –
IC702 CXD2507AQ
3
6
3
5
14
4
5
FOK
MON
MDP
MDS
LOCK
TEST
FILO
FILI
PCO
VSS
AVSS
CLTV
AVDD
RF
BIAS
ASYI
ASYO
ASYE
WDCK
DATA
SERVO AUTO
SEQUENCER
SEQUENCER
CPU
INTERFACE
SUB CODE
PROCESSOR
DIGITAL
CLV
DIGITAL
OUT
CLOCK
GENERATOR
DIGITAL
PLL
D/A
INTERFACE
ERROR
CORRECTOR
16K
RAM
EFM
DEMODULATOR
ASYMMETRY
CORRECTOR
XRST
SENS
MUTE
SQCK
SQSO
EXCK
SBSO
SCOR
VSS
WFCK
EMPH
DOUT
C4M
FSTT
XTSL
XTAO
XTAI
MNTO
LDON
SPOD
SPOC
SPOB
SPOA
CLKO
VDD
XLTO
DATO
CNIN
SEIN
CLOK
XLAT
LRCK
PCMD
BCK
GTOP
XUGF
XPCK
VDD
GFS
RFCK
C2PO
XROF
MNT3
MNT1
64 63 62 61 60 59 58 57 56 55 54 53 52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
23 24 25 26 27 28 29
20 21
30 31
22
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
IC703 BA6198S
21
22
23
24
25
26
27
28
29
30
2
3
5
4
6
7
8
9
10
1
11
12
13
14
15
16
17
18
19
20
31
32
BIAS
13.3K
13.3K
13.3K
13.3K
LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT
REGULATOR
BIAS
T.S.D.
MONITOR
T.S.D
OP-AMP
VCC
VCC
D.BUF
D.BUF
D.BUF
D.BUF
D.BUF
D.BUF
D.BUF
10K
10K
10K
10K
10K
50K
50K
REGULATOR
100
DRIVER
MUTE
GND
VCC
FIN
F+
F–
VREF
SPI
SPO
GND
SP+
SP–
SPIN
GND
NC
NC
VCC
TIN
T–
T+
GND
VREF
COM5V
MUTE
REG
SL+
SL–
SLIN
RST
GND
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