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Model
CDP-CX53
Pages
48
Size
2.99 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
cdp-cx53.pdf
Date

Sony CDP-CX53 Service Manual ▷ View online

– 39 –
 BD BOARD   IC102   LC78622E (DIGITAL SIGNAL PROCESSOR, DIGITAL FILTER, D/A CONVERTER)
Pin No.
Pin Name
I/O
Function
1
DEFI
I
Defect detection signal input from the RF amplifier (IC101)
2
TAI
I
PLL test input terminal    Not used (fixed at “L”)
3
PDO
O
PLL phase comparison output for external VCO control
4
VVSS
Ground terminal (internal VCO system)
5
ISET
I
Connected to a current adjusting resistor for the PDO output
6
VVDD
Power supply terminal (+5V) (internal VCO system)
7
FR
I
Adjusts the VCO frequency range
8
VSS
Ground terminal (digital system)
9
EFMO
O
Slice level control to EFM signal output
10
EFMIN
I
Playback EFM RF signal input from the RF amplifier (IC101)
11
TEST2
I
Test input terminal (fixed at “L” in this set)
12
CLV+
O
13
CLV–
O
14
V/P
O
Sled servo on/off control signal output to the RF amplifier (IC101)    Rough servo/phase control
automatic switching monitor output     “H”: rough servo, “L”: phase servo
15
HFL
I
Tracking detection signal input from the RF amplifier (IC101) (Schmitt input)    HFL (High
Frequency Level) is used to determine whether the main beam is positioned on a pit or mirror
16
TES
I
Tracking error signal input from the RF amplifier (IC101) (schmitt input)
17
TOFF
O
Tracking off control signal output to the RF amplifier (IC101)
Tracking becomes off when TOFF is “H”
18
TGL
O
Tracking gain control signal output to the RF amplifier (IC101)  (Raises gain when “L”)
19
JP+
O
20
JP–
O
21
PCK
O
EFM data playback clock monitor output terminal (4.3218 MHz when phase is locked)
22
FSEQ
O
Sync signal detection output terminal (“H” when a sync signal detected from the EFM signal and
that generated internally coincide)
23
VDD
Power supply terminal (+5V) (digital system)
24
CONT1
I
Guard frame sync input terminal
25
CONT2
I
Sled servo on/off control signal input terminal
26
CONT3
O
Sled servo drive control signal output terminal
27
CONT4
I
Sled limit-in detect switch (S101) input terminal    The optical pick-up is inner position when “L”
28
CONT5
O
Not used (open)
29
EMPH
O
De-emphasis control signal output terminal
The de-emphasis disc is being played back when “H”    Not used (open)
30
C2F
O
C2PO (error condition monitor) signal output terminal
31
DOUT
O
Digital signal output terminal (EIAJ format)
32
TEST3
I
Test input terminal (fixed at “L” in this set)
33
TEST4
I
Test input terminal (fixed at “L” in this set)
34
NC
Not used (open)
35
MUTEL
O
Line muting on/off control signal output terminal (for L-ch side)    “H”: muting on
36
LVDD
Power supply terminal (+5V) (L-ch D/A converter system)
37
LCHO
O
Analog audio signal output from the internal D/A converter block (for L-ch side)
38
LVSS
Ground terminal (L-ch D/A converter system)
39
RVSS
Ground terminal (R-ch D/A converter system)
40
RCHO
O
Analog audio signal output from the internal D/A converter block (for R-ch side)
41
RVDD
Power supply terminal (+5V) (R-ch D/A converter system)
Disc motor control signal output to the RF amplifier (IC101)
(3-value output available depending on the command)
Track jump control signal output to the RF amplifier (IC101)
(3-value output available depending on the command)
– 40 –
Pin No.
Pin Name
I/O
Function
42
MUTER
O
Line muting on/off control signal output terminal (for R-ch side)    “H”: muting on
43
XVDD
Power supply terminal (+5V) (crystal oscillator system)
44
XOUT
O
System clock output terminal (16.9344 MHz)
45
XIN
I
System clock input terminal (16.9344 MHz)
46
XVSS
Ground terminal (crystal oscillator system)
47
SBSY
O
C1, C2, single correction, and double correction monitor output terminal    Not used (open)
48
EFLG
O
Subcode P to W output terminal
49
PW
O
Subcode frame sync signal output terminal    Not used (open)
50
SFSY
O
Write frame clock signal output terminal    Not used (open)
51
SBCK
I
Subcode reading clock signal input terminal (schmitt input)    Not used (fixed at “L”)
52
FSX
O
7.35 kHz sync signal output divided from the crystal oscillation
53
WRQ
O
Subcode Q synchronizing signal output to the system controller (IC801)
54
RWC
I
Command chip enable signal input from the system controller (IC801) (schmitt input)
55
SQOUT
O
Subcode Q output to the system controller (IC801)
56
COIN
I
Command serial data input from the system controller (IC801)
57
CQCK
I
Command serial clock signal input from the system controller (IC801) (schmitt input)
Fetching clock input or subcode extracting clock input from SQOUT (pin %∞)
58
RES
I
System reset signal input from the reset signal generator (IC701)    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
59
TEST11
O
Test output terminal    Not used (open)
60
16M
O
Master clock signal (16.9344 MHz) output terminal    Not used (open)
61
4.2M
O
Reference clock signal (4.2336 MHz) output to the RF amplifier (IC102)
62
TEST5
I
Test input terminal (fixed at “L” in this set)
63
CS
I
Chip select signal input terminal    Not used (fixed at “L”)
64
TEST1
I
Test input terminal (fixed at “L” in this set)
– 41 –
 DISPLAY BOARD   IC801   CXP82324-088Q (SYSTEM CONTROLLER, FL/LED DRIVER, KEY CONTROL)
Pin No.
Pin Name
I/O
Function
1
TSENS1
I
Disc table flag detect sensor (IC51) input terminal
2
RMIN
I
Remote control signal input from the remote control receiver (IC802)
3
DOOR SW
I
Front cover open/close detect switch (S821) input terminal    “L”: close, “H”: open
4, 5
NC
O
Not used (open)
6
BUSIN
I
Audio bus signal input for the audio bus interface
7
RWC
O
Command chip enable signal output to the RF amplifier (IC101) and DSP (IC102)
8
CQCK
O
Command serial clock signal output to the RF amplifier (IC101) and DSP (IC102)
9
SQOUT
I
Subcode Q data input from the DSP (IC102)
10
COIN
O
Command serial data output to the RF amplifier (IC101) and DSP (IC102)
11
TGL
I
Tracking gain control signal input from the DSP (IC102)                                                                   
Gain becomes low when tracking gain is “H”
12
DRF
I
RF level detection signal input from the RF amplifier (IC101)
13
NC
O
Not used (open)
14
SL+
O
Sled feeding signal (external direction) output to the RF amplifier (IC101)
15
SL–
O
Sled feeding signal (internal direction) output to the RF amplifier (IC101)
16
LOAD OUT
O
Loading motor (M61) drive signal output to the BA6780 (IC601)    “L” active
17
LOAD IN
O
Loading motor (M61) drive signal output to the BA6780 (IC601)    “L” active
18
TABLE L
O
Table motor (M62) drive signal output to the BA6780 (IC601)    “L” active
19
TABLE R
O
Table motor (M62) drive signal output to the BA6780 (IC601)    “L” active
20
DOWN SW
I
Inputs the loading out switch (S52) detection signal
21
UP SW
I
Inputs the loading in switch (S51) detection signal
22
DSENS
I
Inputs the disc sensor (Q51) detection signal (A/D input)
23
KEY0
I
Key input terminal (A/D input) (S801, 802 and RE801)                                                                     
CLEAR, CHECK, DISC PUSH ENTER keys input
24
KEY1
I
Key input terminal (A/D input) (S803 to 810)                                                                                     
±, ≠, p, P, ·, PLUS ONE, REPEAT, PLAY MODE keys input
25
KEY2
I
Key input terminal (A/D input) (S811 to 816)                                                                                     
BLOCK FILE 5/4/3/2/1,  
I
/
u keys input
26
TEST MODE
I
Setting terminal for the test mode (ADJ mode) (A/D input)                                                                
“L”: test mode, Normally: fixed at “H”
27
CD1/2/3
I
Inputs the CD COMMAND MODE switch (S831) detection signal (A/D input)
28
JOG1
I
Jog dial pulse input of the rotary encoder (RE801) (A/D input)
29
JOG2
I
Jog dial pulse input of the rotary encoder (RE801) (A/D input)
30
RESET
I
System reset signal input from the reset signal generator (IC703)    “L”: reset                                   
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
31
10MHz
Connected to oscillator (10 MHz)
32
10MHz
Connected to oscillator (10 MHz)
33
GND
Ground terminal
34
PLAY LED
O
LED drive signal (D801 
·) output terminal    “H”: LED on
35
PAUSE LED
O
LED drive signal (D802 
P) output terminal    “H”: LED on
36
P1 LED
O
LED drive signal (D803 PLUS ONE) output terminal    “H”: LED on
37
POWER LED
O
LED drive signal (D804 STANDBY) output terminal    “H”: LED on
38
ICSW
O
Power on/off control signal output to the LA5602 (IC701)    “H”: power on, “L”: standby
39, 40
NC
O
Not used (open)
41 to 62
P1 toP22
O
Segment drive signal output to the fluorescent indicator tube (FL801)
63 to 65
NC
O
Not used (open)
– 42 –
Pin No.
Pin Name
I/O
Function
66 to 70
G1 to G5
O
Grid drive signal output to the fluorescent indicator tube (FL801)
71
VFDP
I
Reference voltage input for the fluorescent indicator tube (FL801)
72
VDD
Power supply terminal (+5V)
73
(VDD)
Power supply terminal (+5V)
74, 75
NC
O
Not used (open)
76
BUSOUT
O
Audio bus signal output for the audio bus interface
77
TEST PULSE
O
Table position detect pulse output terminal (for disc sensor alignment)
78
WRQ
I
Subcode Q synchronizing signal input from the DSP (IC102)
79
TSENS3
I
Disc table home position detect sensor (IC53) input terminal
80
TSENS2
I
Disc table flag detect sensor (IC52) input terminal
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