Sony BDV-B1 / HBD-B1 Service Manual ▷ View online
HBD-B1
HBD-B1
25
25
4-10. SCHEMATIC DIAGRAM - MAIN Board (10/10) -
EPHY_RDP
EPHY_TDN
EPHY_TDP
EPHY_RDN
IPOD_VIDEO
IPOD_VIDEO_SW
VDAC_CVBS
IPOD_VIDEO_IN
IGND_V
IPOD_UART_TXD2
USB_P_CTRL
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
L2E0
HH2012_1000
L2E2
(XX)HH-221
2.5V
VCC_3V3_VIDEO
VCC_3V3_VIDEO
VCC_5.6V
T2A0
T2A1
T2A8
D0-
D0+
T2A9
D1+
D1-
PTB_L
PTB_R
IPOD_DET
T2A3
T2A4
IPOD_R
IGND_A
IPOD_L
IPOD_VIDEO
IGND_V
IPOD_RX
IPOD_TX
IPOD_READY
T2A5
T2A2
T2A6
T2A7
C2C4
(XX)0.1u
C2F1
(XX)4.7uF(2)
C2F2
(XX)4.7uF(2)
C2A9
OPEN
C2C5
OPEN
C2F3
(XX)4.7uF
CA2A5
2.2uF(2)
C2C1
1000pF
C2E5
1000pF
C2A7
(XX)100pF
CA2A4
10uF(3)
CA2A6
(XX)10uF(3)
CA2A3
(XX)2.2uF(2)
CA2A1
(XX)1uF(2)
CA2A2
1uF(2)
C2A3
(XX)100nF
(XX)100nF
C2E4
0.1uF
C2A8
0.1uF
C2F4
(XX)100nF
C2A2
100nF
C2A4
100nF
C2A1
100nF
C2A5
15pF(XX)
C2A6
XX
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
R2E0
(XX)4.7K
R2E4
XX
R2E5
75
R2E6
OPEN
R2E7
OPEN
R2E8
0
R2E2
(XX)100
R2E1
(XX)100
R2E3
(XX)82
R2E9
75
COMPOSITE
USB0_DN
USB0_DP
IPOD_VIDEO
USB1_DN
USB1_DP
IPOD_VIDEO_IN
PORTABLE_R
IPOD_L
PORTABLE_L
IPOD_DET
IPOD_UART_RXD2
IGND_A
IPOD_R
IPOD_READY
IGND_V
L2E1
(XX)4.7UH
L2E3
4.7UH
VCC_5V
VCC_5V
VCC_5V
I C 2 E 1
THS7314
IN_CH1
1
IN_CH2
2
IN_CH3
3
VS+
4
GND
5
OUT_CH3
6
OUT_CH2
7
OUT_CH1
8
VCC_3V3
IC2E0
MM1507XNRE(XX)
1
SW
2
OUT
3
VCC
4
IN2
5
GND
6
IN1
IC2E3
NJM2505(XX)
1
VOUT
2
GND
3
V+
4
VIN
5
VGND
CN2A2
1
DGND
2
USB_DP
3
USB_DN
4
VCC_5V
CN2A3
1
DGND
2
USB_DP
3
USB_DN
4
VCC_5.6V
5
VCC_5.6V
JK2E0
RB1-105B8K2A
1
TD+
2
TD-
3
RD+
4
TCT
5
RCT
6
RD-
7
NC
8
GND
9
NC
10
NC
CN2A1
1
PTB_IN_L
2
AGND
3
PTB_IN_R
4
AGND
5
DGND
6
IPOD_DET_CTRL
7
IPOD_DET
8
IPOD_R
9
IGND_A
10
IPOD_L
11
DGND
12
IGND_V
13
IPOD_VIDEO_IN
14
DGND
15
IPOD_UART_RXD2
16
IPOD_UART_TXD2
17
IPOD_READY
18
USB_P_CTRL
IPOD_DET_CTRL
IPOD_DET_CTRL
FC2A1
DLP11S
1
2
3
4
FC2A2
(XX)DLP11S
1
2
3
4
*IMPEDANCE MATCHING IS REQUIRED : 100 OHM (AT EACH DIFFERENTIAL LINE)
3.Trace spacing is same as trace width.
1.USB Data DP/DN must be routed as 100ohm differential pairs.
9.USB RREF resistor(R541) must be placed close to BCM7632.
*USB Design & Layout Guide*
5.Avoid via aspossible as you can.
4.Route differential pairs above gnd plane and gnd plane are not split under differential pairs.
6.Trace spacing between DP/DN and other traces must be more than 5 times of DP/DN trace width.
7.Consider current upto 500mA.
7.Consider current upto 500mA.
2.Match Trace length of DP/DN
8.Consider abrupt USB power short.
2.Match Trace length of DP/DN
6.Trace spacing between DP/DN and other traces must be more than 5 times of DP/DN trace width.
1.Eath Data DP/DN must be routed as 100ohm differential pairs.
7.EPHY_RDAC resistor(R512) must be placed close to BCM7632.
3.Trace spacing is same as trace width.
*Ethernet Design & Layout Guide*
5.Avoid via aspossible as you can.
4.Route differential pairs above gnd plane and gnd plane are not split under differential pairs.
2
3
9
TOP VIEW
1
7
5
4 6 8
ETHERNET
*Audio & Video Signal Layout Guide*
1.Component & CVBS signal traces must be routed using signal to signal spacing is more than 0.25mm.
1.Component & CVBS signal traces must be routed using signal to signal spacing is more than 0.25mm.
Termination Resistor are placed close to Video Filter
2.Place R549 VDAC_RBIAS resistors close to 7632
CVBS Switching
(BCM & iPod)
(BCM & iPod)
SW
L
H
IPOD
BCM
OUT
10
C V B S
WI-FI I/F
iPod video noise isolation
WiFi OPTION(#10,#11)
with IPOD OPTION(#11,#4)
w/o IPOD option
Close to BCM7630
Close to CA203
<< IPOD, PTB >>
<< USB >>
FROM I/O JACK
4
B
6
9
11
D
H
10
12
3
5
C
F
1
E
8
G
I
A
2
7
MAIN BOARD (10/10)
HBD-B1
HBD-B1
26
26
4-11. PRINTED WIRING BOARD - MAIN Board -
•
: Uses unleaded solder.
MAIN BOARD
(CONDUCTOR SIDE)
MAIN BOARD
(COMPONENT SIDE)
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
8
9
•
: Uses unleaded solder.
• See page 15 for Circuit Boards Location.
HBD-B1
HBD-B1
27
27
4-12. PRINTED WIRING BOARDS - FRONT, JACK Boards -
FRONT BOARD
(CONDUCTOR SIDE)
FRONT BOARD
(COMPONENT SIDE)
A
B
C
D
E
1
2
3
4
5
6
7
8
9
10
11
JACK BOARD
(CONDUCTOR SIDE)
JACK BOARD
(COMPONENT SIDE)
•
: Uses unleaded solder.
• See page 15 for Circuit Boards Location.
HBD-B1
HBD-B1
28
28
4-13. SCHEMATIC DIAGRAM - JACK Board -
VCC_5.6V
USB_5V
USB_5V
R3T1
100K
R3T2
100K
100K
CA3U1
220uF/16V
C3U7
22uF/16V
DGND
DGND
DGND
DGND
AGND
DGND
AGND
AGND
AGND
FB3U1
HH-221(2)
L3T1
HH-260(2)
L3T2
HH-260(2)
L3C1
(XX)HH-221(2)
L3C2
(XX)HH-221(2)
J K 3 T 1
1
2
3
C3U4
100nF
C3T2
220pF
C3T1
220pF
C3U5
100nF
CN3U1
1
VCC_5.6V
2
VCC_5.6V
3
USB_DN
4
USB_DP
5
DGND
DGND
JK3U1
EAG35130501
REVERSE TYPE
REVERSE TYPE
1
VBUS
2
D-
3
D+
4
GND
CN3A1
1
PWR_CTRL
2
IPOD_READY
3
IPOD_UART_TX1
4
IPOD_UART_RX1
5
DGND
6
IPOD_VIDEO
7
IGND_V
8
DGND
9
IPOD_L
10
IGND_A
11
IPOD_R
12
IPOD_DET
13
IPOD_DET_CTRL
14
DGND
15
AGND
16
PTB_IN_R
17
AGND
18
PTB_IN_L
R3U2
820(1,5%)
R3U3
68
68
IC3U1
LM39102D-ADJ
1
EN
2
VIN
3
VOUT
4
SENSE/ADJ
5
GND
6
GND
7
GND
8
GND
R3U1
2.7K(1,1%)
DGND
DGND
R3U4
4.7K(1)
T3C9
T3F1
T3A5
T3F2
T3C3
T3A6
T3E6
T3E0
T3C2
T3C5
T3A9
T3A3
T3E8
T3F0
T3A1
T3F3
T3F4
T3F6
T3F5
R
Portable IN
L
JACK BOARD
4
B
6
9
11
D
10
3
5
C
F
1
E
8
A
2
7
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