Sony BDV-B1 / HBD-B1 Service Manual ▷ View online
HBD-B1
13
2-13. MAIN BOARD
– Front bottom view –
1 fan connector
(CN1A2)
2 two screws
(FH
3
u 8 FZW)
3 two screws
(BH
3
u 10 FZB)
4 screw
(BZN BK (CR 3) 3
u 6)
6 MAIN board
MAIN board
5
top side
fan module
:LUHVHWWLQJ
HBD-B1
14
SECTION 3
ELECTRICAL ADJUSTMENT
SA ADJUSTMENT
1. Outline of SA adjustment
It is an adjustment to look for the best point of CL by changing
the position of CL in picking up to correct SA generated by the
BD optical system. The problem occurs in the disc recognition,
adjustment, and data read when the position of CL is not the best.
1. Outline of SA adjustment
It is an adjustment to look for the best point of CL by changing
the position of CL in picking up to correct SA generated by the
BD optical system. The problem occurs in the disc recognition,
adjustment, and data read when the position of CL is not the best.
2. Case for which execution of SA adjustment is neces-
sary
•
When you exchange the mechanism deck (pick-up traverse)
•
When you exchange the complete MAIN board
•
When you exchange the F/E fl ash IC
3. SA adjustment method
Note: The operation in this adjustment must use a remote commander and
TV monitor.
Procedure:
1. Connect the TV monitor with this unit.
2. Press the [
1. Connect the TV monitor with this unit.
2. Press the [
?/1
] button to turn the power on.
3. Release the HOME menu by pressing the [HOME] button on
the remote commander when the HOME menu is displayed in
the TV monitor.
the TV monitor.
4. Press button in order of the [4]
t [5] t [6] t [2] t [5]
t [8] t [0] on the remote commander, and enter the debug
menu.
Debug Information
[1] PLATFORM INFORMATION
[2] FATAL ERROR MESSAGE
[3] SYSTEM DEBUG MESSAGE
[4] LOADER DEBUG MESSAGE
[5] HDMI CONNECTION INFORMATION
[6] LOADER SA RESET INFORMATION
[7] LOADER PDXY TEMP INFORMATION
[8] WIRELESS INFORMATION
[2] FATAL ERROR MESSAGE
[3] SYSTEM DEBUG MESSAGE
[4] LOADER DEBUG MESSAGE
[5] HDMI CONNECTION INFORMATION
[6] LOADER SA RESET INFORMATION
[7] LOADER PDXY TEMP INFORMATION
[8] WIRELESS INFORMATION
press 1, 2, 3, 4, 5 to select an item.
Press PAUSE to exit.
Press PAUSE to exit.
5. Press the [6] button on the remote commander, and execute the
SA reset.
LOADER SA RESET Information
SA Reset completed! Insert BD single disc
RETURN: Return debug Information.
6. Press button in order of the [RETURN]
t [X] on the remote
commander, and release the debug menu.
7. Play the BD-ROM (single-layer) or BD-R (single-layer).
8. The SA adjustment ends.
8. The SA adjustment ends.
4. SA adjustment confi rmation method
Note: The operation in this mode must use a remote commander and TV
monitor.
Procedure:
1. Connect the TV monitor with this unit.
2. Press the [
1. Connect the TV monitor with this unit.
2. Press the [
?/1
] button to turn the power on.
3. Select the “Setup” on the HOME menu, and press the [ ] but-
ton on the remote commander.
4. Select the “DISPLAY”, and press the [ ] button on the re-
mote commander.
5. Select the “TV Aspect Ratio”, and press the [ ] button on the
remote commander.
6. Select the “16:9 Original”.
7. Press button in order of the [1]
t [3] t [9] t [7] t [1] t
[3]
t [9] t [ ] on the remote commander, and enter the SA
confi g test mode.
8. Confi rm “OK” is displayed in the item of “SA CONFIG
TEST”.
System Information -
OK
< VERSION >
MAIN VER:
SERVO VER:
IO MICOM VER:
DSP:
TOUCH:
REGION NO:
MAIN VER:
SERVO VER:
IO MICOM VER:
DSP:
TOUCH:
REGION NO:
< KEY >
AACS:
BD+:
HDCP:
MAC:
WIRELESS TX VER: RESET:
CHECKSUM MAIN:
MAC:
WIRELESS TX VER: RESET:
CHECKSUM MAIN:
< DIAGNOSIS >
FRONT I/F TEST
LOADER I/F TEST
PICKUP LD TEST
SA CONFIG TEST --- OK
LOADER I/F TEST
PICKUP LD TEST
SA CONFIG TEST --- OK
HDMI I/F TEST
USB I/F TEST
WIRED NETWORK I/F TEST
USB I/F TEST
WIRED NETWORK I/F TEST
9. The SA adjustment confi rmation ends.
HBD-B1
HBD-B1
15
15
SECTION 4
DIAGRAMS
For Schematic Diagrams.
Note:
• All capacitors are in μF unless otherwise noted. (p: pF) 50
• All capacitors are in μF unless otherwise noted. (p: pF) 50
WV or less are not indicated except for electrolytics and
tantalums.
tantalums.
• All resistors are in Ω and 1/4 W or less unless otherwise
specifi ed.
THIS NOTE IS COMMON FOR PRINTED WIRING BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed in each block.)
(In addition to this, the necessary note is printed in each block.)
For Printed Wiring Boards.
Note:
•
•
X : Parts extracted from the component side.
•
Y : Parts extracted from the conductor side.
•
: Pattern from the side which enables seeing.
(The other layers’ patterns are not indicated.)
Caution:
Pattern face side:
(Conductor Side)
Parts face side:
(Component Side)
Pattern face side:
(Conductor Side)
Parts face side:
(Component Side)
Parts on the pattern face side seen
from the pattern face are indicated.
Parts on the parts face side seen from
the parts face are indicated.
from the pattern face are indicated.
Parts on the parts face side seen from
the parts face are indicated.
Note: The components identifi ed by mark
0 or dotted
line with mark
0 are critical for safety.
Replace only with part number specifi ed.
• Circuit Boards Location
JACK board
FRONT board
wireless module
LOADING board
PHOTO RECEIVER 1 board
JUNCTION board
MAIN board
PHOTO RECEIVER 2 board
PHOTO EMITION 2 board
PHOTO EMITION 1 board
AMP+SMPS board
HBD-B1
HBD-B1
16
16
4-1. SCHEMATIC DIAGRAM - MAIN Board (1/10) -
DGND
DGND
DGND
1.2V
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
1.2V
3.3V_BCM
3.3V_BCM
1.2V
1.2V
3.3V_BCM
3.3V_BCM
3.3V_BCM
3.3V_BCM
3.3V_BCM
1.2V
3.3V_BCM
2.5V
3.3V_BCM
3.3V_BCM
3.3V_BCM
3.3V_BCM
VCC_3V3
3.3V_BCM
3.3V_BCM
VDAC_CVBS
EPHY_TDP
EPHY_TDN
CLK33
BSC_S_SDA
BSC_S_SCL
B_I2S_MCLK
S_UART_TX0
MICOM_UART_TX1
UART_TX2
STANDBY_BTN_GPIO35
NAND_nWE1
NAND_nWE0
NAND_nRE
NAND_CLE
NAND_ALE
NAND_CLE
NAND_ALE
AUDIO_DATA
BCM_SPDIF_OUT
MICOM_UART_TX1
UART_TX2
S_UART_TX0
S_UART_RX0
USB0_DP
USB0_DN
USB0_DN
EPHY_LINK
EPHY_LINK
EJTAG_CE
USB1_DN
USB1_DP
UART_PROTECTION
USB0_PWRFLT
USB1_PWRFLT
USB0_PWRON
USB1_PWRON
HDMI_SDA
HDMI_SCL
JT_TDO
JT_TDI
JT_TCK
JT_TMS
JT_TRST
IPOD_SDA
IPOD_SCL
IRQ4_GPIO19
IPOD_VIDEO_SW
RESET_OUTB
HDMI_SCL
HDMI_SDA
HDMI_0_P
HDMI_0_N
HDMI_1_P
HDMI_1_N
HDMI_0_N
HDMI_1_P
HDMI_1_N
HDMI_CLK_P
HDMI_CLK_N
HDMI_CLK_N
HDMI_2_N
HDMI_2_P
7632_SCL
7632_SDA
7632_SDA
7632_HPD
B_I2S_BCK
B_I2S_LRCK
B_I2S_DATA0
B_I2S_LRCK
B_I2S_DATA0
B_I2S_DATA3
B_I2S_DATA1
B_I2S_DATA2
B_I2S_DATA2
BCM_SPDIF_OUT
AUDIO_DATA
IPOD_RESET
IPOD_UART_TXD2
IPOD_SDA
IPOD_SCL
IPOD_DET
EPHY_RDP
STANDBY_BTN_GPIO35
BCM_nRESET
MICOM_UART_RX1
STANDBY_BTN_GPIO35
EPHY_RDN
BSC_S_SDA
BSC_S_SCL
UART_PROTECTION
S_UART_TX0
USB1_PWRFLT
USB0_PWRFLT
S_UART_RX0
USB0_PWRON
USB1_PWRON
EJTAG_CE
JT_TRST
JT_TDI
JT_TMS
JT_TCK
JT_TDO
OPU_DET2
IRQ4_GPIO19
UART_RX2__GPIO4
RESET_OUTB
IPOD_READY
IPOD_DET
IPOD_UART_RXD2
IPOD_UART_RXD2
IPOD_READY
IPOD_RESET
C N 5 0 1
NC_JE117-A8T-4
CN500
JE118-A8G-06
1
RX
2
TX
3
NC
4
NC
5
5V
6
GND
VCC_5V
TP553
TP552
VDD_TP
TRSTN_TP
TDI_TP
TMS_TP
TCK_TP
TDO_TP
TG_RSTN_TP
GND_TP
CLK33
J22
P14
W8
U7
U8
U8
J7
G6
H6
J4
J8
K7
K6
R15
V7
K5
G3
H19
J3
J5
J23
V8
J6
C2
F3
E1
V19
U22
V20
AC23
R550
75(S,1%)
R549
560(S,1%)
R537
12K(S,1%)
R501
0
R540
27K
R504
XX0(S)
R505
XX0(S)
R506
0(S)
R507
0(S)
R543
33
R532
1.5K
R502
0
R523
1.5K(S)
R522
1.5K(S)
R539
180(S)
R538
180(S)
R566
NC_4.7K
R548
47K(S)
R570
NC_47K(S)
R565
NC_4.7K
R569
NC_4.7K
R564
NC_4.7K
R563
NC_120(S)
R568
NC_4.7K
R567
NC_4.7K
R562
NC_1.5K
R519
1.5K
R520
1.5K
R527
10K
R552
NC
R525
10K
R535
10K
R529
10K
R526
10K
R531
10K
R561
10K
R530
XX
R536
10K
R528
10K
R541
3.9K(1%)
R512
1.24K(S,1%)
R516
1.5K
R510
0(S)
R509
0(S)
R508
0(S)
R558
NC
NC
R524
1.5K(S)
R521
1.5K(S)
R500
0
R557
NC
R556
1.5K
R513
NC
R555
NC
R554
NC
R551
NC
R560
NC
R515
1.5K
R518
1.5K
R544
33
R545
33
R503
10K
R511
(XX)1M
R559
OPEN
R514
1.5K
R5F4
OPEN
R5F3
OPEN
R5F2
4.7K
R517
1.5K
R5F5
OPEN
V
5
2
/
F
n
0
1
3
1
5
C
3
0
5
C
F
u
1
.
0
2
1
5
C
V
5
2
/
F
n
0
1
2
0
5
C
F
u
1
.
0
2
2
5
C
)
R
5
X
,
5
2
2
3
(
V
6
1
/
F
u
2
2
8
0
5
C
F
u
1
.
0
0
0
5
C
F
u
1
.
0
1
1
5
C
V
6
1
/
F
p
0
0
1
7
0
5
C
F
u
1
.
0
4
2
5
C
)
S
(
F
p
0
3
3
2
5
C
)
S
(
F
p
0
3
1
0
5
C
F
u
1
.
0
6
0
5
C
F
u
1
.
0
9
0
5
C
F
u
1
.
0
C504
0.1uF
C510
0.1uF/16V(S)
C517
10uF/6.3V(M)
C505
0.1uF
C514
10uF/6.3V(M)
C520
10uF/6.3V(M)
C521
10uF/6.3V(M)
C518
10uF/6.3V(M)
C516
10uF/6.3V(M)
C519
10uF/6.3V(M)
C515
10uF/6.3V(M)
C5H4
104
C5W0
100nF
C5W1
10nF
C5Y3
10uF(3)
C525
4.7uH
L501
HB-1M1608-102JT
L500
HB-1M1608-102JT
L504
HH-1M2012-601
L505
HH-1M2012-601
L506
HH-1M2012-601
HH-1M2012-601
L507
HH-1M2012-601
L502
HH-1M2012-601
L503
HH-1M2012-601
L531
HH-1M2012-601
I C 5 0 0
B C M 7 6 3 2
K23
VDAC0_0
K25
VDAC0_1
K24
VDAC0_2
J24
VDAC1_0
J25
VDAC1_1
K22
VDAC1_2
K20
VDAC0_REG
K21
VDAC1_REG
L23
VDAC_RBIAS
J21
VDAC_AVDD33
K19
VDAC_VSS
J19
VDAC_VSS
T24
HDMI_0_P
T25
HDMI_0_N
T22
HDMI_1_P
T23
HDMI_1_N
R22
HDMI_2_P
R23
HDMI_2_N
U24
HDMI_CLK_P
U25
HDMI_CLK_N
R21
HDMI_PDVDD12
U22
NC
U19
HDMI_VSS
U23
HDMI_EXT12K
U20
HDMI_HTPLG
T19
HDMI_CEC
T21
HDMI_CEC_RES
T20
HDMI_SCL/SGPIO_04
U21
HDMI_SCL/SGPIO_05
Y25
USB0_DP
Y24
USB0_DN
Y23
USB0_PWRON
Y22
USB0_PWRFLT/OBSRV_PLL_SEL_0
V23
USB1_DP
V22
USB1_DN
W22
USB1_PWRON
W23
USB1_PWRFLT
V21
USB_PLLVDD12
Y21
USB_RREF
V19
USB_MONPLL
V20
USB_MONCDR
W21
USB_AVDD12
W20
USB_VSS
AC23
EPHY_ATEST
AB23
EPHY_RDAC
AB25
EPHY_RDN
AB24
EPHY_RDP
AA24
EPHY_TDN
AA25
EPHY_TDP
AA23
EPHY_AVDD12
AA22
EPHY_VSS
V5
DVIO_00/HD_DVI_00
U6
DVIO_01/HD_DVI_01
U2
DVIO_02/HD_DVI_02
U3
DVIO_03/HD_DVI_03
U4
DVIO_04/HD_DVI_04
U5
DVIO_05/HD_DVI_05
T5
DVIO_06/HD_DVI_06
T6
DVIO_07/HD_DVI_07
T2
DVIO_08/HD_DVI_08
T3
DVIO_09/HD_DVI_09
T7
DVIO_10/HD_DVI_10
R3
DVIO_11/HD_DVI_11
R4
DVIO_12/HD_DVI_12
R5
DVIO_13/HD_DVI_13
R7
DVIO_14/HD_DVI_14
R8
DVIO_15/HD_DVI_15
P6
DVIO_16/HD_DVI_16
P7
DVIO_17/HD_DVI_17
P8
DVIO_18/HD_DVI_18
P3
DVIO_19/HD_DVI_19
P4
DVIO_20/HD_DVI_20
P5
DVIO_21/HD_DVI_21
N7
DVIO_22/HD_DVI_22
N2
DVIO_23/HD_DVI_23
N3
DVIO_24/HD_DVI_24
N5
DVIO_25/HD_DVI_25
N6
DVIO_26/HD_DVI_26
M3
DVIO_27/HD_DVI_27
M4
DVIO_28/HD_DVI_28
M5
DVIO_29/HD_DVI_29
M7
DVIO_30/HD_DVI_30
M8
DVIO_31/HD_DVI_31
L3
DVIO_32/HD_DVI_32/IR_IN
L4
DVIO_33/HD_DVI_33/PKT_CLK1
L5
DVIO_34/HD_DVI_34/PKT_DATA1
L6
DVIO_35/HD_DVI_35PKT_SYNC1
L7
DVIO_HSYNC / HD_DVI_HSYNC
J1
DVIO_VSYNC / HD_DVI_VSYNC
J2
DVIO_DE / HD_DVI_DE
K2
DVO_CLK
K3
DVI_CLK
AB5
GPIO_00
AA6
GPIO_01
AC3
GPIO_02
Y6
GPIO_03
AB3
GPIO_04
AA2
GPIO_05
W8
GPIO_06
W3
GPIO_07
W6
GPIO_08
F6
GPIO_09
D2
GPIO_10
D3
GPIO_11
F5
GPIO_12
E3
GPIO_13
F3
GPIO_14
B2
GPIO_15
A4
GPIO_16
W5
GPIO_17
Y7
GPIO_18
F4
GPIO_19
AA1
GPIO_20
AC1
GPIO_21
AB2
GPIO_22
AD2
GPIO_23
AE3
GPIO_24
AC2
GPIO_25
W7
GPIO_26
H7
GPIO_27
C2
GPIO_28
J3
GPIO_29
J4
GPIO_30
J5
GPIO_31
J6
GPIO_32
J7
GPIO_33
J8
GPIO_34
C3
GPIO_35
G3
GPIO_36
E2
GPIO_37
E1
GPIO_38
G5
GPIO_39
H6
GPIO_40
G6
GPIO_41
E4
GPIO_42
H4
GPIO_43
H5
GPIO_44
K5
GPIO_45
K6
GPIO_46
K7
GPIO_47
H3
SGPIO_00
F2
SGPIO_01
V4
SGPIO_02
V3
SGPIO_03
AA3
EJTAG_TRSTb
Y4
EJTAG_TMS
AA4
EJTAG_TCK
Y3
EJTAG_TDI
Y2
EJTAG_TDO
AA5
EJTAG_CE
AD4
BSC_S_SCL
AC4
BSC_S_SDA
V7
TEST_MODE0
U7
TEST_MODE1
U8
TEST_MODE2
V8
TEST_MODE3
H23
CLK27_XTALN
H22
CLK27_XTALP
R15
OBSRV_VDD12
P14
OBSRV_VSS
H21
PLL_AVDD12
H20
PLL_VSS
H19
PLL_TESTOUT
AC24
OTP_V2P5
H9
CLK33_OUT
U1
RESETb
Y5
RESET_OUTb
H10
FP_4SEC_RESETb
J23
BYP_216_CLK
J22
BYP_SYS800_PLL
AD24
REG_VDD33
AC25
REG_OUT_2P5
RA546
33
1
2
3
4
5
6
7
8
DSPI_DATA[2]
DSPI_MCLK
DSPI_BCK
DSPI_DATA[0]
DSPI_LRCK
DSPI_DATA[1]
DSPI_DATA[3]
1
A
T
A
D
_
S
2
I
_
B
K
C
B
_
S
2
I
_
B
B_I2S_DATA0
B_I2S_MCLK
244_CTRL1
B_I2S_LRCK
B_I2S_DATA3
B_I2S_DATA2
3.3V_BCM
DGND
DGND
DGND
I C 5 1 1
74HCT244
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
X500
27MHZ
R5F1
1.5K
R547
1.5K
BCM7632 BOOT STRAP OPTIONS
n
o
i
t
p
i
r
c
s
e
D
E
M
A
N
L
A
N
G
I
S
FIELD NAME
EBI_nWE0
NO.
BBS I/F
DEBUGGING CONSOLE (UART1)
EBI_nWE1
NAND_nRE
NAND_CLE
NAND_ALE
I2S_SDATA
BCM_SPDIF_OUT
DDR STRAP OPTIONS
NO
SIGNAL NAME
VALUE
S_UART_TX0
UART_TX1
UART_TX2
EPHY_LINK
0
0
0
1
1
2
3
4
1
2
3
4
5
6
7
STRAP_FLASH_WIDTH(bit0)
STRAP_NAND_FLASH(bit1)
STRAP_EBI_ROM_SIZE1(bit2)
STRAP_EBI_ROM_SIZE0(bit3)
Reserved
STRAP_SYSTEM_BIG_ENDIAN
STRAP_RESET_EXT_MODE
0: Normal operation (MIPS auto-boot)
1: Disable MIPS auto-boot enable TRB interface after reset
1: Disable MIPS auto-boot enable TRB interface after reset
0 = Little endian, 1=Big endian
0 = Normal initial Reset 1 = Extend initial Reset
VALUE
1
0
0
0
0
0
0
Close to MPEG
EJTAG
USB0_PWR ON : BCM7601 10K PD, AUDIO MODEL: 4.7K PD
USB1_PWR ON : BCM7601 N.C, AUDIO MODEL: 4.7K PD
USB0_PWRFLT : BCM7601 10K PU
USB1_PWRFLT : BCM7601 10K PU
USB1_PWRFLT : BCM7601 10K PU
<USB1_RREF>
BCM7601 3.9K,
REF: 4.02K PD
BCM7601 3.9K,
REF: 4.02K PD
VIDEO
HDMI
USB
Ethernet
<COMPONENT SIZE>
COG > X7R > X5R > Y5V
<CAPACITOR CHARACTERISTIC>
1608 SIZE : S
2012 SIZE : M
3216 SIZE : L
JTAG
Bit3 Bit2 Bit1 Bit0 Option
0 0 0 0 No ECC
0 0 0 1 1-bit ECC
0 0 0 1 4-bit ECC
0 0 0 1 8-bit ECC (16-Byte OOB)
0 0 0 1 8-bit ECC (27-Byte OOB) **
0 0 0 1 12-bit ECC
0 0 0 1 One NAND
* All other values are reserved.
OOB refers to the size of the spare area.
0 0 0 0 No ECC
0 0 0 1 1-bit ECC
0 0 0 1 4-bit ECC
0 0 0 1 8-bit ECC (16-Byte OOB)
0 0 0 1 8-bit ECC (27-Byte OOB) **
0 0 0 1 12-bit ECC
0 0 0 1 One NAND
* All other values are reserved.
OOB refers to the size of the spare area.
Wi-Fi
MAIN BOARD (1/10)
4
B
6
9
11
D
H
10
13
14
12
3
5
C
F
1
E
8
G
J
I
A
2
7
Click on the first or last page to see other BDV-B1 / HBD-B1 service manuals if exist.