Sharp TU-X1E (serv.man8) Service Manual ▷ View online
TU-X1E/RU
7 – 5
42
R1X0+
I
TMDS input Port 1 data pairs.
41
R1X0-
I
45
R1X1+
I
44
R1X1-
I
48
R1X2+
I
47
R1X2-
I
39
R1C+
I
TMDS input Port 1 clock pair.
38
R1C-
I
62
R2X0+
I
TMDS input Port 2 data pairs.
61
R2X0-
I
65
R2X1+
I
64
R2X1-
I
68
R2X2+
I
67
R2X2-
I
59
R2C+
I
TMDS input Port 2 clock pair.
58
R2C-
I
7
TX0+
O
TMDS output data pairs.
8
TX0-
O
4
TX1+
O
5
TX1-
O
1
TX2+
O
2
TX2-
O
10
TXC+
O
TMDS output clock pair.
11
TXC-
O
12
EXT_SWING
I
Voltage Swing Adjust. A resistor tied from this pin to AVCC18 determines the ampli-
tude of the voltage swing. The recommended value is 750?.
tude of the voltage swing. The recommended value is 750?.
Power and Ground Pins
23, 43, 55, 63
AVCC33
---
Analog VCC. Connect to 3.3V supply.
6, 17, 29, 37, 49,
57, 69
AVCC18
---
Analog VCC. Connect to 1.8V supply.
3, 9, 20, 26, 40,
46, 60, 66, 80
AGND
---
Analog GND.
33, 73
DVCC18
---
Digital VCC. Connect to 1.8V supply.
34, 74
DGND
---
Digital GND.
Pin No.
Pin Name
I/O
Pin Function
TU-X1E/RU
7 – 6
2. VHIPCA9517-1Y I2C BUS REPEATER
3. VHI1173S18/33-1Y Voltage Regulator
Pin No.
Pin Name
I/O
Pin Function
1
VCCA
-
A-side supply voltage (0.9 V to 5.5 V)
2
SCLA
I
serial clock A-side bus
3
SDAA
I/O
serial data A-side bus
4
GND
-
supply ground (0 V)
5
EN
I
active HIGH repeater enable input
6
SDAB
I/O
serial data B-side bus
7
SCLB
I
serial clock B-side bus
8
VCCB
-
B-side supply voltage (2.7 V to 5.5 V)
Pin No.
Pin Name
I/O
Pin Function
1
VOUT
O
Output Voltage
2
GND
-
Ground
3
NC
-
No Connection
4
CE
I
Chip Enable terminal
5
GND
-
Ground
6
VDD
-
Input power source terminal
TU-X1E/RU
7 – 7
4. VHISII9135-1Q HDMI Receiver
Pin No.
Pin Name
I/O
Pin Function
Digital Video Output Pins.
16,15,14,13,10,9,
8,7,3,2,1,
144,141,140,139,
138,135,134,133,
132,129,128,127,
126,123,122,121,
138,135,134,133,
132,129,128,127,
126,123,122,121,
120,117,116,115,
114,111,110,109,
114,111,110,109,
108
Q0-35
O
36-bit Output Pixel Data Bus.
It supports a wide array of output formats, including multiple RGB and YCbCr bus for-
mats.
It supports a wide array of output formats, including multiple RGB and YCbCr bus for-
mats.
19
DE
O
Data enable.
20
HSYNC
O
Horizontal Sync Output control signal.
21
VSYNC
O
Vertical Sync Output control signal.
22
EVNODD
O
indicates Even or Odd Field for interlaced Formats.
5
ODCK
O
Output Data Clock.
Digital Audio Output Pins.
95
XTALIN
I
Crystal Clock Input.
94
XTALOUT
O
Crystal Clock Output.
89
MCLK
O
Audio Master Clock Output.
86
SCK/DCLK
O
I2S Serial Clock Output.
DSD Clock Out.
DSD Clock Out.
85
WS/DR0
O
I2S Word Select Output.
DSD Serial Right Ch0 Data Output.
DSD Serial Right Ch0 Data Output.
81
SD0/DL0
O
I2S Serial Data Output./DSD Audio Output Configurable to be shared with OSD.
SD0=DSD Serial Left Ch0 Data Output.
SD1=DSD Serial Right Ch1 Data Output.
SD2=DSD Serial Left Ch1 Data Output.
SD3=DSD Serial Right Ch2 Data Output.
SD0=DSD Serial Left Ch0 Data Output.
SD1=DSD Serial Right Ch1 Data Output.
SD2=DSD Serial Left Ch1 Data Output.
SD3=DSD Serial Right Ch2 Data Output.
82
SD1/DR1
O
83
SD2/DL1
O
84
SD3/DR2
O
78
SPDIF/DL2
O
S/PDIF Audio Output. Configurable to be shared with DSD.
DSD Serial Left Ch2 Data Output.
DSD Serial Left Ch2 Data Output.
75
MUTEOUT
O
Mute Audio Output. Signal to the external downstream audio device, audio DAC, etc,
to mute audio output.
to mute audio output.
Configuration/Programming Pins.
102
INT
O
Interrupt Output.
100
RESET#
I
Reset Pin. Active LOW. 5V Tolerant.
34
DSCL0
I
DDCI2C Clock for Port 0. 5V Tolerant.
33
DSDA0
I/O
DDCI2C Data for Port 0. 5V Tolerant.
29
DSCL1
I
DDCI2C Clock for Port 1. 5V Tolerant.
28
DSDA1
I/O
DDCI2C Data for Port 1. 5V Tolerant.
27
CSCL
I
Configuration/Status I2C Clock. 5V Tolerant.
26
CSDA
I/O
Configuration/Status I2C Data. 5V Tolerant.
105
CI2CA
I
Local I2C Adress Select. 5V Tolerant.
101
SCDT
O
Indicates active video at HDMI input port.
35
R0PWR5V
I
Port 0 Transmitter Detect. 5V Tolerant.
30
R1PWR5V
I
Port 1 Transmitter Detect. 5V Tolerant.
98,77,76,55
RSVDNC
-
Reserved, must be unconnected.
99
RSVDL
I
Reserved, must be tied to ground.
Differential Signal Data Pins.
40
R0XC+
I
TMDS input clock pair. HDMI Port 0.
39
R0XC-
I
44
R0X0+
I
TMDS input data pair. HDMI Port 0.
43
R0X0-
I
48
R0X1+
I
TMDS input data pair. HDMI Port 0.
47
R0X1-
I
52
R0X2+
I
TMDS input data pair. HDMI Port 0.
51
R0X2-
I
58
R1XC+
I
TMDS input clock pair. HDMI Port 1.
57
R1XC-
I
62
R1X0+
I
TMDS input data pair. HDMI Port 1.
61
R1X0-
I
66
R1X1+
I
TMDS input data pair. HDMI Port 1.
65
R1X1-
I
70
R1X2+
I
TMDS input data pair. HDMI Port 1.
69
R1X2-
I
TU-X1E/RU
7 – 8
Power and Ground Pins.
12, 24, 25, 80, 91,
12, 24, 25, 80, 91,
107, 119, 131,
143
CVCC18
---
Digital Logic VCC 1.8V
11, 23, 79, 90,
106, 118, 130,
106, 118, 130,
142,
CGND
---
Digital Logic ground..
6, 18, 32, 74, 88,
104, 113, 125,
137,
IOVCC33
---
Input/Output Pin Supply. 3.3V
4, 17, 31, 73, 87,
103, 112, 124,
136,
IOGND
---
Input/Output Pin ground.
38, 42, 46, 50, 56,
60, 64, 68,
AVCC33
---
TMDS Analog VCC. 3.3V
36, 41, 45, 49, 53,
59, 63, 67, 71
AGND
---
TMDS Analog ground.
37,54,72
AVCC18
---
TMDS Analog VCC 1.8V.
92
DVCC18
---
audio clock regeneration PLL analog VCC. 1.8V
93
DGND
---
audio clock regeneration PLL analog ground.
96
XTALVCC
---
audio clock regeneration PLL crystal oscillator power. 3.3V
97
REGVCC
---
audio clock regeneration PLL crystal oscillator power. 3.3V
Pin No.
Pin Name
I/O
Pin Function
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