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Wait x ms (display file)

Mute all sound outputs via softmute

Mute all video outputs

switch off LCD backlight

(I/O or I²C)

Force ext audio outputs to ground 

(I/O: audio reset)

And wait 5ms

switch off Ambilight

Set main amplifier mute (I/O: audio-mute)

Wait 100ms

Wait until Ambilight has faded out: Output power 

Observer should be zero

Switch off the display power by 

switching LCD-PWR-ON high

Wait x ms

Switch off LVDS output in 85500

The exact timings to 

switch off the 

display (LVDS 

delay, lamp delay) 

are defined in the 

display file.

Switch off POK line

detection algorithm 

200Hz set?

No

Yes

Instruct 200Hz 

Tcon to turn off 

the display

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transfer Wake up reasons to the Stand by μP.

Disable all supply related protections and switch off 

the DC/DC converters (ENABLE-3V3n)

Switch OFF all supplies by switching HIGH the 

Standby I/O line

Switch AVC system in reset state (reset-system and 

reset-AVC lines)

Switch reset-USB, Reset-Ethernet and Reset-DVBs 

LOW

Important remarks:

release reset audio 10 sec after entering 

standby to save power

Also here, the standby state has to be 

maintained for at least 4s before starting 

another state transition.

Wait 5ms

Wait 10ms

Delay transition until ramping down of ambient light is 

finished. *)

If ambientlight functionality was used in semi-standby 

(lampadaire mode), switch off ambient light (see CHS 

ambilight)

*) If this is not performed and the set is 
switched to standby when the switch off of 
the ambilights is still ongoing, the lights will 
switch off abruptly when the supply is cut.

Switch Memories to self-refresh (this creates a more 

stable condition when switching off the power).

The error code buffer contains all detected errors since the last 
time the buffer was erased. The buffer is written from left to 
right, new errors are logged at the left side, and all other errors 
shift one position to the right. 
When an error occurs, it is added to the list of errors, provided 
the list is not full. When an error occurs and the error buffer is 
full, then the new error is not added, and the error buffer stays 
intact (history is maintained).
To prevent that an occasional error stays in the list forever, the 
error is removed from the list after more than 50 hrs. of 
operation. 
When multiple errors occur (errors occurred within a short time 
span), there is a high probability that there is some relation 
between them. 
 
New in this chassis is the way errors can be displayed:
 
•

•

There is a simple blinking LED procedure for board 
level repair (home repair) so called LAYER 1 errors 
next to the existing errors which are LAYER 2 errors (see 

Table 5-2

).

–

LAYER 1 errors are one digit errors.

–

LAYER 2 errors are 2 digit errors.

•

In protection mode.
–

From consumer mode: LAYER 1.

–

From SDM mode: LAYER 2.

•

Fatal errors, if I2C bus is blocked and the set reboots, 
CSM and SAM are not selectable.
–

From consumer mode: LAYER 1.

–

From SDM mode: LAYER 2. 

•

In CSM mode.
–

When entering CSM: error LAYER 1 will be displayed 
by blinking LED. Only the latest error is shown.

•

In SDM mode.
–

When SDM is entered via Remote Control code or the 
hardware pins, LAYER 2 is displayed via blinking LED.

•

Error display on screen.
–

In CSM no error codes are displayed on screen.

–

In SAM the complete error list is shown.

 
Basically there are three kinds of errors:
•

Errors detected by the Stand-by software which lead to 
protection. These errors will always lead to protection and 
an automatic start of the blinking LED LAYER 1 error.
(see section “

5.6 The Blinking LED Procedure

”).

•

Errors detected by the Stand-by software which not 
lead to protection. In this case the front LED should blink 
the involved error. See also section “

5.5 Error Codes

, 

5.5.4 

Error Buffer

”. Note that it can take up several minutes 

before the TV starts blinking the error (e.g. LAYER 1 
error = 2, LAYER 2 error = 15 or 53).

Use one of the following methods:
•

On screen via the SAM (only when a picture is visible). 
E.g.:
–

00 00 00 00 00: No errors detected

–

23 00 00 00 00: Error code 23 is the last and only 
detected error.

–

37 23 00 00 00: Error code 23 was first detected and 
error code 37 is the last detected error.

–

 •

     Errors detected by main software (MIPS). In this case 

the error will be logged into the error buffer and can be 
read out via blinking LED method LAYER 1-2 error, or in 
case picture is visible, via SAM.

I

2

C3

2

13

MIPS

E

BL / EB

SSB

SSB

I

2

C2

2

14

MIPS

E

BL / EB

SSB

SSB

I

2

C4

2

18

MIPS

E

BL / EB

SSB

SSB

PNX doesn’t boot (HW cause)  2

15

Stby μP

P

BL

PNX8550

SSB

12V

3

16

Stby μP

P

BL

/

Supply

Inverter or display supply

3

17

MIPS

E

EB

/

Supply

PNX51X0

2/9

21

MIPS

E

EB

PNX51X0

200 Hz board

HDMI mux

2

23

MIPS

E

EB

Sil9x87A

SSB

I2C switch

2

24

MIPS

E

EB

PCA9540

SSB

Channel dec DVB-S

2

28

MIPS

E

EB

STV0903

SSB

Lnb controller

2

31

MIPS

E

EB

LNBH23

SSB

Tuner

2

34

MIPS

E

EB

DTT 71300

SSB

Main nvm

2

35

MIPS

E

EB

STM24C64

SSB

Tuner DVB-S

2

36

MIPS

E

EB

STV6110

SSB

T° sensor SSB/set

2

42

MIPS

E

EB

LM 75

T° sensor

T° sensor LED driver/Tcon

7

42

MIPS

E

EB

LM 75

T° sensor

PNX doesn’t boot (SW cause) 2

53

Stby μP

P

BL

PNX8550

SSB

Display

5

64

MIPS

E

BL / EB

Altera

Display

Use one of the following methods:
•

By activation of the “RESET ERROR BUFFER” command 
in the SAM menu.

•

If the content of the error buffer has not changed for 50+ 
hours, it resets automatically.

In case of non-intermittent faults, clear the error buffer before 
starting to repair (before clearing the buffer, write down the 

content, as this history can give significant information). This to 
ensure that old error codes are no longer present. 
If possible, check the entire contents of the error buffer. In 
some situations, an error code is only the result of another error 
code and not the actual cause (e.g. a fault in the protection 
detection circuitry can also lead to a protection). 
There are several mechanisms of error detection:
•

Via error bits in the status registers of ICs.

•

Via polling on I/O pins going to the stand-by processor.

•

Via sensing of analog values on the stand-by processor or 
the PNX8550.

•

Via a “not acknowledge” of an I

2

C communication.

Take notice that some errors need several minutes before they 
start blinking or before they will be logged. So in case of 
problems wait 2 minutes from start-up onwards, and then 
check if the front LED is blinking or if an error is logged.

•

Via the blinking LED procedure. See section 

5.5.3 How to 

Clear the Error Buffer

.

Other root causes for this error can be due to hardware 
problems regarding the DDR’s and the bootscript reading 
from the PNX8550.

•

Error 16 (12V). This voltage is made in the power supply
and results in protection (LAYER 1 error  = 3) in case of 
absence. When SDM is activated we see blinking LED 
LAYER 2 error = 16.

•

Error 17 (Invertor or Display Supply). Here the status of 
the “Power OK” is checked by software, no protection will 
occur during failure of the invertor or display supply (no 
picture), only error logging. LED blinking of LAYER 1 
error = 3 in CSM, in SDM this gives LAYER 2 error = 17.

•

Error 21 (PNX51X0). When there is no I

2

C communication 

towards the PNX51X0 after start-up, LAYER 2 error = 21 
will be logged and displayed via the blinking LED 
procedure if SDM is switched on. This device is located on 
the 200 Hz panel from the display.

•

Error 23 (HDMI). When there is no I

2

C communication 

towards the HDMI mux after start-up, LAYER 2 error = 23 
will be logged and displayed via the blinking LED 
procedure if SDM is switched on.

•

Error 24 (I2C switch). When there is no I

2

C 

communication towards the I

2

C switch, LAYER 2 

error = 24 will be logged and displayed via the blinking LED 
procedure when SDM is switched on. Remark: this only 
works for TV sets with an I

2

C controlled screen included.

•

Error 28 (Channel dec DVB-S). When there is no I

2

C 

communication towards the DVB-S channel decoder, 
blinking LED procedure if SDM is switched on.

•

2

C bus 4, Tuner bus blocked). In case this bus 

is blocked, short the “SDM” solder paths on the SSB during 
startup, LAYER error 2 = 18 will be blinked.

•

Error 15 (PNX8550 doesn’t boot). Indicates that the main 
processor was not able to read his bootscript. This error will 
point to a hardware problem around the PNX8550 
(supplies not OK, PNX 8550 completely dead, I

2

C link 

between PNX and Stand-by Processor broken, etc...). 
When error 15 occurs it is also possible that I

2

C1 bus is 

blocked (NVM). I

2

C1 can be indicated in the schematics as 

follows: SCL-UP-MIPS, SDA-UP-MIPS.
LAYER 2 error = 28 will be logged and displayed via the 

•

    Rebooting. When a TV is constantly rebooting due to in-

ternal problems, most of the time no errors will be logged 
or blinked. This rebooting can be recognized via a Hyper-
terminal (for Hyperterminal settings, see section “5.8 Fault 
Finding and Repair Tips, 5.8.7 Logging). It’s shown that 
the loggings which are generated by the main software 
keep continuing. 

•

     Error 13 (I2C bus 3, SSB bus blocked). Current situation: 

when this error occurs, the TV will constantly reboot due 
to the blocked bus.

•

     Error 14 (I2C bus 2, TV set bus blocked). Current situa-

tion: when this error occurs, the TV will constantly reboot 
due to the blocked bus.